veswiki - User contributions [en]

Outputting Sound

2026-08-28T14:59:06Z

E5frog:

The speaker can be supplied with one of three frequencies derived from the horizontal line frequency of the video circuitry.

On an NTSC machine, with a horizontal line frequency of approximately 15,734.26 Hz: 
4V = 15,734.26 / 16 ≈ 983.39 Hz 
8V = 15,734.26 / 32 ≈ 491.70 Hz 
32V = 15,734.26 / 128 ≈ 122.92 Hz 
 
On a PAL machine, with a horizontal line frequency of 15,625 Hz: 
4V = 15,625 / 16 ≈ 976.56 Hz 
8V = 15,625 / 32 ≈ 488.28 Hz 
32V = 15,625 / 128 ≈ 122.07 Hz 
 
If you want to make any other sounds or music try the improved [[Snippet:Playsong|PlaySong]] subroutine. It's not optimal for the early systems - it sounds much like a broken speaker... The second generation of systems has improved support for this and most of these also have sound on the tv so you can adjust the volume.
In VES [[Homebrew:Pac-Man|Pac-man]] the "Pac-man theme" is played before start and the PlaySong routine is also used for the other sound effects.

How to: You examine the frequencies of the sound effect you want in very tiny steps and then mimic it playing very short notes with the correct medium frequency at that time, the shorter pieces it's divided into the better...

The PlaySong routine doesn't allow for any other computing while it's running, the song data and other computing (moving graphics perhaps) has to be done alternating in small portions if these are to be combined.

Sound is controlled by the upper two bits of port 5, 00 means silence and then the three standard beeps:
<pre>

LI %01000000 ; 1kHz beep $40
OUTS 5

LI %10000000 ; 500Hz beep $80
OUTS 5

LI %11000000 ; 120Hz beep $C0
OUTS 5</pre>

Sound will decay rather quickly (about 50 ms before quiet) due to the intentional hardware layout.
Port needs to reinit to keep the sound on.

Here's an example of a creative sound effect from Sean Riddles Lights Out:

<pre>
;make a bad sound
li $3f ; r1 loaded with $3f
lr 1,a
sndloop:
li $80 ; $80 loaded into A
outs 5 ; send data to port
lis 1 ; A=1
lr 5,a ; load r5 with 1
pi delay ; run the syscall "delay" (very short, only 1)
lis 0 ; same as clr
outs 5 ; send 0 on port
ds 1 ; r1 decreased
bf 4,sndloop ; run the loop again until r1 is 0
</pre>

== Making sound effects with the PlaySong routine ==

Easiest example is Pac-man, e5frog studied the frequencies of the Pac-man's eating sound, the siren, death etc in very short pieces. Then set the data in the F8 to play that approximated medium frequency for exactly the same amount of time. I e it was hacked in little pieces, analyzed, thrown away and put together again with brand new pieces.

Recorded sound samples from a real Arcade Machine were analyzed.
The result came out quite fine!

Here's the result from Pac-man's eating sound:

<pre> ; Pac-man eats

db 1,116,1,116,1,116,1,163,1,163,2,178,3,191,3,202
db 20,255
db 3,207,3,199,2,191,1,172,1,172,1,161,2,161,3,161
db 20,255

; repeated over and over again</pre>

There is also a siren in the background all the time that resulted in this data:

<pre>
; Pac-man background siren

db 3,157,3,165,3,173,4,181,4,188,4,194,4,198,4,202,4,205,4,208,4,211,4,213
db 4,211,4,208,4,205,4,202,4,198,4,194,4,188,4,181,3,173,3,165

; repeated over and over again
</pre>

Unfortunately they can't be heard in the game, it couldn't be used because they take to much cpu-time... Perhaps there could be simultaneous music and effects some day - if that's handled by a second processor or a mock multitasking song playing routine...

For now there's only a click when Pac-man eats his pills and an extra sound when monsters are blue.
Death is accurately mimicked - no need for graphics speed there since everything is still and Pac-man only changes into his death-sprite between the partial PlaySong routines.

Like so:
<pre>;---------------------------------------------------------------------------
; Dying Song
;---------------------------------------------------------------------------

sfx.dying.0:
.byte 4,189,4,188,4,184,4,182,4,181
.byte 4,182,4,185,4,188,4,190,4,192,4,193
.byte 4,184,4,182,4,179,4,176,3,173,3,171
.byte 3,173,3,176,4,179,4,182,4,185,4,186
.byte 0
sfx.dying.1:
.byte 3,179,3,176,3,173,3,170,3,165,3,163
.byte 3,165,3,170,3,173,3,176,3,179,3,181
.byte 3,165,3,161,3,157,3,152,2,147,2,143
.byte 0
sfx.dying.2:
.byte 2,147,2,152,3,157,3,161,3,166,3,168
.byte 3,155,3,152,3,147,2,141,2,139,2,128
.byte 2,135,2,138
.byte 0
sfx.dying.3:
.byte 2,126,3,170,3,192,4,205,5,214,6,220
.byte 7,224,7,229,8,232,9,234,10,255
.byte 2,126,3,170,3,192,4,205,5,214,6,220
.byte 7,224,7,229,8,232,9,234
.byte 0 ; end of song
</pre>

There's also this:

<pre>
;---------------------------------------------------------------------------
; Extra Pac-man sound at 10000 points
;---------------------------------------------------------------------------

sfx.extraPacman:
.byte 6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,6,121,6,122,12
.byte 190,6,192,0
</pre>

Disassembly:Videocart 24

2026-08-28T14:54:30Z

E5frog:

This is the complete disassembly of the [[Channel F]] [[Videocart 24]] made with e5frog's modified [[f8tool]] made by [[Peter Trauner]]'s. Original code is copyright © 1978 (?) [[Zircon International]].

<pre>
;===============================================================================
; VIDEOCART 24 / PRO FOOTBALL
; Commented disassembly
;
; Original binary copyright Zircon International, approximately 1978.
; Original disassembly generated with f8tool and reconstructed as compilable
; DASM/F8 source. This revision preserves all instructions, labels, data bytes,
; addresses and original address comments. Only explanatory comments and
; section headings have been added.
;
; Confidence terminology used below:
; confirmed directly established by I/O, data flow or control flow
; strongly likely supported by several independent code relationships
; preliminary descriptive working name, not an original symbol
;
; The range $124D-$17FF is emitted as data because reachable code addresses it
; through DC0. Routines and tables are described without changing binary data.
;===============================================================================

processor f8
org $0800

clrscrn equ $00D0

lr 5, A ; 0800 55
nop ; 0801 2B
li $D0 ; 0802 20 D0
lr 3, A ; 0804 53
pi clrscrn ; 0805 28 00 D0
lisu 6 ; 0808 66
lisl 1 ; 0809 69
li $21 ; 080A 20 21
lr S, A ; 080C 5C
lis 1 ; 080D 71
lr $A, A ; 080E 5A
jmp L0E68 ; 080F 29 0E 68
;-------------------------------------------------------------------------------
; set_isar_2x_r0_plus_10 (confirmed)
; Convert object index in r0 to the first byte of a two-byte scratchpad entry.
; Output: ISAR = $10 + 2*r0. A and ISAR are changed; r0 is preserved.
;-------------------------------------------------------------------------------
L0812: li $10 ; 0812 20 10
as 0 ; 0814 C0
as 0 ; 0815 C0
lr IS, A ; 0816 0B
pop ; 0817 1C
;-------------------------------------------------------------------------------
; delay_r5 (confirmed)
; Blocking two-level delay. A wraps through 256 INC operations for each r5
; count. r5 is consumed and returns as zero.
;-------------------------------------------------------------------------------
L0818: clr ; 0818 70
L0819: inc ; 0819 1F
bnz L0819 ; 081A 94 FE
ds 5 ; 081C 35
bnz L0818 ; 081D 94 FA
pop ; 081F 1C
;-------------------------------------------------------------------------------
; Graphics parameter entry points (strongly likely)
; L0820 reads r3, then L0822 reads r4, r2, r5 and r6 from DC0 before entering
; the common renderer. Observed use identifies r3/r4 as coordinates, r2 as
; color/mode, and r5/r6 as width/height counters.
;-------------------------------------------------------------------------------
L0820: lm ; 0820 16
lr 3, A ; 0821 53
L0822: lm ; 0822 16
lr 4, A ; 0823 54
lm ; 0824 16
lr 2, A ; 0825 52
lm ; 0826 16
lr 5, A ; 0827 55
lm ; 0828 16
lr 6, A ; 0829 56
br L084A ; 082A 90 1F
; draw_object_from_scratch: select solid/background mode, then read X/Y pair.
L082C: li $C1 ; 082C 20 C1
lr 2, A ; 082E 52
; Read a two-byte coordinate pair through ISAR with post-increment semantics.
L082F: lr A, I ; 082F 4D
lr 3, A ; 0830 53
ds 3 ; 0831 33
lr A, I ; 0832 4D
lr 4, A ; 0833 54
ds 4 ; 0834 34
br L083A ; 0835 90 04
.byte $20, $C1, $52 ; 0837
L083A: lis 3 ; 083A 73
lr 5, A ; 083B 55
; Short fixed-height graphics entry: use three rows.
L083C: lis 3 ; 083C 73
lr 6, A ; 083D 56
br L084A ; 083E 90 0B
; draw_bitmap_entry (confirmed graphics): select a two-byte glyph/sprite entry
; at L1364 + 2*r1 and use fixed dimensions 3 by 5.
L0840: dci L1364 ; 0840 2A 13 64
lr A, 1 ; 0843 41
adc ; 0844 8E
adc ; 0845 8E
lis 3 ; 0846 73
lr 5, A ; 0847 55
lis 5 ; 0848 75
lr 6, A ; 0849 56
;-------------------------------------------------------------------------------
; draw_bitmap_core (confirmed)
; Port 0: graphics write/strobe. Port 1: color. Port 4: inverted X.
; Port 5: inverted Y in low six bits and sound selection in high two bits.
; r7 is the serial bitmap mask; a new byte is fetched with LM when exhausted.
; r1 and r6 count columns and rows. Port 0 is cleared before return.
;-------------------------------------------------------------------------------
L084A: clr ; 084A 70
lr 7, A ; 084B 57
li $40 ; 084C 20 40
outs 0 ; 084E B0
lr A, 4 ; 084F 44
oi $C0 ; 0850 22 C0
com ; 0852 18
outs 5 ; 0853 B5
L0854: lr A, 3 ; 0854 43
com ; 0855 18
outs 4 ; 0856 B4
lr A, 5 ; 0857 45
lr 1, A ; 0858 51
L0859: lr A, 2 ; 0859 42
outs 1 ; 085A B1
ni 1 ; 085B 21 01
bnz L0873 ; 085D 94 15
com ; 085F 18
adc ; 0860 8E
lr A, 7 ; 0861 47
sr 1 ; 0862 12
lr 7, A ; 0863 57
bnz L086A ; 0864 94 05
lm ; 0866 16
li $80 ; 0867 20 80
lr 7, A ; 0869 57
L086A: nm ; 086A 8A
bnz L0873 ; 086B 94 07
com ; 086D 18
outs 1 ; 086E B1
lis 2 ; 086F 72
ns 2 ; 0870 F2
bnz L087D ; 0871 94 0B
L0873: li $60 ; 0873 20 60
outs 0 ; 0875 B0
li $40 ; 0876 20 40
outs 0 ; 0878 B0
L0879: ai $F5 ; 0879 24 F5
bp L0879 ; 087B 81 FD
L087D: ins 4 ; 087D A4
ai $FF ; 087E 24 FF
outs 4 ; 0880 B4
ds 1 ; 0881 31
bnz L0859 ; 0882 94 D6
ins 5 ; 0884 A5
ai $FF ; 0885 24 FF
outs 5 ; 0887 B5
ds 6 ; 0888 36
bnz L0854 ; 0889 94 CA
clr ; 088B 70
outs 0 ; 088C B0
pop ; 088D 1C
;-------------------------------------------------------------------------------
; play_sound_table (confirmed)
; DC0 points to pairs: repetition/group count followed by delay value. A zero
; count terminates. The routine alternates $80 (500 Hz) and $00 on port 5;
; r5 controls both on-time and off-time, while r4/r7 group the pulses.
;-------------------------------------------------------------------------------
L088E: lis 3 ; 088E 73
lr 4, A ; 088F 54
L0890: inc ; 0890 1F
bnz L0890 ; 0891 94 FE
am ; 0893 88
lr 7, A ; 0894 57
bz L08AF ; 0895 84 19
lm ; 0897 16
lr 5, A ; 0898 55
L0899: li $80 ; 0899 20 80
outs 5 ; 089B B5
lr A, 5 ; 089C 45
L089D: inc ; 089D 1F
bnz L089D ; 089E 94 FE
outs 5 ; 08A0 B5
lr A, 5 ; 08A1 45
L08A2: inc ; 08A2 1F
bnz L08A2 ; 08A3 94 FE
ds 4 ; 08A5 34
bnz L0899 ; 08A6 94 F2
lis 3 ; 08A8 73
lr 4, A ; 08A9 54
ds 7 ; 08AA 37
bnz L0899 ; 08AB 94 ED
br L088E ; 08AD 90 E0
L08AF: pop ; 08AF 1C
;-------------------------------------------------------------------------------
; read_controller_a / read_controller_b (strongly likely)
; Select one of two controller I/O paths according to r10 bit 0. The selected
; input is inverted and stored in O73. L08C1 selects the opposite input path.
;-------------------------------------------------------------------------------
L08B0: lis 1 ; 08B0 71
ns $A ; 08B1 FA
bz L08B9 ; 08B2 84 06
L08B4: clr ; 08B4 70
outs 4 ; 08B5 B4
ins 4 ; 08B6 A4
br L08BC ; 08B7 90 04
L08B9: clr ; 08B9 70
outs 1 ; 08BA B1
ins 1 ; 08BB A1
L08BC: com ; 08BC 18
lisu 7 ; 08BD 67
lisl 3 ; 08BE 6B
lr S, A ; 08BF 5C
pop ; 08C0 1C
L08C1: lis 1 ; 08C1 71
ns $A ; 08C2 FA
bz L08B4 ; 08C3 84 F0
br L08B9 ; 08C5 90 F3
;-------------------------------------------------------------------------------
; lookup_table_1268 (confirmed table lookup)
; Index table L1268 from scratchpad state and accumulate variable-length data.
;-------------------------------------------------------------------------------
L08C7: dci L1268 ; 08C7 2A 12 68
lisu 7 ; 08CA 67
lisl 6 ; 08CB 6E
lr A, D ; 08CC 4E
adc ; 08CD 8E
lm ; 08CE 16
adc ; 08CF 8E
lr A, S ; 08D0 4C
com ; 08D1 18
inc ; 08D2 1F
lr 4, A ; 08D3 54
L08D4: lm ; 08D4 16
as 4 ; 08D5 C4
lm ; 08D6 16
bm L08D4 ; 08D7 91 FC
pop ; 08D9 1C
; lookup_table_1297 (confirmed table lookup)
; Parallel lookup using L1297, with a three-byte accumulation stride.
L08DA: dci L1297 ; 08DA 2A 12 97
lisu 7 ; 08DD 67
lisl 6 ; 08DE 6E
lr A, D ; 08DF 4E
adc ; 08E0 8E
lm ; 08E1 16
adc ; 08E2 8E
lr A, S ; 08E3 4C
com ; 08E4 18
inc ; 08E5 1F
lr 4, A ; 08E6 54
L08E7: lm ; 08E7 16
lm ; 08E8 16
as 4 ; 08E9 C4
lm ; 08EA 16
bm L08E7 ; 08EB 91 FB
pop ; 08ED 1C
;-------------------------------------------------------------------------------
; calc_small_index_a (preliminary)
; Return a small class in r5 according to r0 and player/side flag r10 bit 0.
;-------------------------------------------------------------------------------
L08EE: lis 2 ; 08EE 72
lr 5, A ; 08EF 55
lr A, 0 ; 08F0 40
ci 6 ; 08F1 25 06
bm L08F6 ; 08F3 91 02
ds 5 ; 08F5 35
L08F6: lis 1 ; 08F6 71
ns $A ; 08F7 FA
bz L08FB ; 08F8 84 02
ds 5 ; 08FA 35
L08FB: ds 5 ; 08FB 35
pop ; 08FC 1C
; calc_small_index_b (preliminary)
; Return a small class in r5 from the relation between r0 and r4.
L08FD: lis 2 ; 08FD 72
lr 5, A ; 08FE 55
li $F9 ; 08FF 20 F9
as 0 ; 0901 C0
bm L0905 ; 0902 91 02
ds 5 ; 0904 35
L0905: li $F9 ; 0905 20 F9
as 4 ; 0907 C4
bm L090B ; 0908 91 02
ds 5 ; 090A 35
L090B: ds 5 ; 090B 35
pop ; 090C 1C
;-------------------------------------------------------------------------------
; update_motion_or_collision_vector (strongly likely)
; Compare object coordinate pairs stored at $10 + 2*index. The block computes
; absolute differences, applies side/direction flags, and records an event in
; r11 bit 1 when the tested geometric condition is met.
;-------------------------------------------------------------------------------
L090D: lisu 6 ; 090D 66
lisl 5 ; 090E 6D
li $64 ; 090F 20 64
lr I, A ; 0911 5D
lr A, 9 ; 0912 49
lr S, A ; 0913 5C
lisl 4 ; 0914 6C
lr A, 4 ; 0915 44
lr S, A ; 0916 5C
lis 6 ; 0917 76
lr 9, A ; 0918 59
L0919: li $10 ; 0919 20 10
as 8 ; 091B C8
as 8 ; 091C C8
lr IS, A ; 091D 0B
lr A, S ; 091E 4C
lr 7, A ; 091F 57
li $FE ; 0920 20 FE
lr 5, A ; 0922 55
li $10 ; 0923 20 10
as 9 ; 0925 C9
as 9 ; 0926 C9
lr IS, A ; 0927 0B
lr A, 7 ; 0928 47
com ; 0929 18
inc ; 092A 1F
as S ; 092B CC
lr 7, A ; 092C 57
bp L0931 ; 092D 81 03
com ; 092F 18
inc ; 0930 1F
L0931: lr 4, A ; 0931 54
lis 1 ; 0932 71
ns $A ; 0933 FA
bz L093A ; 0934 84 05
lr A, 7 ; 0936 47
com ; 0937 18
inc ; 0938 1F
lr 7, A ; 0939 57
L093A: lr A, 5 ; 093A 45
inc ; 093B 1F
inc ; 093C 1F
lr 5, A ; 093D 55
lr A, 4 ; 093E 44
ai $FD ; 093F 24 FD
lr 4, A ; 0941 54
bp L093A ; 0942 81 F7
lisu 6 ; 0944 66
lisl 7 ; 0945 6F
lis 8 ; 0946 78
ns S ; 0947 FC
bz L094E ; 0948 84 05
lr A, 5 ; 094A 45
com ; 094B 18
inc ; 094C 1F
lr 5, A ; 094D 55
L094E: lis $C ; 094E 7C
ns S ; 094F FC
bnz L0953 ; 0950 94 02
lr 5, A ; 0952 55
L0953: lis 1 ; 0953 71
ns $A ; 0954 FA
bnz L095B ; 0955 94 05
lr A, 5 ; 0957 45
com ; 0958 18
inc ; 0959 1F
lr 5, A ; 095A 55
L095B: clr ; 095B 70
as 7 ; 095C C7
bm L0963 ; 095D 91 05
lr A, 5 ; 095F 45
com ; 0960 18
inc ; 0961 1F
lr 5, A ; 0962 55
L0963: li $11 ; 0963 20 11
as 8 ; 0965 C8
as 8 ; 0966 C8
lr IS, A ; 0967 0B
lr A, S ; 0968 4C
as 5 ; 0969 C5
com ; 096A 18
inc ; 096B 1F
lr 5, A ; 096C 55
li $11 ; 096D 20 11
as 9 ; 096F C9
as 9 ; 0970 C9
lr IS, A ; 0971 0B
lr A, S ; 0972 4C
as 5 ; 0973 C5
bp L0978 ; 0974 81 03
com ; 0976 18
inc ; 0977 1F
L0978: lr 5, A ; 0978 55
com ; 0979 18
lisu 6 ; 097A 66
lisl 5 ; 097B 6D
as S ; 097C CC
bm L09B3 ; 097D 91 35
lr A, 5 ; 097F 45
lr S, A ; 0980 5C
clr ; 0981 70
as 7 ; 0982 C7
bp L09AF ; 0983 81 2B
lr A, $B ; 0985 4B
ni $FD ; 0986 21 FD
lr $B, A ; 0988 5B
li $10 ; 0989 20 10
as 8 ; 098B C8
as 8 ; 098C C8
lr IS, A ; 098D 0B
lr A, S ; 098E 4C
sr 1 ; 098F 12
as S ; 0990 CC
lr 5, A ; 0991 55
lisu 2 ; 0992 62
lisl 6 ; 0993 6E
lr A, S ; 0994 4C
sr 1 ; 0995 12
com ; 0996 18
inc ; 0997 1F
as 5 ; 0998 C5
lr 5, A ; 0999 55
li $10 ; 099A 20 10
as 9 ; 099C C9
as 9 ; 099D C9
lr IS, A ; 099E 0B
lr A, S ; 099F 4C
com ; 09A0 18
inc ; 09A1 1F
as 5 ; 09A2 C5
lr 5, A ; 09A3 55
lis 1 ; 09A4 71
ns $A ; 09A5 FA
bz L09AC ; 09A6 84 05
lr A, 5 ; 09A8 45
com ; 09A9 18
inc ; 09AA 1F
lr 5, A ; 09AB 55
L09AC: ds 5 ; 09AC 35
bp L09B3 ; 09AD 81 05
L09AF: lr A, $B ; 09AF 4B
oi 2 ; 09B0 22 02
lr $B, A ; 09B2 5B
L09B3: ds 9 ; 09B3 39
lr A, 9 ; 09B4 49
ci 3 ; 09B5 25 03
bp L09BC ; 09B7 81 04
jmp L0919 ; 09B9 29 09 19
L09BC: lisu 6 ; 09BC 66
lisl 6 ; 09BD 6E
lr A, S ; 09BE 4C
lr 9, A ; 09BF 59
lisl 4 ; 09C0 6C
lr A, S ; 09C1 4C
lr 4, A ; 09C2 54
pop ; 09C3 1C
;-------------------------------------------------------------------------------
; draw_player_or_marker (strongly likely)
; Save the nested return in K, derive a screen position from O61/O62, and draw
; four component glyphs through L0840. Return through PK.
;-------------------------------------------------------------------------------
L09C4: lr K, P ; 09C4 08
lisu 6 ; 09C5 66
lisl 1 ; 09C6 69
lr A, I ; 09C7 4D
ci $32 ; 09C8 25 32
li $3C ; 09CA 20 3C
bp L09D0 ; 09CC 81 03
li $19 ; 09CE 20 19
L09D0: lr 3, A ; 09D0 53
clr ; 09D1 70
lr 1, A ; 09D2 51
as S ; 09D3 CC
lr 8, A ; 09D4 58
bz L09E4 ; 09D5 84 0E
L09D7: lr A, 8 ; 09D7 48
ai $C4 ; 09D8 24 C4
ci $C3 ; 09DA 25 C3
bnc L09E4 ; 09DC 92 07
lr 8, A ; 09DE 58
lr A, 1 ; 09DF 41
inc ; 09E0 1F
lr 1, A ; 09E1 51
br L09D7 ; 09E2 90 F4
L09E4: lis 7 ; 09E4 77
lr 4, A ; 09E5 54
li $40 ; 09E6 20 40
lr 2, A ; 09E8 52
pi L0840 ; 09E9 28 08 40
lis 4 ; 09EC 74
as 3 ; 09ED C3
lr 3, A ; 09EE 53
lis $A ; 09EF 7A
lr 1, A ; 09F0 51
pi L0840 ; 09F1 28 08 40
lis 3 ; 09F4 73
as 3 ; 09F5 C3
lr 3, A ; 09F6 53
clr ; 09F7 70
L09F8: lr 1, A ; 09F8 51
lr A, 8 ; 09F9 48
ai $F6 ; 09FA 24 F6
bm L0A04 ; 09FC 91 07
lr 8, A ; 09FE 58
lr A, 1 ; 09FF 41
inc ; 0A00 1F
lr 1, A ; 0A01 51
br L09F8 ; 0A02 90 F5
L0A04: pi L0840 ; 0A04 28 08 40
lis 4 ; 0A07 74
as 3 ; 0A08 C3
lr 3, A ; 0A09 53
lr A, 8 ; 0A0A 48
lr 1, A ; 0A0B 51
pi L0840 ; 0A0C 28 08 40
pk ; 0A0F 0C
;-------------------------------------------------------------------------------
; normalize_control_bits (strongly likely)
; Copy direction bits from r7 to r4 and mirror selected bits for the active side.
;-------------------------------------------------------------------------------
L0A10: lr A, 7 ; 0A10 47
lr 4, A ; 0A11 54
lis 1 ; 0A12 71
ns $A ; 0A13 FA
bnz L0A1D ; 0A14 94 08
lis 3 ; 0A16 73
ns 4 ; 0A17 F4
bz L0A1D ; 0A18 84 04
lis 3 ; 0A1A 73
xs 4 ; 0A1B E4
lr 4, A ; 0A1C 54
L0A1D: br L0A24 ; 0A1D 90 06
; read_control_nibble (strongly likely): load low four bits of O73 into r4.
L0A1F: lisu 7 ; 0A1F 67
lisl 3 ; 0A20 6B
lis $F ; 0A21 7F
ns S ; 0A22 FC
lr 4, A ; 0A23 54
;-------------------------------------------------------------------------------
; apply_direction_and_move (strongly likely)
; Decode r4 bits 0-3 into signed horizontal and vertical steps in r3/r6, then
; apply object-, side- and boundary-specific movement rules.
;-------------------------------------------------------------------------------
L0A24: lr K, P ; 0A24 08
clr ; 0A25 70
lr 3, A ; 0A26 53
lr 6, A ; 0A27 56
lis 1 ; 0A28 71
ns 4 ; 0A29 F4
bz L0A2E ; 0A2A 84 03
lis 1 ; 0A2C 71
lr 3, A ; 0A2D 53
L0A2E: lis 2 ; 0A2E 72
ns 4 ; 0A2F F4
bz L0A33 ; 0A30 84 02
ds 3 ; 0A32 33
L0A33: nop ; 0A33 2B
lis 4 ; 0A34 74
ns 4 ; 0A35 F4
bz L0A3A ; 0A36 84 03
lis 1 ; 0A38 71
lr 6, A ; 0A39 56
L0A3A: lis 8 ; 0A3A 78
ns 4 ; 0A3B F4
bz L0A3F ; 0A3C 84 02
ds 6 ; 0A3E 36
L0A3F: clr ; 0A3F 70
as 0 ; 0A40 C0
bnz L0A61 ; 0A41 94 1F
lr A, 6 ; 0A43 46
sl 1 ; 0A44 13
lr 6, A ; 0A45 56
lr A, 3 ; 0A46 43
bz L0A4D ; 0A47 84 05
sl 1 ; 0A49 13
sl 1 ; 0A4A 13
br L0A4F ; 0A4B 90 03
L0A4D: sl 1 ; 0A4D 13
as 3 ; 0A4E C3
L0A4F: lr 3, A ; 0A4F 53
lisu 7 ; 0A50 67
lisl 6 ; 0A51 6E
lr A, D ; 0A52 4E
ci 6 ; 0A53 25 06
bp L0A73 ; 0A55 81 1D
lis 1 ; 0A57 71
ns S ; 0A58 FC
bnz L0A5D ; 0A59 94 03
li $FF ; 0A5B 20 FF
L0A5D: as 6 ; 0A5D C6
lr 6, A ; 0A5E 56
br L0A73 ; 0A5F 90 13
L0A61: lisu 7 ; 0A61 67
lisl 6 ; 0A62 6E
lis 7 ; 0A63 77
xs S ; 0A64 EC
bnz L0A73 ; 0A65 94 0D
lis 3 ; 0A67 73
xs 9 ; 0A68 E9
bnz L0A73 ; 0A69 94 09
lr A, 0 ; 0A6B 40
ci 6 ; 0A6C 25 06
bm L0A73 ; 0A6E 91 04
clr ; 0A70 70
lr 3, A ; 0A71 53
lr 6, A ; 0A72 56
L0A73: lis 2 ; 0A73 72
ns $A ; 0A74 FA
bnz L0A9A ; 0A75 94 24
lr A, 0 ; 0A77 40
ci 6 ; 0A78 25 06
bp L0A9A ; 0A7A 81 1F
ci $C ; 0A7C 25 0C
bm L0A9A ; 0A7E 91 1B
lis 3 ; 0A80 73
xs 9 ; 0A81 E9
bnz L0A89 ; 0A82 94 06
li $20 ; 0A84 20 20
ns $A ; 0A86 FA
bz L0A9A ; 0A87 84 12
L0A89: lisl 4 ; 0A89 6C
lr A, S ; 0A8A 4C
sl 4 ; 0A8B 15
sl 1 ; 0A8C 13
as S ; 0A8D CC
ai $73 ; 0A8E 24 73
lr S, A ; 0A90 5C
lr A, S ; 0A91 4C
sr 4 ; 0A92 14
sr 1 ; 0A93 12
sr 1 ; 0A94 12
bnz L0A9A ; 0A95 94 04
lr A, 3 ; 0A97 43
sl 1 ; 0A98 13
lr 3, A ; 0A99 53
;-------------------------------------------------------------------------------
; Central object/collision pass (strongly likely)
; Iterate two-byte object records, test position limits and collisions, and set
; event bits in r11. O53/O54 hold a temporary coordinate pair.
;-------------------------------------------------------------------------------
L0A9A: clr ; 0A9A 70
lr $B, A ; 0A9B 5B
L0A9C: pi L0812 ; 0A9C 28 08 12
lr A, I ; 0A9F 4D
as 3 ; 0AA0 C3
lr 1, A ; 0AA1 51
lr A, S ; 0AA2 4C
as 6 ; 0AA3 C6
lisu 5 ; 0AA4 65
lisl 3 ; 0AA5 6B
lr 2, A ; 0AA6 52
lr D, A ; 0AA7 5E
lr A, 1 ; 0AA8 41
lr I, A ; 0AA9 5D
lr A, D ; 0AAA 4E
ci $F ; 0AAB 25 0F
bp L0AB3 ; 0AAD 81 05
ci $35 ; 0AAF 25 35
bp L0AD2 ; 0AB1 81 20
L0AB3: clr ; 0AB3 70
as 0 ; 0AB4 C0
bz L0ACE ; 0AB5 84 18
lisu 5 ; 0AB7 65
lisl 4 ; 0AB8 6C
ci 5 ; 0AB9 25 05
bnz L0AC2 ; 0ABB 94 06
lis $C ; 0ABD 7C
xs S ; 0ABE EC
lr S, A ; 0ABF 5C
br L0ACA ; 0AC0 90 09
L0AC2: ci 6 ; 0AC2 25 06
bnz L0ACA ; 0AC4 94 05
li $C0 ; 0AC6 20 C0
xs S ; 0AC8 EC
lr S, A ; 0AC9 5C
L0ACA: clr ; 0ACA 70
lr 6, A ; 0ACB 56
br L0A9C ; 0ACC 90 CF
L0ACE: lr A, $B ; 0ACE 4B
oi $10 ; 0ACF 22 10
lr $B, A ; 0AD1 5B
L0AD2: lr A, 1 ; 0AD2 41
ci $A ; 0AD3 25 0A
bp L0ADB ; 0AD5 81 05
ci $5F ; 0AD7 25 5F
bp L0AF5 ; 0AD9 81 1B
L0ADB: clr ; 0ADB 70
as 0 ; 0ADC C0
bnz L0AE5 ; 0ADD 94 07
lr A, $B ; 0ADF 4B
oi $40 ; 0AE0 22 40
lr $B, A ; 0AE2 5B
br L0AF5 ; 0AE3 90 11
L0AE5: lr A, 0 ; 0AE5 40
ci 5 ; 0AE6 25 05
lisu 5 ; 0AE8 65
lisl 4 ; 0AE9 6C
bnz L0AF1 ; 0AEA 94 06
lis 3 ; 0AEC 73
xs S ; 0AED EC
lr S, A ; 0AEE 5C
br L0AF1 ; 0AEF 90 01
L0AF1: clr ; 0AF1 70
lr 3, A ; 0AF2 53
br L0A9C ; 0AF3 90 A8
L0AF5: lis 8 ; 0AF5 78
ns $A ; 0AF6 FA
lis 1 ; 0AF7 71
bz L0AFB ; 0AF8 84 02
clr ; 0AFA 70
L0AFB: lr 4, A ; 0AFB 54
L0AFC: lr A, 4 ; 0AFC 44
xs 0 ; 0AFD E0
bz L0B0B ; 0AFE 84 0C
li $10 ; 0B00 20 10
as 4 ; 0B02 C4
as 4 ; 0B03 C4
lr IS, A ; 0B04 0B
lis 2 ; 0B05 72
as I ; 0B06 CD
com ; 0B07 18
as 1 ; 0B08 C1
bm L0B0E ; 0B09 91 04
L0B0B: jmp L0BB1 ; 0B0B 29 0B B1
L0B0E: ai 5 ; 0B0E 24 05
bm L0B0B ; 0B10 91 FA
lis 2 ; 0B12 72
as I ; 0B13 CD
com ; 0B14 18
as 2 ; 0B15 C2
bp L0B0B ; 0B16 81 F4
ai 5 ; 0B18 24 05
bm L0B0B ; 0B1A 91 F0
lr A, 0 ; 0B1C 40
lr 8, A ; 0B1D 58
lr A, 9 ; 0B1E 49
xs 4 ; 0B1F E4
bz L0B28 ; 0B20 84 07
lr A, 4 ; 0B22 44
lr 8, A ; 0B23 58
lr A, 9 ; 0B24 49
xs 0 ; 0B25 E0
bnz L0B8E ; 0B26 94 67
L0B28: clr ; 0B28 70
as 9 ; 0B29 C9
bnz L0B81 ; 0B2A 94 56
lr A, $B ; 0B2C 4B
ni $FD ; 0B2D 21 FD
lr $B, A ; 0B2F 5B
lisu 7 ; 0B30 67
lisl 6 ; 0B31 6E
lr A, D ; 0B32 4E
ci 6 ; 0B33 25 06
bp L0B55 ; 0B35 81 1F
lr A, S ; 0B37 4C
com ; 0B38 18
inc ; 0B39 1F
lisl 1 ; 0B3A 69
as S ; 0B3B CC
bp L0B0B ; 0B3C 81 CE
lr A, 8 ; 0B3E 48
ci 6 ; 0B3F 25 06
lr A, $B ; 0B41 4B
bm L0B49 ; 0B42 91 06
oi $E ; 0B44 22 0E
lr $B, A ; 0B46 5B
br L0B4E ; 0B47 90 06
L0B49: oi $A ; 0B49 22 0A
lr $B, A ; 0B4B 5B
lr A, 8 ; 0B4C 48
lr 9, A ; 0B4D 59
L0B4E: lr A, $A ; 0B4E 4A
oi 2 ; 0B4F 22 02
lr $A, A ; 0B51 5A
jmp L0BBC ; 0B52 29 0B BC
L0B55: lr A, 8 ; 0B55 48
ci 3 ; 0B56 25 03
bp L0B0B ; 0B58 81 B2
ci $A ; 0B5A 25 0A
bm L0B0B ; 0B5C 91 AE
lr A, $B ; 0B5E 4B
oi 2 ; 0B5F 22 02
lr $B, A ; 0B61 5B
lr A, 8 ; 0B62 48
ci 6 ; 0B63 25 06
bp L0B6E ; 0B65 81 08
pi L090D ; 0B67 28 09 0D
lis 2 ; 0B6A 72
ns $B ; 0B6B FB
bz L0BB1 ; 0B6C 84 44
L0B6E: lr A, 8 ; 0B6E 48
lr 9, A ; 0B6F 59
lr A, $B ; 0B70 4B
oi 8 ; 0B71 22 08
ni $FE ; 0B73 21 FE
lr $B, A ; 0B75 5B
lr A, 8 ; 0B76 48
ci 6 ; 0B77 25 06
bp L0B7F ; 0B79 81 05
lr A, $A ; 0B7B 4A
oi 2 ; 0B7C 22 02
lr $A, A ; 0B7E 5A
L0B7F: br L0BBC ; 0B7F 90 3C
L0B81: pi L08FD ; 0B81 28 08 FD
bnz L0B8E ; 0B84 94 09
lr A, $B ; 0B86 4B
oi 4 ; 0B87 22 04
ni $FE ; 0B89 21 FE
lr $B, A ; 0B8B 5B
br L0BBC ; 0B8C 90 2F
L0B8E: lr A, $B ; 0B8E 4B
oi 1 ; 0B8F 22 01
lr $B, A ; 0B91 5B
lr A, 3 ; 0B92 43
ci 1 ; 0B93 25 01
bp L0B9A ; 0B95 81 04
lis 1 ; 0B97 71
br L0BA0 ; 0B98 90 07
L0B9A: ci $FE ; 0B9A 25 FE
bm L0BA4 ; 0B9C 91 07
li $FF ; 0B9E 20 FF
L0BA0: lr 3, A ; 0BA0 53
L0BA1: jmp L0A9A ; 0BA1 29 0A 9A
L0BA4: pi L08FD ; 0BA4 28 08 FD
bz L0BB1 ; 0BA7 84 09
clr ; 0BA9 70
as 6 ; 0BAA C6
bz L0BBC ; 0BAB 84 10
clr ; 0BAD 70
lr 6, A ; 0BAE 56
br L0BA1 ; 0BAF 90 F1
L0BB1: lr A, 4 ; 0BB1 44
inc ; 0BB2 1F
lr 4, A ; 0BB3 54
ci $C ; 0BB4 25 0C
bm L0BBC ; 0BB6 91 05
jmp L0AFC ; 0BB8 29 0A FC
;-------------------------------------------------------------------------------
; Scene/state update entry (preliminary)
; Preserve nested return in K, redraw changed objects, update packed state and
; dispatch event sound or phase transitions.
;-------------------------------------------------------------------------------
L0BBB: lr K, P ; 0BBB 08
L0BBC: lis 8 ; 0BBC 78
ns $B ; 0BBD FB
bz L0BC9 ; 0BBE 84 0A
lr A, $A ; 0BC0 4A
ni $F7 ; 0BC1 21 F7
lr $A, A ; 0BC3 5A
lisu 2 ; 0BC4 62
lisl 0 ; 0BC5 68
pi L082C ; 0BC6 28 08 2C
L0BC9: pi L0812 ; 0BC9 28 08 12
pi L082C ; 0BCC 28 08 2C
li $58 ; 0BCF 20 58
lr 3, A ; 0BD1 53
pi L0812 ; 0BD2 28 08 12
lr A, I ; 0BD5 4D
ci $53 ; 0BD6 25 53
bm L0BE1 ; 0BD8 91 08
ci $17 ; 0BDA 25 17
bm L0BEC ; 0BDC 91 0F
li $12 ; 0BDE 20 12
lr 3, A ; 0BE0 53
L0BE1: lr A, S ; 0BE1 4C
lr 4, A ; 0BE2 54
ds 4 ; 0BE3 34
lis 1 ; 0BE4 71
lr 5, A ; 0BE5 55
li $41 ; 0BE6 20 41
lr 2, A ; 0BE8 52
pi L083C ; 0BE9 28 08 3C
L0BEC: li $80 ; 0BEC 20 80
lr 2, A ; 0BEE 52
dci L1331 ; 0BEF 2A 13 31
pi L08EE ; 0BF2 28 08 EE
bz L0BFC ; 0BF5 84 06
clr ; 0BF7 70
lr 2, A ; 0BF8 52
dci L132F ; 0BF9 2A 13 2F
L0BFC: clr ; 0BFC 70
as 0 ; 0BFD C0
bnz L0C0A ; 0BFE 94 0B
dci L132D ; 0C00 2A 13 2D
lis 8 ; 0C03 78
ns $B ; 0C04 FB
bz L0C0A ; 0C05 84 04
jmp L0C96 ; 0C07 29 0C 96
L0C0A: lr A, 9 ; 0C0A 49
com ; 0C0B 18
inc ; 0C0C 1F
as 0 ; 0C0D C0
bnz L0C13 ; 0C0E 94 04
li $40 ; 0C10 20 40
lr 2, A ; 0C12 52
L0C13: lisu 5 ; 0C13 65
lisl 2 ; 0C14 6A
lr A, I ; 0C15 4D
lr 3, A ; 0C16 53
lr A, S ; 0C17 4C
lr 4, A ; 0C18 54
lis 1 ; 0C19 71
ns $B ; 0C1A FB
bnz L0C24 ; 0C1B 94 08
pi L0812 ; 0C1D 28 08 12
lr A, 3 ; 0C20 43
lr I, A ; 0C21 5D
lr A, 4 ; 0C22 44
lr D, A ; 0C23 5E
L0C24: pi L0812 ; 0C24 28 08 12
pi L082F ; 0C27 28 08 2F
li $40 ; 0C2A 20 40
ns $B ; 0C2C FB
bz L0C5C ; 0C2D 84 2E
lisu 7 ; 0C2F 67
lisl 6 ; 0C30 6E
lr A, S ; 0C31 4C
ci 6 ; 0C32 25 06
bp L0C68 ; 0C34 81 33
ci 7 ; 0C36 25 07
bz L0C44 ; 0C38 84 0B
L0C3A: lr A, $B ; 0C3A 4B
oi 6 ; 0C3B 22 06
lr $B, A ; 0C3D 5B
br L0C96 ; 0C3E 90 57
.byte $5C, $29, $0E, $16 ; 0C40
L0C44: lisu 2 ; 0C44 62
lisl 1 ; 0C45 69
lr A, S ; 0C46 4C
ci $26 ; 0C47 25 26
bm L0C3A ; 0C49 91 F0
ci $1A ; 0C4B 25 1A
bp L0C3A ; 0C4D 81 EC
lisu 2 ; 0C4F 62
lisl 0 ; 0C50 68
lr A, S ; 0C51 4C
ci $32 ; 0C52 25 32
lis $B ; 0C54 7B
bm L0C58 ; 0C55 91 02
lis 3 ; 0C57 73
L0C58: lr 9, A ; 0C58 59
jmp L0D1C ; 0C59 29 0D 1C
L0C5C: li $10 ; 0C5C 20 10
ns $B ; 0C5E FB
bz L0C96 ; 0C5F 84 36
lisu 7 ; 0C61 67
lisl 6 ; 0C62 6E
lr A, S ; 0C63 4C
ci 6 ; 0C64 25 06
bm L0C3A ; 0C66 91 D3
L0C68: li $10 ; 0C68 20 10
ns $A ; 0C6A FA
bnz L0C93 ; 0C6B 94 27
L0C6D: dci L137A ; 0C6D 2A 13 7A
pi L088E ; 0C70 28 08 8E
lis 1 ; 0C73 71
ns $A ; 0C74 FA
lisu 6 ; 0C75 66
lisl 1 ; 0C76 69
lr A, S ; 0C77 4C
bz L0C87 ; 0C78 84 0E
ci $26 ; 0C7A 25 26
bp L0C82 ; 0C7C 81 05
ai $F6 ; 0C7E 24 F6
br L0C92 ; 0C80 90 11
L0C82: ai $12 ; 0C82 24 12
sr 1 ; 0C84 12
br L0C92 ; 0C85 90 0C
L0C87: ci $44 ; 0C87 25 44
bm L0C8F ; 0C89 91 05
ai $A ; 0C8B 24 0A
br L0C92 ; 0C8D 90 04
L0C8F: ai $58 ; 0C8F 24 58
sr 1 ; 0C91 12
L0C92: lr S, A ; 0C92 5C
L0C93: jmp L0E68 ; 0C93 29 0E 68
;-------------------------------------------------------------------------------
; play_short_beep_and_update_state (confirmed sound section)
; Select delay data through L1251, wait, pulse $40 (1 kHz) then $00 on port 5.
; The following path continues into event/state processing when required.
;-------------------------------------------------------------------------------
L0C96: nop ; 0C96 2B
dci L1251 ; 0C97 2A 12 51
lisu 7 ; 0C9A 67
lisl 2 ; 0C9B 6A
lr A, S ; 0C9C 4C
adc ; 0C9D 8E
adc ; 0C9E 8E
lm ; 0C9F 16
lr 5, A ; 0CA0 55
lm ; 0CA1 16
L0CA2: inc ; 0CA2 1F
bnz L0CA2 ; 0CA3 94 FE
ds 5 ; 0CA5 35
bnz L0CA2 ; 0CA6 94 FB
li $40 ; 0CA8 20 40
outs 5 ; 0CAA B5
clr ; 0CAB 70
outs 5 ; 0CAC B5
lis 4 ; 0CAD 74
ns $B ; 0CAE FB
bnz L0CB2 ; 0CAF 94 02
pk ; 0CB1 0C
L0CB2: dci L1381 ; 0CB2 2A 13 81
pi L088E ; 0CB5 28 08 8E
li $10 ; 0CB8 20 10
as 9 ; 0CBA C9
as 9 ; 0CBB C9
lr IS, A ; 0CBC 0B
lr A, S ; 0CBD 4C
lisu 6 ; 0CBE 66
lisl 1 ; 0CBF 69
inc ; 0CC0 1F
lr S, A ; 0CC1 5C
lr A, $B ; 0CC2 4B
ni $FB ; 0CC3 21 FB
lr $B, A ; 0CC5 5B
lis 1 ; 0CC6 71
ns $A ; 0CC7 FA
bz L0CCD ; 0CC8 84 04
lis 4 ; 0CCA 74
as $B ; 0CCB CB
lr $B, A ; 0CCC 5B
L0CCD: lis 2 ; 0CCD 72
ns $A ; 0CCE FA
bz L0CD4 ; 0CCF 84 04
lis 4 ; 0CD1 74
xs $B ; 0CD2 EB
lr $B, A ; 0CD3 5B
L0CD4: lis 4 ; 0CD4 74
ns $B ; 0CD5 FB
bz L0CF9 ; 0CD6 84 22
lr A, S ; 0CD8 4C
ci $58 ; 0CD9 25 58
bm L0D13 ; 0CDB 91 37
ci $11 ; 0CDD 25 11
bm L0CE8 ; 0CDF 91 08
lis 2 ; 0CE1 72
ns $A ; 0CE2 FA
bz L0CF2 ; 0CE3 84 0E
li $21 ; 0CE5 20 21
L0CE7: lr S, A ; 0CE7 5C
L0CE8: lis 2 ; 0CE8 72
ns $A ; 0CE9 FA
bnz L0CEF ; 0CEA 94 04
jmp L0E68 ; 0CEC 29 0E 68
L0CEF: jmp L0E16 ; 0CEF 29 0E 16
L0CF2: li $49 ; 0CF2 20 49
lr S, A ; 0CF4 5C
lis 2 ; 0CF5 72
L0CF6: lr 9, A ; 0CF6 59
br L0D27 ; 0CF7 90 2F
L0CF9: ds S ; 0CF9 3C
ds S ; 0CFA 3C
lr A, S ; 0CFB 4C
ci $11 ; 0CFC 25 11
bp L0D10 ; 0CFE 81 11
ci $58 ; 0D00 25 58
bp L0CE7 ; 0D02 81 E4
lis 2 ; 0D04 72
ns $A ; 0D05 FA
li $49 ; 0D06 20 49
bnz L0CE7 ; 0D08 94 DE
li $21 ; 0D0A 20 21
lr S, A ; 0D0C 5C
lis $A ; 0D0D 7A
br L0CF6 ; 0D0E 90 E7
L0D10: lis 7 ; 0D10 77
br L0D14 ; 0D11 90 02
L0D13: lis $F ; 0D13 7F
L0D14: lr 9, A ; 0D14 59
lis 2 ; 0D15 72
ns $A ; 0D16 FA
bz L0D1C ; 0D17 84 04
lis 1 ; 0D19 71
xs $A ; 0D1A EA
lr $A, A ; 0D1B 5A
L0D1C: lis 8 ; 0D1C 78
ns 9 ; 0D1D F9
lisu 6 ; 0D1E 66
lisl 1 ; 0D1F 69
li $49 ; 0D20 20 49
bnz L0D26 ; 0D22 94 03
li $21 ; 0D24 20 21
L0D26: lr S, A ; 0D26 5C
L0D27: dci L13CF ; 0D27 2A 13 CF
pi L088E ; 0D2A 28 08 8E
jmp L0E18 ; 0D2D 29 0E 18
;-------------------------------------------------------------------------------
; direction_from_coordinate_delta (strongly likely)
; Compare coordinate pair r9 with pair r0, form absolute X/Y differences and
; encode horizontal direction as 1/2 and vertical direction as 4/8 in r4.
;-------------------------------------------------------------------------------
L0D30: li $10 ; 0D30 20 10
as 9 ; 0D32 C9
as 9 ; 0D33 C9
lr IS, A ; 0D34 0B
lr A, I ; 0D35 4D
lr 5, A ; 0D36 55
lr A, S ; 0D37 4C
lr 6, A ; 0D38 56
li $10 ; 0D39 20 10
as 0 ; 0D3B C0
as 0 ; 0D3C C0
lr IS, A ; 0D3D 0B
lr A, I ; 0D3E 4D
com ; 0D3F 18
inc ; 0D40 1F
as 5 ; 0D41 C5
lr 5, A ; 0D42 55
bp L0D47 ; 0D43 81 03
com ; 0D45 18
inc ; 0D46 1F
L0D47: lr 4, A ; 0D47 54
lr A, S ; 0D48 4C
com ; 0D49 18
inc ; 0D4A 1F
as 6 ; 0D4B C6
lr 6, A ; 0D4C 56
bp L0D51 ; 0D4D 81 03
com ; 0D4F 18
inc ; 0D50 1F
L0D51: lr 3, A ; 0D51 53
com ; 0D52 18
inc ; 0D53 1F
as 4 ; 0D54 C4
clr ; 0D55 70
bm L0D5F ; 0D56 91 08
as 5 ; 0D58 C5
lis 1 ; 0D59 71
bp L0D5D ; 0D5A 81 02
lis 2 ; 0D5C 72
L0D5D: br L0D64 ; 0D5D 90 06
L0D5F: as 6 ; 0D5F C6
lis 4 ; 0D60 74
bp L0D64 ; 0D61 81 02
lis 8 ; 0D63 78
L0D64: lr 4, A ; 0D64 54
br L0D83 ; 0D65 90 1D
L0D67: li $10 ; 0D67 20 10
as 0 ; 0D69 C0
as 0 ; 0D6A C0
lr IS, A ; 0D6B 0B
lr A, I ; 0D6C 4D
com ; 0D6D 18
inc ; 0D6E 1F
as 5 ; 0D6F C5
bz L0D76 ; 0D70 84 05
lis 2 ; 0D72 72
bm L0D76 ; 0D73 91 02
lis 1 ; 0D75 71
L0D76: lr 4, A ; 0D76 54
lr A, S ; 0D77 4C
com ; 0D78 18
inc ; 0D79 1F
as 6 ; 0D7A C6
bz L0D81 ; 0D7B 84 05
lis 8 ; 0D7D 78
bm L0D81 ; 0D7E 91 02
lis 4 ; 0D80 74
L0D81: as 4 ; 0D81 C4
lr 4, A ; 0D82 54
L0D83: jmp L0A24 ; 0D83 29 0A 24
;-------------------------------------------------------------------------------
; choose_direction_step (strongly likely)
; Produce small signed steps, normally 0, 4 or $FC (-4), from side, state and
; current object coordinates; continue through the direction decoder.
;-------------------------------------------------------------------------------
L0D86: clr ; 0D86 70
lr 5, A ; 0D87 55
lr 6, A ; 0D88 56
as 2 ; 0D89 C2
ci 0 ; 0D8A 25 00
bnz L0D98 ; 0D8C 94 0B
lis 1 ; 0D8E 71
ns $A ; 0D8F FA
lis 4 ; 0D90 74
bnz L0D95 ; 0D91 94 03
li $FC ; 0D93 20 FC
L0D95: lr 5, A ; 0D95 55
br L0DA6 ; 0D96 90 0F
L0D98: li $11 ; 0D98 20 11
as 7 ; 0D9A C7
as 7 ; 0D9B C7
lr IS, A ; 0D9C 0B
lr A, S ; 0D9D 4C
ci $23 ; 0D9E 25 23
li $FC ; 0DA0 20 FC
bm L0DA5 ; 0DA2 91 02
lis 4 ; 0DA4 74
L0DA5: lr 6, A ; 0DA5 56
L0DA6: li $10 ; 0DA6 20 10
as 7 ; 0DA8 C7
as 7 ; 0DA9 C7
lr IS, A ; 0DAA 0B
lr A, I ; 0DAB 4D
as 5 ; 0DAC C5
lr 5, A ; 0DAD 55
lr A, S ; 0DAE 4C
as 6 ; 0DAF C6
lr 6, A ; 0DB0 56
br L0D67 ; 0DB1 90 B5
;-------------------------------------------------------------------------------
; lookup_state_table_125d (strongly likely)
; Replace the current scratchpad state through L125D and choose r0=6 or 12 from
; ISAR parity before entering the nested update worker.
;-------------------------------------------------------------------------------
L0DB3: dci L125D ; 0DB3 2A 12 5D
lr A, S ; 0DB6 4C
adc ; 0DB7 8E
lm ; 0DB8 16
lr S, A ; 0DB9 5C
lr A, IS ; 0DBA 0A
ni 1 ; 0DBB 21 01
lis $C ; 0DBD 7C
bnz L0DC1 ; 0DBE 94 02
lis 6 ; 0DC0 76
L0DC1: lr 0, A ; 0DC1 50
lisu 6 ; 0DC2 66
lisl 7 ; 0DC3 6F
clr ; 0DC4 70
lr S, A ; 0DC5 5C
; nested_state_update (strongly likely)
; Save the caller return from K in Q, process state/formation tables L1313 or
; L12FB, and return explicitly with LR P0,Q at L0E15.
L0DC6: lr K, P ; 0DC6 08
lr A, KU ; 0DC7 00
lr QU, A ; 0DC8 06
lr A, KL ; 0DC9 01
lr QL, A ; 0DCA 07
L0DCB: dci L1313 ; 0DCB 2A 13 13
lisu 6 ; 0DCE 66
lisl 1 ; 0DCF 69
lr A, S ; 0DD0 4C
lr 6, A ; 0DD1 56
lisu 6 ; 0DD2 66
lisl 7 ; 0DD3 6F
lis 4 ; 0DD4 74
ns S ; 0DD5 FC
bz L0DEB ; 0DD6 84 14
dci L12FB ; 0DD8 2A 12 FB
lr A, 0 ; 0DDB 40
ci 6 ; 0DDC 25 06
bm L0DEB ; 0DDE 91 0C
lis $C ; 0DE0 7C
adc ; 0DE1 8E
lis 1 ; 0DE2 71
ns $A ; 0DE3 FA
li $F6 ; 0DE4 20 F6
bnz L0DE9 ; 0DE6 94 02
lis $A ; 0DE8 7A
L0DE9: as 6 ; 0DE9 C6
lr 6, A ; 0DEA 56
L0DEB: lisu 5 ; 0DEB 65
lisl 3 ; 0DEC 6B
lr A, 0 ; 0DED 40
adc ; 0DEE 8E
adc ; 0DEF 8E
lm ; 0DF0 16
lr D, A ; 0DF1 5E
pi L08EE ; 0DF2 28 08 EE
lm ; 0DF5 16
bz L0DFA ; 0DF6 84 03
com ; 0DF8 18
inc ; 0DF9 1F
L0DFA: as 6 ; 0DFA C6
L0DFB: lr S, A ; 0DFB 5C
ci $C ; 0DFC 25 0C
bp L0E06 ; 0DFE 81 07
ci $5E ; 0E00 25 5E
bp L0E09 ; 0E02 81 06
ai $FE ; 0E04 24 FE
L0E06: inc ; 0E06 1F
br L0DFB ; 0E07 90 F3
L0E09: clr ; 0E09 70
lr $B, A ; 0E0A 5B
pi L0BBB ; 0E0B 28 0B BB
ds 0 ; 0E0E 30
bz L0E15 ; 0E0F 84 05
lis 6 ; 0E11 76
xs 0 ; 0E12 E0
bnz L0DCB ; 0E13 94 B7
L0E15: lr P0, Q ; 0E15 0D
;-------------------------------------------------------------------------------
; start_round_or_screen (strongly likely)
; Reset phase-local state, toggle r10 bit 0, draw fixed screen components, and
; initialize players/objects for the next side or round.
;-------------------------------------------------------------------------------
L0E16: clr ; 0E16 70
lr 9, A ; 0E17 59
L0E18: lis 1 ; 0E18 71
xs $A ; 0E19 EA
lr $A, A ; 0E1A 5A
lisu 6 ; 0E1B 66
lisl 0 ; 0E1C 68
clr ; 0E1D 70
lr S, A ; 0E1E 5C
; draw_fixed_screen_element: render parameter block L135F through L0820.
L0E1F: dci L135F ; 0E1F 2A 13 5F
pi L0820 ; 0E22 28 08 20
L0E25: lisu 5 ; 0E25 65
lisl 6 ; 0E26 6E
li $12 ; 0E27 20 12
lr 4, A ; 0E29 54
li $1B ; 0E2A 20 1B
lr 3, A ; 0E2C 53
clr ; 0E2D 70
lr 2, A ; 0E2E 52
L0E2F: lr A, S ; 0E2F 4C
sr 4 ; 0E30 14
lr 1, A ; 0E31 51
pi L0840 ; 0E32 28 08 40
lr A, I ; 0E35 4D
sl 4 ; 0E36 15
sr 4 ; 0E37 14
lr 1, A ; 0E38 51
lis 5 ; 0E39 75
as 3 ; 0E3A C3
lr 3, A ; 0E3B 53
pi L0840 ; 0E3C 28 08 40
li $43 ; 0E3F 20 43
lr 3, A ; 0E41 53
li $80 ; 0E42 20 80
lr 2, A ; 0E44 52
lr A, IS ; 0E45 0A
ci $2F ; 0E46 25 2F
bz L0E2F ; 0E48 84 E6
lis 7 ; 0E4A 77
ns 9 ; 0E4B F9
bz L0E60 ; 0E4C 84 13
ds 9 ; 0E4E 39
lis 8 ; 0E4F 78
ns 9 ; 0E50 F9
lisl 6 ; 0E51 6E
bnz L0E55 ; 0E52 94 02
lr A, I ; 0E54 4D
L0E55: li $67 ; 0E55 20 67
outs 5 ; 0E57 B5
lr 5, A ; 0E58 55
asd S ; 0E59 DC
lr S, A ; 0E5A 5C
pi L0818 ; 0E5B 28 08 18
br L0E25 ; 0E5E 90 C6
L0E60: lis 2 ; 0E60 72
lr 4, A ; 0E61 54
L0E62: pi L0818 ; 0E62 28 08 18
ds 4 ; 0E65 34
bnz L0E62 ; 0E66 94 FB
;-------------------------------------------------------------------------------
; advance_init_phase (confirmed counter behavior)
; Increment O60 and repeat initialization while the phase value is below four.
; After phase four, build the field and initialize active play state.
;-------------------------------------------------------------------------------
L0E68: lisu 6 ; 0E68 66
lisl 0 ; 0E69 68
lr A, S ; 0E6A 4C
inc ; 0E6B 1F
lr S, A ; 0E6C 5C
ci 4 ; 0E6D 25 04
bm L0E16 ; 0E6F 91 A6
lis 2 ; 0E71 72
lr 4, A ; 0E72 54
L0E73: pi L0818 ; 0E73 28 08 18
ds 4 ; 0E76 34
bnz L0E73 ; 0E77 94 FB
lisu 2 ; 0E79 62
lisl 0 ; 0E7A 68
pi L082C ; 0E7B 28 08 2C
dci L1333 ; 0E7E 2A 13 33
lis 8 ; 0E81 78
lr 8, A ; 0E82 58
L0E83: pi L0820 ; 0E83 28 08 20
ds 8 ; 0E86 38
bnz L0E83 ; 0E87 94 FB
L0E89: lis $D ; 0E89 7D
lr 4, A ; 0E8A 54
lis 2 ; 0E8B 72
lr 6, A ; 0E8C 56
pi L084A ; 0E8D 28 08 4A
li $37 ; 0E90 20 37
lr 4, A ; 0E92 54
lis 2 ; 0E93 72
lr 6, A ; 0E94 56
pi L084A ; 0E95 28 08 4A
lis 7 ; 0E98 77
as 3 ; 0E99 C3
lr 3, A ; 0E9A 53
ci $55 ; 0E9B 25 55
bp L0E89 ; 0E9D 81 EB
lis 2 ; 0E9F 72
lr 9, A ; 0EA0 59
lr A, $A ; 0EA1 4A
ni $C5 ; 0EA2 21 C5
lr $A, A ; 0EA4 5A
lisu 6 ; 0EA5 66
lisl 1 ; 0EA6 69
lr A, D ; 0EA7 4E
lr 3, A ; 0EA8 53
ds 3 ; 0EA9 33
lis 7 ; 0EAA 77
lr 4, A ; 0EAB 54
lis 1 ; 0EAC 71
ns $A ; 0EAD FA
lr $A, A ; 0EAE 5A
clr ; 0EAF 70
bnz L0EB4 ; 0EB0 94 03
li $80 ; 0EB2 20 80
L0EB4: lr 2, A ; 0EB4 52
lr A, S ; 0EB5 4C
lr 1, A ; 0EB6 51
pi L0840 ; 0EB7 28 08 40
pi L09C4 ; 0EBA 28 09 C4
clr ; 0EBD 70
as S ; 0EBE CC
bnz L0ED1 ; 0EBF 94 11
li $F0 ; 0EC1 20 F0
lr S, A ; 0EC3 5C
dci L1392 ; 0EC4 2A 13 92
pi L088E ; 0EC7 28 08 8E
lisl 0 ; 0ECA 68
ds S ; 0ECB 3C
clr ; 0ECC 70
lr 9, A ; 0ECD 59
jmp L0E1F ; 0ECE 29 0E 1F
L0ED1: lisu 2 ; 0ED1 62
lisl 0 ; 0ED2 68
L0ED3: lis 4 ; 0ED3 74
lr S, A ; 0ED4 5C
lr A, IS ; 0ED5 0A
inc ; 0ED6 1F
lr IS, A ; 0ED7 0B
ci $2A ; 0ED8 25 2A
bnz L0ED3 ; 0EDA 94 F8
lis $C ; 0EDC 7C
lr 0, A ; 0EDD 50
lisu 6 ; 0EDE 66
lisl 7 ; 0EDF 6F
lis 4 ; 0EE0 74
lr S, A ; 0EE1 5C
pi L0DC6 ; 0EE2 28 0D C6
pi L0DC6 ; 0EE5 28 0D C6
lisu 7 ; 0EE8 67
lisl 6 ; 0EE9 6E
li $C0 ; 0EEA 20 C0
lr I, A ; 0EEC 5D
lr D, A ; 0EED 5E
lisu 2 ; 0EEE 62
lisl 0 ; 0EEF 68
li $60 ; 0EF0 20 60
lr S, A ; 0EF2 5C
;-------------------------------------------------------------------------------
; main_game_loop (strongly likely)
; Alternate controller sources, debounce console input, update active objects,
; evaluate state transitions and invoke the table-driven update worker.
;-------------------------------------------------------------------------------
L0EF3: lisu 7 ; 0EF3 67
lisl 6 ; 0EF4 6E
L0EF5: li $B0 ; 0EF5 20 B0
L0EF7: inc ; 0EF7 1F
bnz L0EF7 ; 0EF8 94 FE
lis 1 ; 0EFA 71
lr 4, A ; 0EFB 54
L0EFC: lr A, IS ; 0EFC 0A
xi 1 ; 0EFD 23 01
lr IS, A ; 0EFF 0B
lr A, IS ; 0F00 0A
lr 7, A ; 0F01 57
ni 1 ; 0F02 21 01
bnz L0F0B ; 0F04 94 06
pi L08B0 ; 0F06 28 08 B0
br L0F0E ; 0F09 90 04
L0F0B: pi L08C1 ; 0F0B 28 08 C1
L0F0E: lr A, D ; 0F0E 4E
lr 6, A ; 0F0F 56
clr ; 0F10 70
as S ; 0F11 CC
bnz L0F22 ; 0F12 94 0F
lis 5 ; 0F14 75
lr 5, A ; 0F15 55
ins 0 ; 0F16 A0
com ; 0F17 18
ni $F ; 0F18 21 0F
bz L0F22 ; 0F1A 84 07
L0F1C: ds 5 ; 0F1C 35
sr 1 ; 0F1D 12
bnz L0F1C ; 0F1E 94 FD
lr A, 5 ; 0F20 45
lr S, A ; 0F21 5C
L0F22: lr A, 7 ; 0F22 47
lr IS, A ; 0F23 0B
lr A, S ; 0F24 4C
ni $C0 ; 0F25 21 C0
bnz L0F33 ; 0F27 94 0B
ds 4 ; 0F29 34
bnz L0F8E ; 0F2A 94 63
li $CE ; 0F2C 20 CE
L0F2E: inc ; 0F2E 1F
bnz L0F2E ; 0F2F 94 FE
br L0EFC ; 0F31 90 CA
L0F33: lisu 7 ; 0F33 67
lisl 4 ; 0F34 6C
ds S ; 0F35 3C
clr ; 0F36 70
lisu 2 ; 0F37 62
lisl 0 ; 0F38 68
as S ; 0F39 CC
bnz L0F52 ; 0F3A 94 17
lr A, 7 ; 0F3C 47
lr IS, A ; 0F3D 0B
ni 1 ; 0F3E 21 01
bz L0F49 ; 0F40 84 08
lr A, D ; 0F42 4E
li $C0 ; 0F43 20 C0
ns S ; 0F45 FC
lr A, I ; 0F46 4D
bnz L0EF5 ; 0F47 94 AD
L0F49: lr A, S ; 0F49 4C
ni $C0 ; 0F4A 21 C0
bz L0EF5 ; 0F4C 84 A8
clr ; 0F4E 70
lr S, A ; 0F4F 5C
br L0F82 ; 0F50 90 31
L0F52: lisu 2 ; 0F52 62
lisl 1 ; 0F53 69
ds D ; 0F54 3E
bnz L0F58 ; 0F55 94 02
ds D ; 0F57 3E
L0F58: lr A, 7 ; 0F58 47
lr IS, A ; 0F59 0B
lr A, 6 ; 0F5A 46
ni $30 ; 0F5B 21 30
bnz L0F64 ; 0F5D 94 06
L0F5F: lis $F ; 0F5F 7F
ns 6 ; 0F60 F6
ai $C0 ; 0F61 24 C0
lr S, A ; 0F63 5C
L0F64: lr A, 6 ; 0F64 46
com ; 0F65 18
inc ; 0F66 1F
as S ; 0F67 CC
ni $F ; 0F68 21 0F
bnz L0F5F ; 0F6A 94 F4
lr A, S ; 0F6C 4C
ai $C0 ; 0F6D 24 C0
lr S, A ; 0F6F 5C
ni $C0 ; 0F70 21 C0
bz L0F77 ; 0F72 84 04
jmp L0EF5 ; 0F74 29 0E F5
L0F77: lr A, IS ; 0F77 0A
ci $3E ; 0F78 25 3E
bnz L0F82 ; 0F7A 94 07
lisu 2 ; 0F7C 62
lisl 0 ; 0F7D 68
lis 3 ; 0F7E 73
lr S, A ; 0F7F 5C
lr A, 7 ; 0F80 47
lr IS, A ; 0F81 0B
L0F82: pi L0DB3 ; 0F82 28 0D B3
lis 6 ; 0F85 76
as 0 ; 0F86 C0
lr 0, A ; 0F87 50
pi L0DC6 ; 0F88 28 0D C6
jmp L0EF3 ; 0F8B 29 0E F3
;-------------------------------------------------------------------------------
; Timed game-event handling and extended collision checks (strongly likely).
; Initializes O20, waits for controller activity or timeout, updates event flags
; and object state, then dispatches sound/scene handling.
;-------------------------------------------------------------------------------
L0F8E: clr ; 0F8E 70
lr 5, A ; 0F8F 55
lisu 7 ; 0F90 67
lisl 2 ; 0F91 6A
as S ; 0F92 CC
bnz L0F97 ; 0F93 94 03
lis 5 ; 0F95 75
lr S, A ; 0F96 5C
L0F97: lisu 2 ; 0F97 62
lisl 0 ; 0F98 68
li $B0 ; 0F99 20 B0
lr S, A ; 0F9B 5C
pi L0818 ; 0F9C 28 08 18
L0F9F: lisu 2 ; 0F9F 62
lisl 1 ; 0FA0 69
ds D ; 0FA1 3E
bnz L0FAD ; 0FA2 94 0A
ds S ; 0FA4 3C
bnz L0FAD ; 0FA5 94 07
lisu 6 ; 0FA7 66
lisl 0 ; 0FA8 68
ds S ; 0FA9 3C
jmp L0C6D ; 0FAA 29 0C 6D
L0FAD: pi L08B0 ; 0FAD 28 08 B0
bz L0F9F ; 0FB0 84 EE
lisl 5 ; 0FB2 6D
lis 2 ; 0FB3 72
lr S, A ; 0FB4 5C
lisu 7 ; 0FB5 67
lisl 7 ; 0FB6 6F
clr ; 0FB7 70
as S ; 0FB8 CC
bnz L0FBF ; 0FB9 94 05
lr A, $A ; 0FBB 4A
oi $40 ; 0FBC 22 40
lr $A, A ; 0FBE 5A
L0FBF: lis 3 ; 0FBF 73
lr 9, A ; 0FC0 59
lisu 5 ; 0FC1 65
lisl 4 ; 0FC2 6C
li $11 ; 0FC3 20 11
lr I, A ; 0FC5 5D
clr ; 0FC6 70
lr S, A ; 0FC7 5C
lisu 7 ; 0FC8 67
lisl 1 ; 0FC9 69
li $77 ; 0FCA 20 77
lr S, A ; 0FCC 5C
L0FCD: li $FD ; 0FCD 20 FD
lr 6, A ; 0FCF 56
lis 2 ; 0FD0 72
lr 5, A ; 0FD1 55
lisu 6 ; 0FD2 66
lisl 1 ; 0FD3 69
lr A, S ; 0FD4 4C
com ; 0FD5 18
inc ; 0FD6 1F
lisu 2 ; 0FD7 62
lisl 6 ; 0FD8 6E
as S ; 0FD9 CC
bz L0FE9 ; 0FDA 84 0E
bp L0FDF ; 0FDC 81 02
ds 5 ; 0FDE 35
L0FDF: lis 1 ; 0FDF 71
ns $A ; 0FE0 FA
bz L0FE6 ; 0FE1 84 04
ds 5 ; 0FE3 35
lis 3 ; 0FE4 73
lr 6, A ; 0FE5 56
L0FE6: ds 5 ; 0FE6 35
bnz L0FEF ; 0FE7 94 07
L0FE9: lr A, $A ; 0FE9 4A
oi $20 ; 0FEA 22 20
lr $A, A ; 0FEC 5A
br L1035 ; 0FED 90 47
L0FEF: lisu 7 ; 0FEF 67
lisl 4 ; 0FF0 6C
lr A, I ; 0FF1 4D
sr 4 ; 0FF2 14
sr 1 ; 0FF3 12
ai $11 ; 0FF4 24 11
com ; 0FF6 18
as S ; 0FF7 CC
bnz L1035 ; 0FF8 94 3C
lis 3 ; 0FFA 73
xs 9 ; 0FFB E9
bnz L1035 ; 0FFC 94 38
lisl 6 ; 0FFE 6E
lis 4 ; 0FFF 74
xs S ; 1000 EC
bz L1035 ; 1001 84 33
lis 5 ; 1003 75
xs S ; 1004 EC
bz L1035 ; 1005 84 2F
lisu 4 ; 1007 64
lisl 7 ; 1008 6F
lr A, S ; 1009 4C
ci $19 ; 100A 25 19
bp L1035 ; 100C 81 28
lisu 5 ; 100E 65
lisl 1 ; 100F 69
lr A, S ; 1010 4C
ci $23 ; 1011 25 23
bm L1035 ; 1013 91 21
lisu 2 ; 1015 62
lisl 2 ; 1016 6A
lr A, S ; 1017 4C
as 6 ; 1018 C6
lr S, A ; 1019 5C
lisl 4 ; 101A 6C
lr S, A ; 101B 5C
lr A, 6 ; 101C 46
com ; 101D 18
inc ; 101E 1F
lr 6, A ; 101F 56
lisu 4 ; 1020 64
lisl 6 ; 1021 6E
as S ; 1022 CC
lr S, A ; 1023 5C
lisu 5 ; 1024 65
lisl 0 ; 1025 68
lr A, 6 ; 1026 46
as S ; 1027 CC
lr S, A ; 1028 5C
lisu 6 ; 1029 66
lisl 1 ; 102A 69
lr A, S ; 102B 4C
ai $FC ; 102C 24 FC
lr 3, A ; 102E 53
dci L135B ; 102F 2A 13 5B
pi L0822 ; 1032 28 08 22
;-------------------------------------------------------------------------------
; Repositioning and formation/zone tests (strongly likely).
; Copies coordinate state, evaluates object zones and finds minimum distances
; against object records O30-O33. r10 bit 4 records the proximity condition.
;-------------------------------------------------------------------------------
L1035: pi L08B0 ; 1035 28 08 B0
lis 8 ; 1038 78
ns $A ; 1039 FA
bnz L10B9 ; 103A 94 7E
lisu 2 ; 103C 62
lisl 6 ; 103D 6E
lr A, I ; 103E 4D
lr 7, A ; 103F 57
lr A, I ; 1040 4D
lisu 2 ; 1041 62
lisl 1 ; 1042 69
lr D, A ; 1043 5E
lr A, 7 ; 1044 47
lr S, A ; 1045 5C
li $20 ; 1046 20 20
ns $A ; 1048 FA
bz L104E ; 1049 84 04
L104B: jmp L10E0 ; 104B 29 10 E0
L104E: lisu 7 ; 104E 67
lisl 3 ; 104F 6B
as S ; 1050 CC
bp L104B ; 1051 81 F9
lis 3 ; 1053 73
xs 9 ; 1054 E9
bnz L104B ; 1055 94 F5
lr 9, A ; 1057 59
lis 8 ; 1058 78
as $A ; 1059 CA
lr $A, A ; 105A 5A
lisl 6 ; 105B 6E
lr A, S ; 105C 4C
ci 6 ; 105D 25 06
bp L1096 ; 105F 81 36
lr A, $A ; 1061 4A
oi 2 ; 1062 22 02
lr $A, A ; 1064 5A
lisl 4 ; 1065 6C
lr A, I ; 1066 4D
sr 4 ; 1067 14
sr 1 ; 1068 12
ai $A ; 1069 24 0A
as S ; 106B CC
lisl 1 ; 106C 69
lr S, A ; 106D 5C
lisl 6 ; 106E 6E
lis 7 ; 106F 77
xs S ; 1070 EC
bnz L1096 ; 1071 94 24
lisl 1 ; 1073 69
lr A, S ; 1074 4C
ai $FD ; 1075 24 FD
lr S, A ; 1077 5C
lis 1 ; 1078 71
ns $A ; 1079 FA
lisu 2 ; 107A 62
lisl 0 ; 107B 68
bnz L1083 ; 107C 94 06
li $F6 ; 107E 20 F6
as S ; 1080 CC
br L1087 ; 1081 90 05
L1083: lr A, S ; 1083 4C
com ; 1084 18
ai $61 ; 1085 24 61
L1087: lr 5, A ; 1087 55
lisu 7 ; 1088 67
lisl 4 ; 1089 6C
li $3F ; 108A 20 3F
ns D ; 108C FE
as 5 ; 108D C5
ci $39 ; 108E 25 39
clr ; 1090 70
bp L1095 ; 1091 81 03
li $20 ; 1093 20 20
L1095: lr S, A ; 1095 5C
L1096: lr A, $A ; 1096 4A
oi $40 ; 1097 22 40
lr $A, A ; 1099 5A
lisu 7 ; 109A 67
lisl 3 ; 109B 6B
li $10 ; 109C 20 10
ns S ; 109E FC
lis 6 ; 109F 76
bnz L10A9 ; 10A0 94 08
li $20 ; 10A2 20 20
ns S ; 10A4 FC
lis $A ; 10A5 7A
bnz L10A9 ; 10A6 94 02
lis 2 ; 10A8 72
L10A9: lr 7, A ; 10A9 57
lis 1 ; 10AA 71
ns $A ; 10AB FA
bz L10B5 ; 10AC 84 08
li $30 ; 10AE 20 30
ns S ; 10B0 FC
lis $F ; 10B1 7F
bnz L10B5 ; 10B2 94 02
lis 3 ; 10B4 73
L10B5: lisu 6 ; 10B5 66
lisl 7 ; 10B6 6F
xs 7 ; 10B7 E7
lr S, A ; 10B8 5C
L10B9: lisu 2 ; 10B9 62
lisl 0 ; 10BA 68
lr A, I ; 10BB 4D
com ; 10BC 18
inc ; 10BD 1F
lr 4, A ; 10BE 54
lr A, D ; 10BF 4E
com ; 10C0 18
inc ; 10C1 1F
lr 5, A ; 10C2 55
lisu 3 ; 10C3 63
lisl 0 ; 10C4 68
L10C5: lr A, I ; 10C5 4D
as 4 ; 10C6 C4
bp L10CB ; 10C7 81 03
com ; 10C9 18
inc ; 10CA 1F
L10CB: lr 2, A ; 10CB 52
lr A, I ; 10CC 4D
as 5 ; 10CD C5
bp L10D2 ; 10CE 81 03
com ; 10D0 18
inc ; 10D1 1F
L10D2: as 2 ; 10D2 C2
ci $F ; 10D3 25 0F
bnc L10DB ; 10D5 92 05
lr A, $A ; 10D7 4A
oi $10 ; 10D8 22 10
lr $A, A ; 10DA 5A
L10DB: lr A, IS ; 10DB 0A
ci $1C ; 10DC 25 1C
bp L10C5 ; 10DE 81 E6
;-------------------------------------------------------------------------------
; Player/object turn and automatic movement selection (strongly likely).
; Select control- or table-driven movement, iterate object groups and route the
; resulting event to the common frame/state handlers.
;-------------------------------------------------------------------------------
L10E0: lisu 7 ; 10E0 67
lisl 5 ; 10E1 6D
lr A, S ; 10E2 4C
com ; 10E3 18
inc ; 10E4 1F
lisl 1 ; 10E5 69
as S ; 10E6 CC
clr ; 10E7 70
lr 0, A ; 10E8 50
bm L10EE ; 10E9 91 04
lisu 6 ; 10EB 66
lisl 7 ; 10EC 6F
lr A, S ; 10ED 4C
L10EE: lr 4, A ; 10EE 54
lis 8 ; 10EF 78
ns $A ; 10F0 FA
bz L10F6 ; 10F1 84 04
pi L0A24 ; 10F3 28 0A 24
L10F6: lis 2 ; 10F6 72
ns $A ; 10F7 FA
bnz L10FD ; 10F8 94 04
jmp L1137 ; 10FA 29 11 37
L10FD: lis 6 ; 10FD 76
lr 0, A ; 10FE 50
L10FF: pi L0A1F ; 10FF 28 0A 1F
ds 0 ; 1102 30
bnz L10FF ; 1103 94 FB
pi L08C1 ; 1105 28 08 C1
lis $C ; 1108 7C
lr 0, A ; 1109 50
lis 8 ; 110A 78
ns $A ; 110B FA
bz L111A ; 110C 84 0D
L110E: pi L0A1F ; 110E 28 0A 1F
ds 0 ; 1111 30
lr A, 0 ; 1112 40
ci 6 ; 1113 25 06
bm L110E ; 1115 91 F8
jmp L1227 ; 1117 29 12 27
L111A: com ; 111A 18
inc ; 111B 1F
as 9 ; 111C C9
bnz L1124 ; 111D 94 06
pi L0A1F ; 111F 28 0A 1F
br L112E ; 1122 90 0B
L1124: lis 1 ; 1124 71
ns $A ; 1125 FA
lis 2 ; 1126 72
bnz L112A ; 1127 94 02
lis 1 ; 1129 71
L112A: lr 4, A ; 112A 54
pi L0A24 ; 112B 28 0A 24
L112E: ds 0 ; 112E 30
lr A, 0 ; 112F 40
ci 6 ; 1130 25 06
bm L111A ; 1132 91 E7
jmp L1200 ; 1134 29 12 00
;-------------------------------------------------------------------------------
; Formation lookup and object movement (strongly likely).
; Split L08C7 results into nibbles, normalize direction bits, read L1297-based
; formation records through L08DA and apply resulting moves.
;-------------------------------------------------------------------------------
L1137: lis 2 ; 1137 72
lr 0, A ; 1138 50
pi L08C7 ; 1139 28 08 C7
ni $F0 ; 113C 21 F0
sr 4 ; 113E 14
lr 7, A ; 113F 57
pi L0A10 ; 1140 28 0A 10
ds 0 ; 1143 30
pi L08C7 ; 1144 28 08 C7
ni $F ; 1147 21 0F
lr 7, A ; 1149 57
pi L0A10 ; 114A 28 0A 10
lis 3 ; 114D 73
lr 0, A ; 114E 50
xs 9 ; 114F E9
bz L1159 ; 1150 84 08
clr ; 1152 70
lr 4, A ; 1153 54
pi L0A24 ; 1154 28 0A 24
br L1189 ; 1157 90 31
L1159: pi L0A1F ; 1159 28 0A 1F
lis 6 ; 115C 76
lr 0, A ; 115D 50
pi L08DA ; 115E 28 08 DA
lisu 5 ; 1161 65
lisl 4 ; 1162 6C
bnz L1166 ; 1163 94 02
lr S, A ; 1165 5C
L1166: li $F0 ; 1166 20 F0
ns S ; 1168 FC
sr 4 ; 1169 14
lr 7, A ; 116A 57
pi L0A10 ; 116B 28 0A 10
ds 0 ; 116E 30
lisu 5 ; 116F 65
lisl 4 ; 1170 6C
lis $F ; 1171 7F
ns S ; 1172 FC
lr 7, A ; 1173 57
pi L0A10 ; 1174 28 0A 10
ds 0 ; 1177 30
pi L08DA ; 1178 28 08 DA
lm ; 117B 16
lisu 5 ; 117C 65
lisl 5 ; 117D 6D
bnz L1181 ; 117E 94 02
lr S, A ; 1180 5C
L1181: lis $F ; 1181 7F
ns S ; 1182 FC
lr 7, A ; 1183 57
pi L0A10 ; 1184 28 0A 10
br L1194 ; 1187 90 0C
L1189: lis 6 ; 1189 76
lr 0, A ; 118A 50
L118B: pi L0A1F ; 118B 28 0A 1F
ds 0 ; 118E 30
lr A, 0 ; 118F 40
ci 3 ; 1190 25 03
bnz L118B ; 1192 94 F8
;-------------------------------------------------------------------------------
; Multi-object update and event evaluation (strongly likely).
; Compare object 12 and 11, read the opposing controller and update objects 10
; through 7 using direct controls or generated direction steps.
;-------------------------------------------------------------------------------
L1194: lis $C ; 1194 7C
lr 0, A ; 1195 50
pi L0D30 ; 1196 28 0D 30
ds 0 ; 1199 30
pi L0D30 ; 119A 28 0D 30
pi L08C1 ; 119D 28 08 C1
li $30 ; 11A0 20 30
ns S ; 11A2 FC
bz L11A9 ; 11A3 84 05
lr A, $A ; 11A5 4A
oi $40 ; 11A6 22 40
lr $A, A ; 11A8 5A
L11A9: lis $A ; 11A9 7A
lr 0, A ; 11AA 50
pi L0A1F ; 11AB 28 0A 1F
ds 0 ; 11AE 30
L11AF: li $40 ; 11AF 20 40
ns $A ; 11B1 FA
bnz L11CF ; 11B2 94 1C
lr A, 0 ; 11B4 40
ci 8 ; 11B5 25 08
bnz L11BD ; 11B7 94 05
lis 6 ; 11B9 76
lr 7, A ; 11BA 57
br L11BF ; 11BB 90 03
L11BD: lis 5 ; 11BD 75
lr 7, A ; 11BE 57
L11BF: lis 1 ; 11BF 71
lisu 7 ; 11C0 67
lisl 7 ; 11C1 6F
ns S ; 11C2 FC
lr 2, A ; 11C3 52
lr A, S ; 11C4 4C
ai $FF ; 11C5 24 FF
ni 2 ; 11C7 21 02
sr 1 ; 11C9 12
as 0 ; 11CA C0
ni 1 ; 11CB 21 01
bnz L11D4 ; 11CD 94 06
L11CF: pi L0A1F ; 11CF 28 0A 1F
br L11D7 ; 11D2 90 04
L11D4: pi L0D86 ; 11D4 28 0D 86
L11D7: ds 0 ; 11D7 30
lr A, 0 ; 11D8 40
ci 7 ; 11D9 25 07
bm L11AF ; 11DB 91 D3
lisu 7 ; 11DD 67
lisl 3 ; 11DE 6B
li $40 ; 11DF 20 40
ns S ; 11E1 FC
bnz L11FD ; 11E2 94 1A
lisl 7 ; 11E4 6F
lr A, D ; 11E5 4E
ci 4 ; 11E6 25 04
bp L11F8 ; 11E8 81 0F
lisu 7 ; 11EA 67
lisl 5 ; 11EB 6D
lr A, S ; 11EC 4C
ci $A ; 11ED 25 0A
bm L11F8 ; 11EF 91 08
lis 6 ; 11F1 76
lr 7, A ; 11F2 57
pi L0A10 ; 11F3 28 0A 10
br L1200 ; 11F6 90 09
L11F8: pi L0D30 ; 11F8 28 0D 30
br L1200 ; 11FB 90 04
L11FD: pi L0A1F ; 11FD 28 0A 1F
L1200: lis 2 ; 1200 72
lr 5, A ; 1201 55
clr ; 1202 70
as 9 ; 1203 C9
bz L1227 ; 1204 84 22
ci 6 ; 1206 25 06
bm L120B ; 1208 91 02
ds 5 ; 120A 35
L120B: lis 1 ; 120B 71
ns $A ; 120C FA
bz L1210 ; 120D 84 02
ds 5 ; 120F 35
L1210: li $10 ; 1210 20 10
as 9 ; 1212 C9
as 9 ; 1213 C9
lr IS, A ; 1214 0B
lr A, S ; 1215 4C
ds 5 ; 1216 35
bz L1220 ; 1217 84 08
ci $57 ; 1219 25 57
bp L1227 ; 121B 81 0B
jmp L0D13 ; 121D 29 0D 13
L1220: ci $12 ; 1220 25 12
bm L1227 ; 1222 91 04
jmp L0D10 ; 1224 29 0D 10
;-------------------------------------------------------------------------------
; Frame/time update (strongly likely)
; Advance O75, apply timing increment from L124D to O63, propagate carry into
; O62, optionally redraw, then re-enter the active update path at L0FCD.
;-------------------------------------------------------------------------------
L1227: lisu 7 ; 1227 67
lisl 5 ; 1228 6D
lr A, S ; 1229 4C
inc ; 122A 1F
lr S, A ; 122B 5C
ci $60 ; 122C 25 60
bp L1232 ; 122E 81 03
ds S ; 1230 3C
ds S ; 1231 3C
L1232: dci L124D ; 1232 2A 12 4D
lisu 7 ; 1235 67
lisl 2 ; 1236 6A
lr A, S ; 1237 4C
adc ; 1238 8E
lm ; 1239 16
lisu 6 ; 123A 66
lisl 3 ; 123B 6B
as S ; 123C CC
lr S, A ; 123D 5C
bnc L124A ; 123E 92 0B
lisu 6 ; 1240 66
lisl 2 ; 1241 6A
clr ; 1242 70
as S ; 1243 CC
bz L1247 ; 1244 84 02
ds S ; 1246 3C
L1247: pi L09C4 ; 1247 28 09 C4
L124A: jmp L0FCD ; 124A 29 0F CD
;===============================================================================
; DATA TABLES $124D-$13E9
; This range is addressed from reachable code through DCI. It must remain raw
; data. Labels below describe known consumers; contents are preserved exactly.
;===============================================================================
; frame/tempo increment table used at L1232
L124D: .byte $50, $14, $1D, $38 ; 124D
; Delay/parameter table used by the short 1 kHz beep at L0C96.
L1251: .byte $48, $29, $01, $FF, $01, $00, $04, $00, $06, $00, $02, $00 ; 1251
; State lookup table used by L0DB3.
L125D: .byte $00, $03, $07, $AB, $05, $04, $06, $AB, $01, $02, $08 ; 125D
; Variable-length lookup/formation data consumed by L08C7.
L1268: .byte $08, $09, $0A, $0B, $0C, $17, $22, $23, $24, $77, $00, $77, $00, $77, $00, $77 ; 1268
.byte $00, $08, $00, $0C, $88, $0F, $81, $11, $80, $13, $01, $77, $11, $03, $00, $07 ; 1278
.byte $44, $0A, $50, $0C, $00, $0E, $00, $77, $11, $77, $00, $77, $00, $77, $00 ; 1288
; Variable-length lookup/formation data consumed by L08DA.
L1297: .byte $0A, $1C, $25, $34, $40, $52, $5B, $67, $67, $77, $11, $03, $03, $11, $01, $06 ; 1297
.byte $45, $01, $0F, $48, $01, $12, $08, $01, $17, $01, $01, $1B, $01, $04, $77, $06 ; 12A7
.byte $11, $01, $0A, $11, $00, $0C, $95, $00, $77, $03, $11, $01, $0E, $49, $00, $14 ; 12B7
.byte $04, $00, $19, $92, $01, $20, $98, $04, $77, $03, $51, $01, $12, $52, $01, $16 ; 12C7
.byte $14, $01, $1B, $91, $01, $77, $03, $11, $05, $07, $51, $05, $0A, $51, $05, $0D ; 12D7
.byte $12, $09, $0E, $15, $09, $21, $A5, $04, $77, $08, $15, $01, $0C, $55, $01, $10 ; 12E7
.byte $84, $01, $77, $02 ; 12F7
; Alternate state/formation table selected inside L0DCB.
L12FB: .byte $11, $08, $07, $11, $09, $0B, $58, $09, $0D, $15, $00, $77, $77, $77, $1E, $0A ; 12FB
.byte $22, $0A, $1C, $06, $24, $06, $1E, $02 ; 130B
; Primary state/formation table selected inside L0DCB.
L1313: .byte $22, $02, $1C, $02, $20, $02, $20, $07, $23, $0A, $2C, $03, $16, $02, $20, $08 ; 1313
.byte $16, $0B, $2C, $0C, $1C, $14, $1C, $02, $20, $02 ; 1323
; Three short selector/bitmap records chosen near L0BEC.
L132D: .byte $FF, $80 ; 132D
L132F: .byte $AA, $80 ; 132F
L1331: .byte $F7, $80 ; 1331
; Eight consecutive graphics parameter records rendered from L0E83.
L1333: .byte $09, $37, $41, $59, $01, $09, $0E, $41, $01, $2A, $09, $0E, $41, $59, $01, $61 ; 1333
.byte $0E, $41, $01, $2A, $0A, $0F, $C1, $57, $28, $58, $0C, $41, $01, $2E, $0A, $07 ; 1343
.byte $C1, $61, $05, $12, $0C, $41, $01, $2E ; 1353
; Graphics parameter block entered through L0822 at $102F.
L135B: .byte $17, $C1, $09, $11 ; 135B
; Fixed screen graphics parameter block entered through L0820 at $0E1F.
L135F: .byte $19, $11, $C1, $33, $07 ; 135F
; Packed sprite/glyph data indexed as L1364 + 2*r1 by L0840.
L1364: .byte $F6, $DE, $59, $2E, $E7, $CE, $E7, $9E, $B7, $92, $F3, $9E, $F3, $DE, $E5, $24 ; 1364
.byte $F7, $DE, $F7, $9E, $08, $20 ; 1374
; Sound-effect table consumed by L088E from $0C6D.
L137A: .byte $27, $67, $25, $47, $23, $27, $00 ; 137A
; Sound-effect table consumed by L088E from $0CB2.
L1381: .byte $04, $22, $07, $AB, $03, $BB, $08, $CC, $03, $34, $06, $12, $0D, $12, $0D, $12 ; 1381
.byte $00 ; 1391
; Sound-effect table consumed by L088E from $0EC4.
L1392: .byte $37, $6A, $1A, $61, $1B, $6A, $0E, $73, $1D, $73, $0D, $6A, $1D, $73, $0E, $73 ; 1392
.byte $1D, $73, $0E, $73, $1B, $6A, $1D, $73, $10, $82, $20, $82, $0F, $7B, $31, $82 ; 13A2
.byte $24, $90, $2B, $A2, $29, $9D, $24, $90, $20, $82, $1B, $6A, $16, $43, $18, $58 ; 13B2
.byte $0D, $6A, $20, $82, $0E, $73, $1B, $6A, $18, $58, $2B, $43, $00 ; 13C2
; Sound-effect table consumed by L088E from $0D27. The terminating zero is
; followed by unused ROM fill; retain all bytes to preserve the original image.
L13CF: .byte $31, $82, $0F, $7B, $24, $90, $20, $82, $41, $A2, $14, $9D, $31, $AD, $2B, $A2 ; 13CF
.byte $36, $B6, $36, $B6, $36, $B6, $36, $B6, $6D, $B6, $00, $FF, $FF, $FF, $FF, $FF ; 13DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 13EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 13FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 140F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 141F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 142F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 143F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 144F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 145F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 146F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 147F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 148F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 149F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 150F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 151F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 152F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 153F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 154F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 155F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 156F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 157F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 158F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 159F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 160F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 161F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 162F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 163F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 164F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 165F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 166F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 167F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 168F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 169F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16EF
.byte $FF, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 170F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 171F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 172F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 173F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 174F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 175F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 176F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 177F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 178F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 179F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17DF
.byte $FF, $00, $10, $E9, $1B, $DD, $E5, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 17EF
.byte $00 ; 17FF

; Interpreting the last bytes as a five bit alphabet and using ROT24 - it spells PANBLAST, perhaps it means something to someone.

IF 0

Smart data report
=================
Mode: enabled by -s or /s
Memory range: $0800-$17FF
Code bytes: 2630
Data bytes: 1466

DCI data roots from reachable code:
$1333 from $0E7E
$1392 from $0EC4
$135F from $0E1F
$1364 from $0840
$1313 from $0DCB
$12FB from $0DD8
$1331 from $0BEF
$132F from $0BF9
$132D from $0C00
$137A from $0C6D
$1251 from $0C97
$1381 from $0CB2
$125D from $0DB3
$135B from $102F
$13CF from $0D27
$124D from $1232
$1268 from $08C7
$1297 from $08DA

Data intervals emitted as .byte:
$0837-$0839 (3 bytes)
$0C40-$0C43 (4 bytes)
$124D-$17FF (1459 bytes)

ENDIF
</pre>

Disassembly:Videocart 24

2026-08-27T18:47:42Z

E5frog:

This is the complete disassembly of the [[Channel F]] [[Videocart 24]] made with e5frog's modified [[f8tool]] made by [[Peter Trauner]]'s. Original code is copyright © 1978 (?) [[Zircon International]].

<pre>
;===============================================================================
; VIDEOCART 24 / PRO FOOTBALL
; Commented disassembly
;
; Original binary copyright Zircon International, approximately 1978.
; Original disassembly generated with f8tool and reconstructed as compilable
; DASM/F8 source. This revision preserves all instructions, labels, data bytes,
; addresses and original address comments. Only explanatory comments and
; section headings have been added.
;
; Confidence terminology used below:
; confirmed directly established by I/O, data flow or control flow
; strongly likely supported by several independent code relationships
; preliminary descriptive working name, not an original symbol
;
; The range $124D-$17FF is emitted as data because reachable code addresses it
; through DC0. Routines and tables are described without changing binary data.
;===============================================================================

processor f8
org $0800

clrscrn equ $00D0

lr 5, A ; 0800 55
nop ; 0801 2B
li $D0 ; 0802 20 D0
lr 3, A ; 0804 53
pi clrscrn ; 0805 28 00 D0
lisu 6 ; 0808 66
lisl 1 ; 0809 69
li $21 ; 080A 20 21
lr S, A ; 080C 5C
lis 1 ; 080D 71
lr $A, A ; 080E 5A
jmp L0E68 ; 080F 29 0E 68
;-------------------------------------------------------------------------------
; set_isar_2x_r0_plus_10 (confirmed)
; Convert object index in r0 to the first byte of a two-byte scratchpad entry.
; Output: ISAR = $10 + 2*r0. A and ISAR are changed; r0 is preserved.
;-------------------------------------------------------------------------------
L0812: li $10 ; 0812 20 10
as 0 ; 0814 C0
as 0 ; 0815 C0
lr IS, A ; 0816 0B
pop ; 0817 1C
;-------------------------------------------------------------------------------
; delay_r5 (confirmed)
; Blocking two-level delay. A wraps through 256 INC operations for each r5
; count. r5 is consumed and returns as zero.
;-------------------------------------------------------------------------------
L0818: clr ; 0818 70
L0819: inc ; 0819 1F
bnz L0819 ; 081A 94 FE
ds 5 ; 081C 35
bnz L0818 ; 081D 94 FA
pop ; 081F 1C
;-------------------------------------------------------------------------------
; Graphics parameter entry points (strongly likely)
; L0820 reads r3, then L0822 reads r4, r2, r5 and r6 from DC0 before entering
; the common renderer. Observed use identifies r3/r4 as coordinates, r2 as
; color/mode, and r5/r6 as width/height counters.
;-------------------------------------------------------------------------------
L0820: lm ; 0820 16
lr 3, A ; 0821 53
L0822: lm ; 0822 16
lr 4, A ; 0823 54
lm ; 0824 16
lr 2, A ; 0825 52
lm ; 0826 16
lr 5, A ; 0827 55
lm ; 0828 16
lr 6, A ; 0829 56
br L084A ; 082A 90 1F
; draw_object_from_scratch: select solid/background mode, then read X/Y pair.
L082C: li $C1 ; 082C 20 C1
lr 2, A ; 082E 52
; Read a two-byte coordinate pair through ISAR with post-increment semantics.
L082F: lr A, I ; 082F 4D
lr 3, A ; 0830 53
ds 3 ; 0831 33
lr A, I ; 0832 4D
lr 4, A ; 0833 54
ds 4 ; 0834 34
br L083A ; 0835 90 04
.byte $20, $C1, $52 ; 0837
L083A: lis 3 ; 083A 73
lr 5, A ; 083B 55
; Short fixed-height graphics entry: use three rows.
L083C: lis 3 ; 083C 73
lr 6, A ; 083D 56
br L084A ; 083E 90 0B
; draw_bitmap_entry (confirmed graphics): select a two-byte glyph/sprite entry
; at L1364 + 2*r1 and use fixed dimensions 3 by 5.
L0840: dci L1364 ; 0840 2A 13 64
lr A, 1 ; 0843 41
adc ; 0844 8E
adc ; 0845 8E
lis 3 ; 0846 73
lr 5, A ; 0847 55
lis 5 ; 0848 75
lr 6, A ; 0849 56
;-------------------------------------------------------------------------------
; draw_bitmap_core (confirmed)
; Port 0: graphics write/strobe. Port 1: color. Port 4: inverted X.
; Port 5: inverted Y in low six bits and sound selection in high two bits.
; r7 is the serial bitmap mask; a new byte is fetched with LM when exhausted.
; r1 and r6 count columns and rows. Port 0 is cleared before return.
;-------------------------------------------------------------------------------
L084A: clr ; 084A 70
lr 7, A ; 084B 57
li $40 ; 084C 20 40
outs 0 ; 084E B0
lr A, 4 ; 084F 44
oi $C0 ; 0850 22 C0
com ; 0852 18
outs 5 ; 0853 B5
L0854: lr A, 3 ; 0854 43
com ; 0855 18
outs 4 ; 0856 B4
lr A, 5 ; 0857 45
lr 1, A ; 0858 51
L0859: lr A, 2 ; 0859 42
outs 1 ; 085A B1
ni 1 ; 085B 21 01
bnz L0873 ; 085D 94 15
com ; 085F 18
adc ; 0860 8E
lr A, 7 ; 0861 47
sr 1 ; 0862 12
lr 7, A ; 0863 57
bnz L086A ; 0864 94 05
lm ; 0866 16
li $80 ; 0867 20 80
lr 7, A ; 0869 57
L086A: nm ; 086A 8A
bnz L0873 ; 086B 94 07
com ; 086D 18
outs 1 ; 086E B1
lis 2 ; 086F 72
ns 2 ; 0870 F2
bnz L087D ; 0871 94 0B
L0873: li $60 ; 0873 20 60
outs 0 ; 0875 B0
li $40 ; 0876 20 40
outs 0 ; 0878 B0
L0879: ai $F5 ; 0879 24 F5
bp L0879 ; 087B 81 FD
L087D: ins 4 ; 087D A4
ai $FF ; 087E 24 FF
outs 4 ; 0880 B4
ds 1 ; 0881 31
bnz L0859 ; 0882 94 D6
ins 5 ; 0884 A5
ai $FF ; 0885 24 FF
outs 5 ; 0887 B5
ds 6 ; 0888 36
bnz L0854 ; 0889 94 CA
clr ; 088B 70
outs 0 ; 088C B0
pop ; 088D 1C
;-------------------------------------------------------------------------------
; play_sound_table (confirmed)
; DC0 points to pairs: repetition/group count followed by delay value. A zero
; count terminates. The routine alternates $80 (500 Hz) and $00 on port 5;
; r5 controls both on-time and off-time, while r4/r7 group the pulses.
;-------------------------------------------------------------------------------
L088E: lis 3 ; 088E 73
lr 4, A ; 088F 54
L0890: inc ; 0890 1F
bnz L0890 ; 0891 94 FE
am ; 0893 88
lr 7, A ; 0894 57
bz L08AF ; 0895 84 19
lm ; 0897 16
lr 5, A ; 0898 55
L0899: li $80 ; 0899 20 80
outs 5 ; 089B B5
lr A, 5 ; 089C 45
L089D: inc ; 089D 1F
bnz L089D ; 089E 94 FE
outs 5 ; 08A0 B5
lr A, 5 ; 08A1 45
L08A2: inc ; 08A2 1F
bnz L08A2 ; 08A3 94 FE
ds 4 ; 08A5 34
bnz L0899 ; 08A6 94 F2
lis 3 ; 08A8 73
lr 4, A ; 08A9 54
ds 7 ; 08AA 37
bnz L0899 ; 08AB 94 ED
br L088E ; 08AD 90 E0
L08AF: pop ; 08AF 1C
;-------------------------------------------------------------------------------
; read_controller_a / read_controller_b (strongly likely)
; Select one of two controller I/O paths according to r10 bit 0. The selected
; input is inverted and stored in O73. L08C1 selects the opposite input path.
;-------------------------------------------------------------------------------
L08B0: lis 1 ; 08B0 71
ns $A ; 08B1 FA
bz L08B9 ; 08B2 84 06
L08B4: clr ; 08B4 70
outs 4 ; 08B5 B4
ins 4 ; 08B6 A4
br L08BC ; 08B7 90 04
L08B9: clr ; 08B9 70
outs 1 ; 08BA B1
ins 1 ; 08BB A1
L08BC: com ; 08BC 18
lisu 7 ; 08BD 67
lisl 3 ; 08BE 6B
lr S, A ; 08BF 5C
pop ; 08C0 1C
L08C1: lis 1 ; 08C1 71
ns $A ; 08C2 FA
bz L08B4 ; 08C3 84 F0
br L08B9 ; 08C5 90 F3
;-------------------------------------------------------------------------------
; lookup_table_1268 (confirmed table lookup)
; Index table L1268 from scratchpad state and accumulate variable-length data.
;-------------------------------------------------------------------------------
L08C7: dci L1268 ; 08C7 2A 12 68
lisu 7 ; 08CA 67
lisl 6 ; 08CB 6E
lr A, D ; 08CC 4E
adc ; 08CD 8E
lm ; 08CE 16
adc ; 08CF 8E
lr A, S ; 08D0 4C
com ; 08D1 18
inc ; 08D2 1F
lr 4, A ; 08D3 54
L08D4: lm ; 08D4 16
as 4 ; 08D5 C4
lm ; 08D6 16
bm L08D4 ; 08D7 91 FC
pop ; 08D9 1C
; lookup_table_1297 (confirmed table lookup)
; Parallel lookup using L1297, with a three-byte accumulation stride.
L08DA: dci L1297 ; 08DA 2A 12 97
lisu 7 ; 08DD 67
lisl 6 ; 08DE 6E
lr A, D ; 08DF 4E
adc ; 08E0 8E
lm ; 08E1 16
adc ; 08E2 8E
lr A, S ; 08E3 4C
com ; 08E4 18
inc ; 08E5 1F
lr 4, A ; 08E6 54
L08E7: lm ; 08E7 16
lm ; 08E8 16
as 4 ; 08E9 C4
lm ; 08EA 16
bm L08E7 ; 08EB 91 FB
pop ; 08ED 1C
;-------------------------------------------------------------------------------
; calc_small_index_a (preliminary)
; Return a small class in r5 according to r0 and player/side flag r10 bit 0.
;-------------------------------------------------------------------------------
L08EE: lis 2 ; 08EE 72
lr 5, A ; 08EF 55
lr A, 0 ; 08F0 40
ci 6 ; 08F1 25 06
bm L08F6 ; 08F3 91 02
ds 5 ; 08F5 35
L08F6: lis 1 ; 08F6 71
ns $A ; 08F7 FA
bz L08FB ; 08F8 84 02
ds 5 ; 08FA 35
L08FB: ds 5 ; 08FB 35
pop ; 08FC 1C
; calc_small_index_b (preliminary)
; Return a small class in r5 from the relation between r0 and r4.
L08FD: lis 2 ; 08FD 72
lr 5, A ; 08FE 55
li $F9 ; 08FF 20 F9
as 0 ; 0901 C0
bm L0905 ; 0902 91 02
ds 5 ; 0904 35
L0905: li $F9 ; 0905 20 F9
as 4 ; 0907 C4
bm L090B ; 0908 91 02
ds 5 ; 090A 35
L090B: ds 5 ; 090B 35
pop ; 090C 1C
;-------------------------------------------------------------------------------
; update_motion_or_collision_vector (strongly likely)
; Compare object coordinate pairs stored at $10 + 2*index. The block computes
; absolute differences, applies side/direction flags, and records an event in
; r11 bit 1 when the tested geometric condition is met.
;-------------------------------------------------------------------------------
L090D: lisu 6 ; 090D 66
lisl 5 ; 090E 6D
li $64 ; 090F 20 64
lr I, A ; 0911 5D
lr A, 9 ; 0912 49
lr S, A ; 0913 5C
lisl 4 ; 0914 6C
lr A, 4 ; 0915 44
lr S, A ; 0916 5C
lis 6 ; 0917 76
lr 9, A ; 0918 59
L0919: li $10 ; 0919 20 10
as 8 ; 091B C8
as 8 ; 091C C8
lr IS, A ; 091D 0B
lr A, S ; 091E 4C
lr 7, A ; 091F 57
li $FE ; 0920 20 FE
lr 5, A ; 0922 55
li $10 ; 0923 20 10
as 9 ; 0925 C9
as 9 ; 0926 C9
lr IS, A ; 0927 0B
lr A, 7 ; 0928 47
com ; 0929 18
inc ; 092A 1F
as S ; 092B CC
lr 7, A ; 092C 57
bp L0931 ; 092D 81 03
com ; 092F 18
inc ; 0930 1F
L0931: lr 4, A ; 0931 54
lis 1 ; 0932 71
ns $A ; 0933 FA
bz L093A ; 0934 84 05
lr A, 7 ; 0936 47
com ; 0937 18
inc ; 0938 1F
lr 7, A ; 0939 57
L093A: lr A, 5 ; 093A 45
inc ; 093B 1F
inc ; 093C 1F
lr 5, A ; 093D 55
lr A, 4 ; 093E 44
ai $FD ; 093F 24 FD
lr 4, A ; 0941 54
bp L093A ; 0942 81 F7
lisu 6 ; 0944 66
lisl 7 ; 0945 6F
lis 8 ; 0946 78
ns S ; 0947 FC
bz L094E ; 0948 84 05
lr A, 5 ; 094A 45
com ; 094B 18
inc ; 094C 1F
lr 5, A ; 094D 55
L094E: lis $C ; 094E 7C
ns S ; 094F FC
bnz L0953 ; 0950 94 02
lr 5, A ; 0952 55
L0953: lis 1 ; 0953 71
ns $A ; 0954 FA
bnz L095B ; 0955 94 05
lr A, 5 ; 0957 45
com ; 0958 18
inc ; 0959 1F
lr 5, A ; 095A 55
L095B: clr ; 095B 70
as 7 ; 095C C7
bm L0963 ; 095D 91 05
lr A, 5 ; 095F 45
com ; 0960 18
inc ; 0961 1F
lr 5, A ; 0962 55
L0963: li $11 ; 0963 20 11
as 8 ; 0965 C8
as 8 ; 0966 C8
lr IS, A ; 0967 0B
lr A, S ; 0968 4C
as 5 ; 0969 C5
com ; 096A 18
inc ; 096B 1F
lr 5, A ; 096C 55
li $11 ; 096D 20 11
as 9 ; 096F C9
as 9 ; 0970 C9
lr IS, A ; 0971 0B
lr A, S ; 0972 4C
as 5 ; 0973 C5
bp L0978 ; 0974 81 03
com ; 0976 18
inc ; 0977 1F
L0978: lr 5, A ; 0978 55
com ; 0979 18
lisu 6 ; 097A 66
lisl 5 ; 097B 6D
as S ; 097C CC
bm L09B3 ; 097D 91 35
lr A, 5 ; 097F 45
lr S, A ; 0980 5C
clr ; 0981 70
as 7 ; 0982 C7
bp L09AF ; 0983 81 2B
lr A, $B ; 0985 4B
ni $FD ; 0986 21 FD
lr $B, A ; 0988 5B
li $10 ; 0989 20 10
as 8 ; 098B C8
as 8 ; 098C C8
lr IS, A ; 098D 0B
lr A, S ; 098E 4C
sr 1 ; 098F 12
as S ; 0990 CC
lr 5, A ; 0991 55
lisu 2 ; 0992 62
lisl 6 ; 0993 6E
lr A, S ; 0994 4C
sr 1 ; 0995 12
com ; 0996 18
inc ; 0997 1F
as 5 ; 0998 C5
lr 5, A ; 0999 55
li $10 ; 099A 20 10
as 9 ; 099C C9
as 9 ; 099D C9
lr IS, A ; 099E 0B
lr A, S ; 099F 4C
com ; 09A0 18
inc ; 09A1 1F
as 5 ; 09A2 C5
lr 5, A ; 09A3 55
lis 1 ; 09A4 71
ns $A ; 09A5 FA
bz L09AC ; 09A6 84 05
lr A, 5 ; 09A8 45
com ; 09A9 18
inc ; 09AA 1F
lr 5, A ; 09AB 55
L09AC: ds 5 ; 09AC 35
bp L09B3 ; 09AD 81 05
L09AF: lr A, $B ; 09AF 4B
oi 2 ; 09B0 22 02
lr $B, A ; 09B2 5B
L09B3: ds 9 ; 09B3 39
lr A, 9 ; 09B4 49
ci 3 ; 09B5 25 03
bp L09BC ; 09B7 81 04
jmp L0919 ; 09B9 29 09 19
L09BC: lisu 6 ; 09BC 66
lisl 6 ; 09BD 6E
lr A, S ; 09BE 4C
lr 9, A ; 09BF 59
lisl 4 ; 09C0 6C
lr A, S ; 09C1 4C
lr 4, A ; 09C2 54
pop ; 09C3 1C
;-------------------------------------------------------------------------------
; draw_player_or_marker (strongly likely)
; Save the nested return in K, derive a screen position from O61/O62, and draw
; four component glyphs through L0840. Return through PK.
;-------------------------------------------------------------------------------
L09C4: lr K, P ; 09C4 08
lisu 6 ; 09C5 66
lisl 1 ; 09C6 69
lr A, I ; 09C7 4D
ci $32 ; 09C8 25 32
li $3C ; 09CA 20 3C
bp L09D0 ; 09CC 81 03
li $19 ; 09CE 20 19
L09D0: lr 3, A ; 09D0 53
clr ; 09D1 70
lr 1, A ; 09D2 51
as S ; 09D3 CC
lr 8, A ; 09D4 58
bz L09E4 ; 09D5 84 0E
L09D7: lr A, 8 ; 09D7 48
ai $C4 ; 09D8 24 C4
ci $C3 ; 09DA 25 C3
bnc L09E4 ; 09DC 92 07
lr 8, A ; 09DE 58
lr A, 1 ; 09DF 41
inc ; 09E0 1F
lr 1, A ; 09E1 51
br L09D7 ; 09E2 90 F4
L09E4: lis 7 ; 09E4 77
lr 4, A ; 09E5 54
li $40 ; 09E6 20 40
lr 2, A ; 09E8 52
pi L0840 ; 09E9 28 08 40
lis 4 ; 09EC 74
as 3 ; 09ED C3
lr 3, A ; 09EE 53
lis $A ; 09EF 7A
lr 1, A ; 09F0 51
pi L0840 ; 09F1 28 08 40
lis 3 ; 09F4 73
as 3 ; 09F5 C3
lr 3, A ; 09F6 53
clr ; 09F7 70
L09F8: lr 1, A ; 09F8 51
lr A, 8 ; 09F9 48
ai $F6 ; 09FA 24 F6
bm L0A04 ; 09FC 91 07
lr 8, A ; 09FE 58
lr A, 1 ; 09FF 41
inc ; 0A00 1F
lr 1, A ; 0A01 51
br L09F8 ; 0A02 90 F5
L0A04: pi L0840 ; 0A04 28 08 40
lis 4 ; 0A07 74
as 3 ; 0A08 C3
lr 3, A ; 0A09 53
lr A, 8 ; 0A0A 48
lr 1, A ; 0A0B 51
pi L0840 ; 0A0C 28 08 40
pk ; 0A0F 0C
;-------------------------------------------------------------------------------
; normalize_control_bits (strongly likely)
; Copy direction bits from r7 to r4 and mirror selected bits for the active side.
;-------------------------------------------------------------------------------
L0A10: lr A, 7 ; 0A10 47
lr 4, A ; 0A11 54
lis 1 ; 0A12 71
ns $A ; 0A13 FA
bnz L0A1D ; 0A14 94 08
lis 3 ; 0A16 73
ns 4 ; 0A17 F4
bz L0A1D ; 0A18 84 04
lis 3 ; 0A1A 73
xs 4 ; 0A1B E4
lr 4, A ; 0A1C 54
L0A1D: br L0A24 ; 0A1D 90 06
; read_control_nibble (strongly likely): load low four bits of O73 into r4.
L0A1F: lisu 7 ; 0A1F 67
lisl 3 ; 0A20 6B
lis $F ; 0A21 7F
ns S ; 0A22 FC
lr 4, A ; 0A23 54
;-------------------------------------------------------------------------------
; apply_direction_and_move (strongly likely)
; Decode r4 bits 0-3 into signed horizontal and vertical steps in r3/r6, then
; apply object-, side- and boundary-specific movement rules.
;-------------------------------------------------------------------------------
L0A24: lr K, P ; 0A24 08
clr ; 0A25 70
lr 3, A ; 0A26 53
lr 6, A ; 0A27 56
lis 1 ; 0A28 71
ns 4 ; 0A29 F4
bz L0A2E ; 0A2A 84 03
lis 1 ; 0A2C 71
lr 3, A ; 0A2D 53
L0A2E: lis 2 ; 0A2E 72
ns 4 ; 0A2F F4
bz L0A33 ; 0A30 84 02
ds 3 ; 0A32 33
L0A33: nop ; 0A33 2B
lis 4 ; 0A34 74
ns 4 ; 0A35 F4
bz L0A3A ; 0A36 84 03
lis 1 ; 0A38 71
lr 6, A ; 0A39 56
L0A3A: lis 8 ; 0A3A 78
ns 4 ; 0A3B F4
bz L0A3F ; 0A3C 84 02
ds 6 ; 0A3E 36
L0A3F: clr ; 0A3F 70
as 0 ; 0A40 C0
bnz L0A61 ; 0A41 94 1F
lr A, 6 ; 0A43 46
sl 1 ; 0A44 13
lr 6, A ; 0A45 56
lr A, 3 ; 0A46 43
bz L0A4D ; 0A47 84 05
sl 1 ; 0A49 13
sl 1 ; 0A4A 13
br L0A4F ; 0A4B 90 03
L0A4D: sl 1 ; 0A4D 13
as 3 ; 0A4E C3
L0A4F: lr 3, A ; 0A4F 53
lisu 7 ; 0A50 67
lisl 6 ; 0A51 6E
lr A, D ; 0A52 4E
ci 6 ; 0A53 25 06
bp L0A73 ; 0A55 81 1D
lis 1 ; 0A57 71
ns S ; 0A58 FC
bnz L0A5D ; 0A59 94 03
li $FF ; 0A5B 20 FF
L0A5D: as 6 ; 0A5D C6
lr 6, A ; 0A5E 56
br L0A73 ; 0A5F 90 13
L0A61: lisu 7 ; 0A61 67
lisl 6 ; 0A62 6E
lis 7 ; 0A63 77
xs S ; 0A64 EC
bnz L0A73 ; 0A65 94 0D
lis 3 ; 0A67 73
xs 9 ; 0A68 E9
bnz L0A73 ; 0A69 94 09
lr A, 0 ; 0A6B 40
ci 6 ; 0A6C 25 06
bm L0A73 ; 0A6E 91 04
clr ; 0A70 70
lr 3, A ; 0A71 53
lr 6, A ; 0A72 56
L0A73: lis 2 ; 0A73 72
ns $A ; 0A74 FA
bnz L0A9A ; 0A75 94 24
lr A, 0 ; 0A77 40
ci 6 ; 0A78 25 06
bp L0A9A ; 0A7A 81 1F
ci $C ; 0A7C 25 0C
bm L0A9A ; 0A7E 91 1B
lis 3 ; 0A80 73
xs 9 ; 0A81 E9
bnz L0A89 ; 0A82 94 06
li $20 ; 0A84 20 20
ns $A ; 0A86 FA
bz L0A9A ; 0A87 84 12
L0A89: lisl 4 ; 0A89 6C
lr A, S ; 0A8A 4C
sl 4 ; 0A8B 15
sl 1 ; 0A8C 13
as S ; 0A8D CC
ai $73 ; 0A8E 24 73
lr S, A ; 0A90 5C
lr A, S ; 0A91 4C
sr 4 ; 0A92 14
sr 1 ; 0A93 12
sr 1 ; 0A94 12
bnz L0A9A ; 0A95 94 04
lr A, 3 ; 0A97 43
sl 1 ; 0A98 13
lr 3, A ; 0A99 53
;-------------------------------------------------------------------------------
; Central object/collision pass (strongly likely)
; Iterate two-byte object records, test position limits and collisions, and set
; event bits in r11. O53/O54 hold a temporary coordinate pair.
;-------------------------------------------------------------------------------
L0A9A: clr ; 0A9A 70
lr $B, A ; 0A9B 5B
L0A9C: pi L0812 ; 0A9C 28 08 12
lr A, I ; 0A9F 4D
as 3 ; 0AA0 C3
lr 1, A ; 0AA1 51
lr A, S ; 0AA2 4C
as 6 ; 0AA3 C6
lisu 5 ; 0AA4 65
lisl 3 ; 0AA5 6B
lr 2, A ; 0AA6 52
lr D, A ; 0AA7 5E
lr A, 1 ; 0AA8 41
lr I, A ; 0AA9 5D
lr A, D ; 0AAA 4E
ci $F ; 0AAB 25 0F
bp L0AB3 ; 0AAD 81 05
ci $35 ; 0AAF 25 35
bp L0AD2 ; 0AB1 81 20
L0AB3: clr ; 0AB3 70
as 0 ; 0AB4 C0
bz L0ACE ; 0AB5 84 18
lisu 5 ; 0AB7 65
lisl 4 ; 0AB8 6C
ci 5 ; 0AB9 25 05
bnz L0AC2 ; 0ABB 94 06
lis $C ; 0ABD 7C
xs S ; 0ABE EC
lr S, A ; 0ABF 5C
br L0ACA ; 0AC0 90 09
L0AC2: ci 6 ; 0AC2 25 06
bnz L0ACA ; 0AC4 94 05
li $C0 ; 0AC6 20 C0
xs S ; 0AC8 EC
lr S, A ; 0AC9 5C
L0ACA: clr ; 0ACA 70
lr 6, A ; 0ACB 56
br L0A9C ; 0ACC 90 CF
L0ACE: lr A, $B ; 0ACE 4B
oi $10 ; 0ACF 22 10
lr $B, A ; 0AD1 5B
L0AD2: lr A, 1 ; 0AD2 41
ci $A ; 0AD3 25 0A
bp L0ADB ; 0AD5 81 05
ci $5F ; 0AD7 25 5F
bp L0AF5 ; 0AD9 81 1B
L0ADB: clr ; 0ADB 70
as 0 ; 0ADC C0
bnz L0AE5 ; 0ADD 94 07
lr A, $B ; 0ADF 4B
oi $40 ; 0AE0 22 40
lr $B, A ; 0AE2 5B
br L0AF5 ; 0AE3 90 11
L0AE5: lr A, 0 ; 0AE5 40
ci 5 ; 0AE6 25 05
lisu 5 ; 0AE8 65
lisl 4 ; 0AE9 6C
bnz L0AF1 ; 0AEA 94 06
lis 3 ; 0AEC 73
xs S ; 0AED EC
lr S, A ; 0AEE 5C
br L0AF1 ; 0AEF 90 01
L0AF1: clr ; 0AF1 70
lr 3, A ; 0AF2 53
br L0A9C ; 0AF3 90 A8
L0AF5: lis 8 ; 0AF5 78
ns $A ; 0AF6 FA
lis 1 ; 0AF7 71
bz L0AFB ; 0AF8 84 02
clr ; 0AFA 70
L0AFB: lr 4, A ; 0AFB 54
L0AFC: lr A, 4 ; 0AFC 44
xs 0 ; 0AFD E0
bz L0B0B ; 0AFE 84 0C
li $10 ; 0B00 20 10
as 4 ; 0B02 C4
as 4 ; 0B03 C4
lr IS, A ; 0B04 0B
lis 2 ; 0B05 72
as I ; 0B06 CD
com ; 0B07 18
as 1 ; 0B08 C1
bm L0B0E ; 0B09 91 04
L0B0B: jmp L0BB1 ; 0B0B 29 0B B1
L0B0E: ai 5 ; 0B0E 24 05
bm L0B0B ; 0B10 91 FA
lis 2 ; 0B12 72
as I ; 0B13 CD
com ; 0B14 18
as 2 ; 0B15 C2
bp L0B0B ; 0B16 81 F4
ai 5 ; 0B18 24 05
bm L0B0B ; 0B1A 91 F0
lr A, 0 ; 0B1C 40
lr 8, A ; 0B1D 58
lr A, 9 ; 0B1E 49
xs 4 ; 0B1F E4
bz L0B28 ; 0B20 84 07
lr A, 4 ; 0B22 44
lr 8, A ; 0B23 58
lr A, 9 ; 0B24 49
xs 0 ; 0B25 E0
bnz L0B8E ; 0B26 94 67
L0B28: clr ; 0B28 70
as 9 ; 0B29 C9
bnz L0B81 ; 0B2A 94 56
lr A, $B ; 0B2C 4B
ni $FD ; 0B2D 21 FD
lr $B, A ; 0B2F 5B
lisu 7 ; 0B30 67
lisl 6 ; 0B31 6E
lr A, D ; 0B32 4E
ci 6 ; 0B33 25 06
bp L0B55 ; 0B35 81 1F
lr A, S ; 0B37 4C
com ; 0B38 18
inc ; 0B39 1F
lisl 1 ; 0B3A 69
as S ; 0B3B CC
bp L0B0B ; 0B3C 81 CE
lr A, 8 ; 0B3E 48
ci 6 ; 0B3F 25 06
lr A, $B ; 0B41 4B
bm L0B49 ; 0B42 91 06
oi $E ; 0B44 22 0E
lr $B, A ; 0B46 5B
br L0B4E ; 0B47 90 06
L0B49: oi $A ; 0B49 22 0A
lr $B, A ; 0B4B 5B
lr A, 8 ; 0B4C 48
lr 9, A ; 0B4D 59
L0B4E: lr A, $A ; 0B4E 4A
oi 2 ; 0B4F 22 02
lr $A, A ; 0B51 5A
jmp L0BBC ; 0B52 29 0B BC
L0B55: lr A, 8 ; 0B55 48
ci 3 ; 0B56 25 03
bp L0B0B ; 0B58 81 B2
ci $A ; 0B5A 25 0A
bm L0B0B ; 0B5C 91 AE
lr A, $B ; 0B5E 4B
oi 2 ; 0B5F 22 02
lr $B, A ; 0B61 5B
lr A, 8 ; 0B62 48
ci 6 ; 0B63 25 06
bp L0B6E ; 0B65 81 08
pi L090D ; 0B67 28 09 0D
lis 2 ; 0B6A 72
ns $B ; 0B6B FB
bz L0BB1 ; 0B6C 84 44
L0B6E: lr A, 8 ; 0B6E 48
lr 9, A ; 0B6F 59
lr A, $B ; 0B70 4B
oi 8 ; 0B71 22 08
ni $FE ; 0B73 21 FE
lr $B, A ; 0B75 5B
lr A, 8 ; 0B76 48
ci 6 ; 0B77 25 06
bp L0B7F ; 0B79 81 05
lr A, $A ; 0B7B 4A
oi 2 ; 0B7C 22 02
lr $A, A ; 0B7E 5A
L0B7F: br L0BBC ; 0B7F 90 3C
L0B81: pi L08FD ; 0B81 28 08 FD
bnz L0B8E ; 0B84 94 09
lr A, $B ; 0B86 4B
oi 4 ; 0B87 22 04
ni $FE ; 0B89 21 FE
lr $B, A ; 0B8B 5B
br L0BBC ; 0B8C 90 2F
L0B8E: lr A, $B ; 0B8E 4B
oi 1 ; 0B8F 22 01
lr $B, A ; 0B91 5B
lr A, 3 ; 0B92 43
ci 1 ; 0B93 25 01
bp L0B9A ; 0B95 81 04
lis 1 ; 0B97 71
br L0BA0 ; 0B98 90 07
L0B9A: ci $FE ; 0B9A 25 FE
bm L0BA4 ; 0B9C 91 07
li $FF ; 0B9E 20 FF
L0BA0: lr 3, A ; 0BA0 53
L0BA1: jmp L0A9A ; 0BA1 29 0A 9A
L0BA4: pi L08FD ; 0BA4 28 08 FD
bz L0BB1 ; 0BA7 84 09
clr ; 0BA9 70
as 6 ; 0BAA C6
bz L0BBC ; 0BAB 84 10
clr ; 0BAD 70
lr 6, A ; 0BAE 56
br L0BA1 ; 0BAF 90 F1
L0BB1: lr A, 4 ; 0BB1 44
inc ; 0BB2 1F
lr 4, A ; 0BB3 54
ci $C ; 0BB4 25 0C
bm L0BBC ; 0BB6 91 05
jmp L0AFC ; 0BB8 29 0A FC
;-------------------------------------------------------------------------------
; Scene/state update entry (preliminary)
; Preserve nested return in K, redraw changed objects, update packed state and
; dispatch event sound or phase transitions.
;-------------------------------------------------------------------------------
L0BBB: lr K, P ; 0BBB 08
L0BBC: lis 8 ; 0BBC 78
ns $B ; 0BBD FB
bz L0BC9 ; 0BBE 84 0A
lr A, $A ; 0BC0 4A
ni $F7 ; 0BC1 21 F7
lr $A, A ; 0BC3 5A
lisu 2 ; 0BC4 62
lisl 0 ; 0BC5 68
pi L082C ; 0BC6 28 08 2C
L0BC9: pi L0812 ; 0BC9 28 08 12
pi L082C ; 0BCC 28 08 2C
li $58 ; 0BCF 20 58
lr 3, A ; 0BD1 53
pi L0812 ; 0BD2 28 08 12
lr A, I ; 0BD5 4D
ci $53 ; 0BD6 25 53
bm L0BE1 ; 0BD8 91 08
ci $17 ; 0BDA 25 17
bm L0BEC ; 0BDC 91 0F
li $12 ; 0BDE 20 12
lr 3, A ; 0BE0 53
L0BE1: lr A, S ; 0BE1 4C
lr 4, A ; 0BE2 54
ds 4 ; 0BE3 34
lis 1 ; 0BE4 71
lr 5, A ; 0BE5 55
li $41 ; 0BE6 20 41
lr 2, A ; 0BE8 52
pi L083C ; 0BE9 28 08 3C
L0BEC: li $80 ; 0BEC 20 80
lr 2, A ; 0BEE 52
dci L1331 ; 0BEF 2A 13 31
pi L08EE ; 0BF2 28 08 EE
bz L0BFC ; 0BF5 84 06
clr ; 0BF7 70
lr 2, A ; 0BF8 52
dci L132F ; 0BF9 2A 13 2F
L0BFC: clr ; 0BFC 70
as 0 ; 0BFD C0
bnz L0C0A ; 0BFE 94 0B
dci L132D ; 0C00 2A 13 2D
lis 8 ; 0C03 78
ns $B ; 0C04 FB
bz L0C0A ; 0C05 84 04
jmp L0C96 ; 0C07 29 0C 96
L0C0A: lr A, 9 ; 0C0A 49
com ; 0C0B 18
inc ; 0C0C 1F
as 0 ; 0C0D C0
bnz L0C13 ; 0C0E 94 04
li $40 ; 0C10 20 40
lr 2, A ; 0C12 52
L0C13: lisu 5 ; 0C13 65
lisl 2 ; 0C14 6A
lr A, I ; 0C15 4D
lr 3, A ; 0C16 53
lr A, S ; 0C17 4C
lr 4, A ; 0C18 54
lis 1 ; 0C19 71
ns $B ; 0C1A FB
bnz L0C24 ; 0C1B 94 08
pi L0812 ; 0C1D 28 08 12
lr A, 3 ; 0C20 43
lr I, A ; 0C21 5D
lr A, 4 ; 0C22 44
lr D, A ; 0C23 5E
L0C24: pi L0812 ; 0C24 28 08 12
pi L082F ; 0C27 28 08 2F
li $40 ; 0C2A 20 40
ns $B ; 0C2C FB
bz L0C5C ; 0C2D 84 2E
lisu 7 ; 0C2F 67
lisl 6 ; 0C30 6E
lr A, S ; 0C31 4C
ci 6 ; 0C32 25 06
bp L0C68 ; 0C34 81 33
ci 7 ; 0C36 25 07
bz L0C44 ; 0C38 84 0B
L0C3A: lr A, $B ; 0C3A 4B
oi 6 ; 0C3B 22 06
lr $B, A ; 0C3D 5B
br L0C96 ; 0C3E 90 57
.byte $5C, $29, $0E, $16 ; 0C40
L0C44: lisu 2 ; 0C44 62
lisl 1 ; 0C45 69
lr A, S ; 0C46 4C
ci $26 ; 0C47 25 26
bm L0C3A ; 0C49 91 F0
ci $1A ; 0C4B 25 1A
bp L0C3A ; 0C4D 81 EC
lisu 2 ; 0C4F 62
lisl 0 ; 0C50 68
lr A, S ; 0C51 4C
ci $32 ; 0C52 25 32
lis $B ; 0C54 7B
bm L0C58 ; 0C55 91 02
lis 3 ; 0C57 73
L0C58: lr 9, A ; 0C58 59
jmp L0D1C ; 0C59 29 0D 1C
L0C5C: li $10 ; 0C5C 20 10
ns $B ; 0C5E FB
bz L0C96 ; 0C5F 84 36
lisu 7 ; 0C61 67
lisl 6 ; 0C62 6E
lr A, S ; 0C63 4C
ci 6 ; 0C64 25 06
bm L0C3A ; 0C66 91 D3
L0C68: li $10 ; 0C68 20 10
ns $A ; 0C6A FA
bnz L0C93 ; 0C6B 94 27
L0C6D: dci L137A ; 0C6D 2A 13 7A
pi L088E ; 0C70 28 08 8E
lis 1 ; 0C73 71
ns $A ; 0C74 FA
lisu 6 ; 0C75 66
lisl 1 ; 0C76 69
lr A, S ; 0C77 4C
bz L0C87 ; 0C78 84 0E
ci $26 ; 0C7A 25 26
bp L0C82 ; 0C7C 81 05
ai $F6 ; 0C7E 24 F6
br L0C92 ; 0C80 90 11
L0C82: ai $12 ; 0C82 24 12
sr 1 ; 0C84 12
br L0C92 ; 0C85 90 0C
L0C87: ci $44 ; 0C87 25 44
bm L0C8F ; 0C89 91 05
ai $A ; 0C8B 24 0A
br L0C92 ; 0C8D 90 04
L0C8F: ai $58 ; 0C8F 24 58
sr 1 ; 0C91 12
L0C92: lr S, A ; 0C92 5C
L0C93: jmp L0E68 ; 0C93 29 0E 68
;-------------------------------------------------------------------------------
; play_short_beep_and_update_state (confirmed sound section)
; Select delay data through L1251, wait, pulse $40 (1 kHz) then $00 on port 5.
; The following path continues into event/state processing when required.
;-------------------------------------------------------------------------------
L0C96: nop ; 0C96 2B
dci L1251 ; 0C97 2A 12 51
lisu 7 ; 0C9A 67
lisl 2 ; 0C9B 6A
lr A, S ; 0C9C 4C
adc ; 0C9D 8E
adc ; 0C9E 8E
lm ; 0C9F 16
lr 5, A ; 0CA0 55
lm ; 0CA1 16
L0CA2: inc ; 0CA2 1F
bnz L0CA2 ; 0CA3 94 FE
ds 5 ; 0CA5 35
bnz L0CA2 ; 0CA6 94 FB
li $40 ; 0CA8 20 40
outs 5 ; 0CAA B5
clr ; 0CAB 70
outs 5 ; 0CAC B5
lis 4 ; 0CAD 74
ns $B ; 0CAE FB
bnz L0CB2 ; 0CAF 94 02
pk ; 0CB1 0C
L0CB2: dci L1381 ; 0CB2 2A 13 81
pi L088E ; 0CB5 28 08 8E
li $10 ; 0CB8 20 10
as 9 ; 0CBA C9
as 9 ; 0CBB C9
lr IS, A ; 0CBC 0B
lr A, S ; 0CBD 4C
lisu 6 ; 0CBE 66
lisl 1 ; 0CBF 69
inc ; 0CC0 1F
lr S, A ; 0CC1 5C
lr A, $B ; 0CC2 4B
ni $FB ; 0CC3 21 FB
lr $B, A ; 0CC5 5B
lis 1 ; 0CC6 71
ns $A ; 0CC7 FA
bz L0CCD ; 0CC8 84 04
lis 4 ; 0CCA 74
as $B ; 0CCB CB
lr $B, A ; 0CCC 5B
L0CCD: lis 2 ; 0CCD 72
ns $A ; 0CCE FA
bz L0CD4 ; 0CCF 84 04
lis 4 ; 0CD1 74
xs $B ; 0CD2 EB
lr $B, A ; 0CD3 5B
L0CD4: lis 4 ; 0CD4 74
ns $B ; 0CD5 FB
bz L0CF9 ; 0CD6 84 22
lr A, S ; 0CD8 4C
ci $58 ; 0CD9 25 58
bm L0D13 ; 0CDB 91 37
ci $11 ; 0CDD 25 11
bm L0CE8 ; 0CDF 91 08
lis 2 ; 0CE1 72
ns $A ; 0CE2 FA
bz L0CF2 ; 0CE3 84 0E
li $21 ; 0CE5 20 21
L0CE7: lr S, A ; 0CE7 5C
L0CE8: lis 2 ; 0CE8 72
ns $A ; 0CE9 FA
bnz L0CEF ; 0CEA 94 04
jmp L0E68 ; 0CEC 29 0E 68
L0CEF: jmp L0E16 ; 0CEF 29 0E 16
L0CF2: li $49 ; 0CF2 20 49
lr S, A ; 0CF4 5C
lis 2 ; 0CF5 72
L0CF6: lr 9, A ; 0CF6 59
br L0D27 ; 0CF7 90 2F
L0CF9: ds S ; 0CF9 3C
ds S ; 0CFA 3C
lr A, S ; 0CFB 4C
ci $11 ; 0CFC 25 11
bp L0D10 ; 0CFE 81 11
ci $58 ; 0D00 25 58
bp L0CE7 ; 0D02 81 E4
lis 2 ; 0D04 72
ns $A ; 0D05 FA
li $49 ; 0D06 20 49
bnz L0CE7 ; 0D08 94 DE
li $21 ; 0D0A 20 21
lr S, A ; 0D0C 5C
lis $A ; 0D0D 7A
br L0CF6 ; 0D0E 90 E7
L0D10: lis 7 ; 0D10 77
br L0D14 ; 0D11 90 02
L0D13: lis $F ; 0D13 7F
L0D14: lr 9, A ; 0D14 59
lis 2 ; 0D15 72
ns $A ; 0D16 FA
bz L0D1C ; 0D17 84 04
lis 1 ; 0D19 71
xs $A ; 0D1A EA
lr $A, A ; 0D1B 5A
L0D1C: lis 8 ; 0D1C 78
ns 9 ; 0D1D F9
lisu 6 ; 0D1E 66
lisl 1 ; 0D1F 69
li $49 ; 0D20 20 49
bnz L0D26 ; 0D22 94 03
li $21 ; 0D24 20 21
L0D26: lr S, A ; 0D26 5C
L0D27: dci L13CF ; 0D27 2A 13 CF
pi L088E ; 0D2A 28 08 8E
jmp L0E18 ; 0D2D 29 0E 18
;-------------------------------------------------------------------------------
; direction_from_coordinate_delta (strongly likely)
; Compare coordinate pair r9 with pair r0, form absolute X/Y differences and
; encode horizontal direction as 1/2 and vertical direction as 4/8 in r4.
;-------------------------------------------------------------------------------
L0D30: li $10 ; 0D30 20 10
as 9 ; 0D32 C9
as 9 ; 0D33 C9
lr IS, A ; 0D34 0B
lr A, I ; 0D35 4D
lr 5, A ; 0D36 55
lr A, S ; 0D37 4C
lr 6, A ; 0D38 56
li $10 ; 0D39 20 10
as 0 ; 0D3B C0
as 0 ; 0D3C C0
lr IS, A ; 0D3D 0B
lr A, I ; 0D3E 4D
com ; 0D3F 18
inc ; 0D40 1F
as 5 ; 0D41 C5
lr 5, A ; 0D42 55
bp L0D47 ; 0D43 81 03
com ; 0D45 18
inc ; 0D46 1F
L0D47: lr 4, A ; 0D47 54
lr A, S ; 0D48 4C
com ; 0D49 18
inc ; 0D4A 1F
as 6 ; 0D4B C6
lr 6, A ; 0D4C 56
bp L0D51 ; 0D4D 81 03
com ; 0D4F 18
inc ; 0D50 1F
L0D51: lr 3, A ; 0D51 53
com ; 0D52 18
inc ; 0D53 1F
as 4 ; 0D54 C4
clr ; 0D55 70
bm L0D5F ; 0D56 91 08
as 5 ; 0D58 C5
lis 1 ; 0D59 71
bp L0D5D ; 0D5A 81 02
lis 2 ; 0D5C 72
L0D5D: br L0D64 ; 0D5D 90 06
L0D5F: as 6 ; 0D5F C6
lis 4 ; 0D60 74
bp L0D64 ; 0D61 81 02
lis 8 ; 0D63 78
L0D64: lr 4, A ; 0D64 54
br L0D83 ; 0D65 90 1D
L0D67: li $10 ; 0D67 20 10
as 0 ; 0D69 C0
as 0 ; 0D6A C0
lr IS, A ; 0D6B 0B
lr A, I ; 0D6C 4D
com ; 0D6D 18
inc ; 0D6E 1F
as 5 ; 0D6F C5
bz L0D76 ; 0D70 84 05
lis 2 ; 0D72 72
bm L0D76 ; 0D73 91 02
lis 1 ; 0D75 71
L0D76: lr 4, A ; 0D76 54
lr A, S ; 0D77 4C
com ; 0D78 18
inc ; 0D79 1F
as 6 ; 0D7A C6
bz L0D81 ; 0D7B 84 05
lis 8 ; 0D7D 78
bm L0D81 ; 0D7E 91 02
lis 4 ; 0D80 74
L0D81: as 4 ; 0D81 C4
lr 4, A ; 0D82 54
L0D83: jmp L0A24 ; 0D83 29 0A 24
;-------------------------------------------------------------------------------
; choose_direction_step (strongly likely)
; Produce small signed steps, normally 0, 4 or $FC (-4), from side, state and
; current object coordinates; continue through the direction decoder.
;-------------------------------------------------------------------------------
L0D86: clr ; 0D86 70
lr 5, A ; 0D87 55
lr 6, A ; 0D88 56
as 2 ; 0D89 C2
ci 0 ; 0D8A 25 00
bnz L0D98 ; 0D8C 94 0B
lis 1 ; 0D8E 71
ns $A ; 0D8F FA
lis 4 ; 0D90 74
bnz L0D95 ; 0D91 94 03
li $FC ; 0D93 20 FC
L0D95: lr 5, A ; 0D95 55
br L0DA6 ; 0D96 90 0F
L0D98: li $11 ; 0D98 20 11
as 7 ; 0D9A C7
as 7 ; 0D9B C7
lr IS, A ; 0D9C 0B
lr A, S ; 0D9D 4C
ci $23 ; 0D9E 25 23
li $FC ; 0DA0 20 FC
bm L0DA5 ; 0DA2 91 02
lis 4 ; 0DA4 74
L0DA5: lr 6, A ; 0DA5 56
L0DA6: li $10 ; 0DA6 20 10
as 7 ; 0DA8 C7
as 7 ; 0DA9 C7
lr IS, A ; 0DAA 0B
lr A, I ; 0DAB 4D
as 5 ; 0DAC C5
lr 5, A ; 0DAD 55
lr A, S ; 0DAE 4C
as 6 ; 0DAF C6
lr 6, A ; 0DB0 56
br L0D67 ; 0DB1 90 B5
;-------------------------------------------------------------------------------
; lookup_state_table_125d (strongly likely)
; Replace the current scratchpad state through L125D and choose r0=6 or 12 from
; ISAR parity before entering the nested update worker.
;-------------------------------------------------------------------------------
L0DB3: dci L125D ; 0DB3 2A 12 5D
lr A, S ; 0DB6 4C
adc ; 0DB7 8E
lm ; 0DB8 16
lr S, A ; 0DB9 5C
lr A, IS ; 0DBA 0A
ni 1 ; 0DBB 21 01
lis $C ; 0DBD 7C
bnz L0DC1 ; 0DBE 94 02
lis 6 ; 0DC0 76
L0DC1: lr 0, A ; 0DC1 50
lisu 6 ; 0DC2 66
lisl 7 ; 0DC3 6F
clr ; 0DC4 70
lr S, A ; 0DC5 5C
; nested_state_update (strongly likely)
; Save the caller return from K in Q, process state/formation tables L1313 or
; L12FB, and return explicitly with LR P0,Q at L0E15.
L0DC6: lr K, P ; 0DC6 08
lr A, KU ; 0DC7 00
lr QU, A ; 0DC8 06
lr A, KL ; 0DC9 01
lr QL, A ; 0DCA 07
L0DCB: dci L1313 ; 0DCB 2A 13 13
lisu 6 ; 0DCE 66
lisl 1 ; 0DCF 69
lr A, S ; 0DD0 4C
lr 6, A ; 0DD1 56
lisu 6 ; 0DD2 66
lisl 7 ; 0DD3 6F
lis 4 ; 0DD4 74
ns S ; 0DD5 FC
bz L0DEB ; 0DD6 84 14
dci L12FB ; 0DD8 2A 12 FB
lr A, 0 ; 0DDB 40
ci 6 ; 0DDC 25 06
bm L0DEB ; 0DDE 91 0C
lis $C ; 0DE0 7C
adc ; 0DE1 8E
lis 1 ; 0DE2 71
ns $A ; 0DE3 FA
li $F6 ; 0DE4 20 F6
bnz L0DE9 ; 0DE6 94 02
lis $A ; 0DE8 7A
L0DE9: as 6 ; 0DE9 C6
lr 6, A ; 0DEA 56
L0DEB: lisu 5 ; 0DEB 65
lisl 3 ; 0DEC 6B
lr A, 0 ; 0DED 40
adc ; 0DEE 8E
adc ; 0DEF 8E
lm ; 0DF0 16
lr D, A ; 0DF1 5E
pi L08EE ; 0DF2 28 08 EE
lm ; 0DF5 16
bz L0DFA ; 0DF6 84 03
com ; 0DF8 18
inc ; 0DF9 1F
L0DFA: as 6 ; 0DFA C6
L0DFB: lr S, A ; 0DFB 5C
ci $C ; 0DFC 25 0C
bp L0E06 ; 0DFE 81 07
ci $5E ; 0E00 25 5E
bp L0E09 ; 0E02 81 06
ai $FE ; 0E04 24 FE
L0E06: inc ; 0E06 1F
br L0DFB ; 0E07 90 F3
L0E09: clr ; 0E09 70
lr $B, A ; 0E0A 5B
pi L0BBB ; 0E0B 28 0B BB
ds 0 ; 0E0E 30
bz L0E15 ; 0E0F 84 05
lis 6 ; 0E11 76
xs 0 ; 0E12 E0
bnz L0DCB ; 0E13 94 B7
L0E15: lr P0, Q ; 0E15 0D
;-------------------------------------------------------------------------------
; start_round_or_screen (strongly likely)
; Reset phase-local state, toggle r10 bit 0, draw fixed screen components, and
; initialize players/objects for the next side or round.
;-------------------------------------------------------------------------------
L0E16: clr ; 0E16 70
lr 9, A ; 0E17 59
L0E18: lis 1 ; 0E18 71
xs $A ; 0E19 EA
lr $A, A ; 0E1A 5A
lisu 6 ; 0E1B 66
lisl 0 ; 0E1C 68
clr ; 0E1D 70
lr S, A ; 0E1E 5C
; draw_fixed_screen_element: render parameter block L135F through L0820.
L0E1F: dci L135F ; 0E1F 2A 13 5F
pi L0820 ; 0E22 28 08 20
L0E25: lisu 5 ; 0E25 65
lisl 6 ; 0E26 6E
li $12 ; 0E27 20 12
lr 4, A ; 0E29 54
li $1B ; 0E2A 20 1B
lr 3, A ; 0E2C 53
clr ; 0E2D 70
lr 2, A ; 0E2E 52
L0E2F: lr A, S ; 0E2F 4C
sr 4 ; 0E30 14
lr 1, A ; 0E31 51
pi L0840 ; 0E32 28 08 40
lr A, I ; 0E35 4D
sl 4 ; 0E36 15
sr 4 ; 0E37 14
lr 1, A ; 0E38 51
lis 5 ; 0E39 75
as 3 ; 0E3A C3
lr 3, A ; 0E3B 53
pi L0840 ; 0E3C 28 08 40
li $43 ; 0E3F 20 43
lr 3, A ; 0E41 53
li $80 ; 0E42 20 80
lr 2, A ; 0E44 52
lr A, IS ; 0E45 0A
ci $2F ; 0E46 25 2F
bz L0E2F ; 0E48 84 E6
lis 7 ; 0E4A 77
ns 9 ; 0E4B F9
bz L0E60 ; 0E4C 84 13
ds 9 ; 0E4E 39
lis 8 ; 0E4F 78
ns 9 ; 0E50 F9
lisl 6 ; 0E51 6E
bnz L0E55 ; 0E52 94 02
lr A, I ; 0E54 4D
L0E55: li $67 ; 0E55 20 67
outs 5 ; 0E57 B5
lr 5, A ; 0E58 55
asd S ; 0E59 DC
lr S, A ; 0E5A 5C
pi L0818 ; 0E5B 28 08 18
br L0E25 ; 0E5E 90 C6
L0E60: lis 2 ; 0E60 72
lr 4, A ; 0E61 54
L0E62: pi L0818 ; 0E62 28 08 18
ds 4 ; 0E65 34
bnz L0E62 ; 0E66 94 FB
;-------------------------------------------------------------------------------
; advance_init_phase (confirmed counter behavior)
; Increment O60 and repeat initialization while the phase value is below four.
; After phase four, build the field and initialize active play state.
;-------------------------------------------------------------------------------
L0E68: lisu 6 ; 0E68 66
lisl 0 ; 0E69 68
lr A, S ; 0E6A 4C
inc ; 0E6B 1F
lr S, A ; 0E6C 5C
ci 4 ; 0E6D 25 04
bm L0E16 ; 0E6F 91 A6
lis 2 ; 0E71 72
lr 4, A ; 0E72 54
L0E73: pi L0818 ; 0E73 28 08 18
ds 4 ; 0E76 34
bnz L0E73 ; 0E77 94 FB
lisu 2 ; 0E79 62
lisl 0 ; 0E7A 68
pi L082C ; 0E7B 28 08 2C
dci L1333 ; 0E7E 2A 13 33
lis 8 ; 0E81 78
lr 8, A ; 0E82 58
L0E83: pi L0820 ; 0E83 28 08 20
ds 8 ; 0E86 38
bnz L0E83 ; 0E87 94 FB
L0E89: lis $D ; 0E89 7D
lr 4, A ; 0E8A 54
lis 2 ; 0E8B 72
lr 6, A ; 0E8C 56
pi L084A ; 0E8D 28 08 4A
li $37 ; 0E90 20 37
lr 4, A ; 0E92 54
lis 2 ; 0E93 72
lr 6, A ; 0E94 56
pi L084A ; 0E95 28 08 4A
lis 7 ; 0E98 77
as 3 ; 0E99 C3
lr 3, A ; 0E9A 53
ci $55 ; 0E9B 25 55
bp L0E89 ; 0E9D 81 EB
lis 2 ; 0E9F 72
lr 9, A ; 0EA0 59
lr A, $A ; 0EA1 4A
ni $C5 ; 0EA2 21 C5
lr $A, A ; 0EA4 5A
lisu 6 ; 0EA5 66
lisl 1 ; 0EA6 69
lr A, D ; 0EA7 4E
lr 3, A ; 0EA8 53
ds 3 ; 0EA9 33
lis 7 ; 0EAA 77
lr 4, A ; 0EAB 54
lis 1 ; 0EAC 71
ns $A ; 0EAD FA
lr $A, A ; 0EAE 5A
clr ; 0EAF 70
bnz L0EB4 ; 0EB0 94 03
li $80 ; 0EB2 20 80
L0EB4: lr 2, A ; 0EB4 52
lr A, S ; 0EB5 4C
lr 1, A ; 0EB6 51
pi L0840 ; 0EB7 28 08 40
pi L09C4 ; 0EBA 28 09 C4
clr ; 0EBD 70
as S ; 0EBE CC
bnz L0ED1 ; 0EBF 94 11
li $F0 ; 0EC1 20 F0
lr S, A ; 0EC3 5C
dci L1392 ; 0EC4 2A 13 92
pi L088E ; 0EC7 28 08 8E
lisl 0 ; 0ECA 68
ds S ; 0ECB 3C
clr ; 0ECC 70
lr 9, A ; 0ECD 59
jmp L0E1F ; 0ECE 29 0E 1F
L0ED1: lisu 2 ; 0ED1 62
lisl 0 ; 0ED2 68
L0ED3: lis 4 ; 0ED3 74
lr S, A ; 0ED4 5C
lr A, IS ; 0ED5 0A
inc ; 0ED6 1F
lr IS, A ; 0ED7 0B
ci $2A ; 0ED8 25 2A
bnz L0ED3 ; 0EDA 94 F8
lis $C ; 0EDC 7C
lr 0, A ; 0EDD 50
lisu 6 ; 0EDE 66
lisl 7 ; 0EDF 6F
lis 4 ; 0EE0 74
lr S, A ; 0EE1 5C
pi L0DC6 ; 0EE2 28 0D C6
pi L0DC6 ; 0EE5 28 0D C6
lisu 7 ; 0EE8 67
lisl 6 ; 0EE9 6E
li $C0 ; 0EEA 20 C0
lr I, A ; 0EEC 5D
lr D, A ; 0EED 5E
lisu 2 ; 0EEE 62
lisl 0 ; 0EEF 68
li $60 ; 0EF0 20 60
lr S, A ; 0EF2 5C
;-------------------------------------------------------------------------------
; main_game_loop (strongly likely)
; Alternate controller sources, debounce console input, update active objects,
; evaluate state transitions and invoke the table-driven update worker.
;-------------------------------------------------------------------------------
L0EF3: lisu 7 ; 0EF3 67
lisl 6 ; 0EF4 6E
L0EF5: li $B0 ; 0EF5 20 B0
L0EF7: inc ; 0EF7 1F
bnz L0EF7 ; 0EF8 94 FE
lis 1 ; 0EFA 71
lr 4, A ; 0EFB 54
L0EFC: lr A, IS ; 0EFC 0A
xi 1 ; 0EFD 23 01
lr IS, A ; 0EFF 0B
lr A, IS ; 0F00 0A
lr 7, A ; 0F01 57
ni 1 ; 0F02 21 01
bnz L0F0B ; 0F04 94 06
pi L08B0 ; 0F06 28 08 B0
br L0F0E ; 0F09 90 04
L0F0B: pi L08C1 ; 0F0B 28 08 C1
L0F0E: lr A, D ; 0F0E 4E
lr 6, A ; 0F0F 56
clr ; 0F10 70
as S ; 0F11 CC
bnz L0F22 ; 0F12 94 0F
lis 5 ; 0F14 75
lr 5, A ; 0F15 55
ins 0 ; 0F16 A0
com ; 0F17 18
ni $F ; 0F18 21 0F
bz L0F22 ; 0F1A 84 07
L0F1C: ds 5 ; 0F1C 35
sr 1 ; 0F1D 12
bnz L0F1C ; 0F1E 94 FD
lr A, 5 ; 0F20 45
lr S, A ; 0F21 5C
L0F22: lr A, 7 ; 0F22 47
lr IS, A ; 0F23 0B
lr A, S ; 0F24 4C
ni $C0 ; 0F25 21 C0
bnz L0F33 ; 0F27 94 0B
ds 4 ; 0F29 34
bnz L0F8E ; 0F2A 94 63
li $CE ; 0F2C 20 CE
L0F2E: inc ; 0F2E 1F
bnz L0F2E ; 0F2F 94 FE
br L0EFC ; 0F31 90 CA
L0F33: lisu 7 ; 0F33 67
lisl 4 ; 0F34 6C
ds S ; 0F35 3C
clr ; 0F36 70
lisu 2 ; 0F37 62
lisl 0 ; 0F38 68
as S ; 0F39 CC
bnz L0F52 ; 0F3A 94 17
lr A, 7 ; 0F3C 47
lr IS, A ; 0F3D 0B
ni 1 ; 0F3E 21 01
bz L0F49 ; 0F40 84 08
lr A, D ; 0F42 4E
li $C0 ; 0F43 20 C0
ns S ; 0F45 FC
lr A, I ; 0F46 4D
bnz L0EF5 ; 0F47 94 AD
L0F49: lr A, S ; 0F49 4C
ni $C0 ; 0F4A 21 C0
bz L0EF5 ; 0F4C 84 A8
clr ; 0F4E 70
lr S, A ; 0F4F 5C
br L0F82 ; 0F50 90 31
L0F52: lisu 2 ; 0F52 62
lisl 1 ; 0F53 69
ds D ; 0F54 3E
bnz L0F58 ; 0F55 94 02
ds D ; 0F57 3E
L0F58: lr A, 7 ; 0F58 47
lr IS, A ; 0F59 0B
lr A, 6 ; 0F5A 46
ni $30 ; 0F5B 21 30
bnz L0F64 ; 0F5D 94 06
L0F5F: lis $F ; 0F5F 7F
ns 6 ; 0F60 F6
ai $C0 ; 0F61 24 C0
lr S, A ; 0F63 5C
L0F64: lr A, 6 ; 0F64 46
com ; 0F65 18
inc ; 0F66 1F
as S ; 0F67 CC
ni $F ; 0F68 21 0F
bnz L0F5F ; 0F6A 94 F4
lr A, S ; 0F6C 4C
ai $C0 ; 0F6D 24 C0
lr S, A ; 0F6F 5C
ni $C0 ; 0F70 21 C0
bz L0F77 ; 0F72 84 04
jmp L0EF5 ; 0F74 29 0E F5
L0F77: lr A, IS ; 0F77 0A
ci $3E ; 0F78 25 3E
bnz L0F82 ; 0F7A 94 07
lisu 2 ; 0F7C 62
lisl 0 ; 0F7D 68
lis 3 ; 0F7E 73
lr S, A ; 0F7F 5C
lr A, 7 ; 0F80 47
lr IS, A ; 0F81 0B
L0F82: pi L0DB3 ; 0F82 28 0D B3
lis 6 ; 0F85 76
as 0 ; 0F86 C0
lr 0, A ; 0F87 50
pi L0DC6 ; 0F88 28 0D C6
jmp L0EF3 ; 0F8B 29 0E F3
;-------------------------------------------------------------------------------
; Timed game-event handling and extended collision checks (strongly likely).
; Initializes O20, waits for controller activity or timeout, updates event flags
; and object state, then dispatches sound/scene handling.
;-------------------------------------------------------------------------------
L0F8E: clr ; 0F8E 70
lr 5, A ; 0F8F 55
lisu 7 ; 0F90 67
lisl 2 ; 0F91 6A
as S ; 0F92 CC
bnz L0F97 ; 0F93 94 03
lis 5 ; 0F95 75
lr S, A ; 0F96 5C
L0F97: lisu 2 ; 0F97 62
lisl 0 ; 0F98 68
li $B0 ; 0F99 20 B0
lr S, A ; 0F9B 5C
pi L0818 ; 0F9C 28 08 18
L0F9F: lisu 2 ; 0F9F 62
lisl 1 ; 0FA0 69
ds D ; 0FA1 3E
bnz L0FAD ; 0FA2 94 0A
ds S ; 0FA4 3C
bnz L0FAD ; 0FA5 94 07
lisu 6 ; 0FA7 66
lisl 0 ; 0FA8 68
ds S ; 0FA9 3C
jmp L0C6D ; 0FAA 29 0C 6D
L0FAD: pi L08B0 ; 0FAD 28 08 B0
bz L0F9F ; 0FB0 84 EE
lisl 5 ; 0FB2 6D
lis 2 ; 0FB3 72
lr S, A ; 0FB4 5C
lisu 7 ; 0FB5 67
lisl 7 ; 0FB6 6F
clr ; 0FB7 70
as S ; 0FB8 CC
bnz L0FBF ; 0FB9 94 05
lr A, $A ; 0FBB 4A
oi $40 ; 0FBC 22 40
lr $A, A ; 0FBE 5A
L0FBF: lis 3 ; 0FBF 73
lr 9, A ; 0FC0 59
lisu 5 ; 0FC1 65
lisl 4 ; 0FC2 6C
li $11 ; 0FC3 20 11
lr I, A ; 0FC5 5D
clr ; 0FC6 70
lr S, A ; 0FC7 5C
lisu 7 ; 0FC8 67
lisl 1 ; 0FC9 69
li $77 ; 0FCA 20 77
lr S, A ; 0FCC 5C
L0FCD: li $FD ; 0FCD 20 FD
lr 6, A ; 0FCF 56
lis 2 ; 0FD0 72
lr 5, A ; 0FD1 55
lisu 6 ; 0FD2 66
lisl 1 ; 0FD3 69
lr A, S ; 0FD4 4C
com ; 0FD5 18
inc ; 0FD6 1F
lisu 2 ; 0FD7 62
lisl 6 ; 0FD8 6E
as S ; 0FD9 CC
bz L0FE9 ; 0FDA 84 0E
bp L0FDF ; 0FDC 81 02
ds 5 ; 0FDE 35
L0FDF: lis 1 ; 0FDF 71
ns $A ; 0FE0 FA
bz L0FE6 ; 0FE1 84 04
ds 5 ; 0FE3 35
lis 3 ; 0FE4 73
lr 6, A ; 0FE5 56
L0FE6: ds 5 ; 0FE6 35
bnz L0FEF ; 0FE7 94 07
L0FE9: lr A, $A ; 0FE9 4A
oi $20 ; 0FEA 22 20
lr $A, A ; 0FEC 5A
br L1035 ; 0FED 90 47
L0FEF: lisu 7 ; 0FEF 67
lisl 4 ; 0FF0 6C
lr A, I ; 0FF1 4D
sr 4 ; 0FF2 14
sr 1 ; 0FF3 12
ai $11 ; 0FF4 24 11
com ; 0FF6 18
as S ; 0FF7 CC
bnz L1035 ; 0FF8 94 3C
lis 3 ; 0FFA 73
xs 9 ; 0FFB E9
bnz L1035 ; 0FFC 94 38
lisl 6 ; 0FFE 6E
lis 4 ; 0FFF 74
xs S ; 1000 EC
bz L1035 ; 1001 84 33
lis 5 ; 1003 75
xs S ; 1004 EC
bz L1035 ; 1005 84 2F
lisu 4 ; 1007 64
lisl 7 ; 1008 6F
lr A, S ; 1009 4C
ci $19 ; 100A 25 19
bp L1035 ; 100C 81 28
lisu 5 ; 100E 65
lisl 1 ; 100F 69
lr A, S ; 1010 4C
ci $23 ; 1011 25 23
bm L1035 ; 1013 91 21
lisu 2 ; 1015 62
lisl 2 ; 1016 6A
lr A, S ; 1017 4C
as 6 ; 1018 C6
lr S, A ; 1019 5C
lisl 4 ; 101A 6C
lr S, A ; 101B 5C
lr A, 6 ; 101C 46
com ; 101D 18
inc ; 101E 1F
lr 6, A ; 101F 56
lisu 4 ; 1020 64
lisl 6 ; 1021 6E
as S ; 1022 CC
lr S, A ; 1023 5C
lisu 5 ; 1024 65
lisl 0 ; 1025 68
lr A, 6 ; 1026 46
as S ; 1027 CC
lr S, A ; 1028 5C
lisu 6 ; 1029 66
lisl 1 ; 102A 69
lr A, S ; 102B 4C
ai $FC ; 102C 24 FC
lr 3, A ; 102E 53
dci L135B ; 102F 2A 13 5B
pi L0822 ; 1032 28 08 22
;-------------------------------------------------------------------------------
; Repositioning and formation/zone tests (strongly likely).
; Copies coordinate state, evaluates object zones and finds minimum distances
; against object records O30-O33. r10 bit 4 records the proximity condition.
;-------------------------------------------------------------------------------
L1035: pi L08B0 ; 1035 28 08 B0
lis 8 ; 1038 78
ns $A ; 1039 FA
bnz L10B9 ; 103A 94 7E
lisu 2 ; 103C 62
lisl 6 ; 103D 6E
lr A, I ; 103E 4D
lr 7, A ; 103F 57
lr A, I ; 1040 4D
lisu 2 ; 1041 62
lisl 1 ; 1042 69
lr D, A ; 1043 5E
lr A, 7 ; 1044 47
lr S, A ; 1045 5C
li $20 ; 1046 20 20
ns $A ; 1048 FA
bz L104E ; 1049 84 04
L104B: jmp L10E0 ; 104B 29 10 E0
L104E: lisu 7 ; 104E 67
lisl 3 ; 104F 6B
as S ; 1050 CC
bp L104B ; 1051 81 F9
lis 3 ; 1053 73
xs 9 ; 1054 E9
bnz L104B ; 1055 94 F5
lr 9, A ; 1057 59
lis 8 ; 1058 78
as $A ; 1059 CA
lr $A, A ; 105A 5A
lisl 6 ; 105B 6E
lr A, S ; 105C 4C
ci 6 ; 105D 25 06
bp L1096 ; 105F 81 36
lr A, $A ; 1061 4A
oi 2 ; 1062 22 02
lr $A, A ; 1064 5A
lisl 4 ; 1065 6C
lr A, I ; 1066 4D
sr 4 ; 1067 14
sr 1 ; 1068 12
ai $A ; 1069 24 0A
as S ; 106B CC
lisl 1 ; 106C 69
lr S, A ; 106D 5C
lisl 6 ; 106E 6E
lis 7 ; 106F 77
xs S ; 1070 EC
bnz L1096 ; 1071 94 24
lisl 1 ; 1073 69
lr A, S ; 1074 4C
ai $FD ; 1075 24 FD
lr S, A ; 1077 5C
lis 1 ; 1078 71
ns $A ; 1079 FA
lisu 2 ; 107A 62
lisl 0 ; 107B 68
bnz L1083 ; 107C 94 06
li $F6 ; 107E 20 F6
as S ; 1080 CC
br L1087 ; 1081 90 05
L1083: lr A, S ; 1083 4C
com ; 1084 18
ai $61 ; 1085 24 61
L1087: lr 5, A ; 1087 55
lisu 7 ; 1088 67
lisl 4 ; 1089 6C
li $3F ; 108A 20 3F
ns D ; 108C FE
as 5 ; 108D C5
ci $39 ; 108E 25 39
clr ; 1090 70
bp L1095 ; 1091 81 03
li $20 ; 1093 20 20
L1095: lr S, A ; 1095 5C
L1096: lr A, $A ; 1096 4A
oi $40 ; 1097 22 40
lr $A, A ; 1099 5A
lisu 7 ; 109A 67
lisl 3 ; 109B 6B
li $10 ; 109C 20 10
ns S ; 109E FC
lis 6 ; 109F 76
bnz L10A9 ; 10A0 94 08
li $20 ; 10A2 20 20
ns S ; 10A4 FC
lis $A ; 10A5 7A
bnz L10A9 ; 10A6 94 02
lis 2 ; 10A8 72
L10A9: lr 7, A ; 10A9 57
lis 1 ; 10AA 71
ns $A ; 10AB FA
bz L10B5 ; 10AC 84 08
li $30 ; 10AE 20 30
ns S ; 10B0 FC
lis $F ; 10B1 7F
bnz L10B5 ; 10B2 94 02
lis 3 ; 10B4 73
L10B5: lisu 6 ; 10B5 66
lisl 7 ; 10B6 6F
xs 7 ; 10B7 E7
lr S, A ; 10B8 5C
L10B9: lisu 2 ; 10B9 62
lisl 0 ; 10BA 68
lr A, I ; 10BB 4D
com ; 10BC 18
inc ; 10BD 1F
lr 4, A ; 10BE 54
lr A, D ; 10BF 4E
com ; 10C0 18
inc ; 10C1 1F
lr 5, A ; 10C2 55
lisu 3 ; 10C3 63
lisl 0 ; 10C4 68
L10C5: lr A, I ; 10C5 4D
as 4 ; 10C6 C4
bp L10CB ; 10C7 81 03
com ; 10C9 18
inc ; 10CA 1F
L10CB: lr 2, A ; 10CB 52
lr A, I ; 10CC 4D
as 5 ; 10CD C5
bp L10D2 ; 10CE 81 03
com ; 10D0 18
inc ; 10D1 1F
L10D2: as 2 ; 10D2 C2
ci $F ; 10D3 25 0F
bnc L10DB ; 10D5 92 05
lr A, $A ; 10D7 4A
oi $10 ; 10D8 22 10
lr $A, A ; 10DA 5A
L10DB: lr A, IS ; 10DB 0A
ci $1C ; 10DC 25 1C
bp L10C5 ; 10DE 81 E6
;-------------------------------------------------------------------------------
; Player/object turn and automatic movement selection (strongly likely).
; Select control- or table-driven movement, iterate object groups and route the
; resulting event to the common frame/state handlers.
;-------------------------------------------------------------------------------
L10E0: lisu 7 ; 10E0 67
lisl 5 ; 10E1 6D
lr A, S ; 10E2 4C
com ; 10E3 18
inc ; 10E4 1F
lisl 1 ; 10E5 69
as S ; 10E6 CC
clr ; 10E7 70
lr 0, A ; 10E8 50
bm L10EE ; 10E9 91 04
lisu 6 ; 10EB 66
lisl 7 ; 10EC 6F
lr A, S ; 10ED 4C
L10EE: lr 4, A ; 10EE 54
lis 8 ; 10EF 78
ns $A ; 10F0 FA
bz L10F6 ; 10F1 84 04
pi L0A24 ; 10F3 28 0A 24
L10F6: lis 2 ; 10F6 72
ns $A ; 10F7 FA
bnz L10FD ; 10F8 94 04
jmp L1137 ; 10FA 29 11 37
L10FD: lis 6 ; 10FD 76
lr 0, A ; 10FE 50
L10FF: pi L0A1F ; 10FF 28 0A 1F
ds 0 ; 1102 30
bnz L10FF ; 1103 94 FB
pi L08C1 ; 1105 28 08 C1
lis $C ; 1108 7C
lr 0, A ; 1109 50
lis 8 ; 110A 78
ns $A ; 110B FA
bz L111A ; 110C 84 0D
L110E: pi L0A1F ; 110E 28 0A 1F
ds 0 ; 1111 30
lr A, 0 ; 1112 40
ci 6 ; 1113 25 06
bm L110E ; 1115 91 F8
jmp L1227 ; 1117 29 12 27
L111A: com ; 111A 18
inc ; 111B 1F
as 9 ; 111C C9
bnz L1124 ; 111D 94 06
pi L0A1F ; 111F 28 0A 1F
br L112E ; 1122 90 0B
L1124: lis 1 ; 1124 71
ns $A ; 1125 FA
lis 2 ; 1126 72
bnz L112A ; 1127 94 02
lis 1 ; 1129 71
L112A: lr 4, A ; 112A 54
pi L0A24 ; 112B 28 0A 24
L112E: ds 0 ; 112E 30
lr A, 0 ; 112F 40
ci 6 ; 1130 25 06
bm L111A ; 1132 91 E7
jmp L1200 ; 1134 29 12 00
;-------------------------------------------------------------------------------
; Formation lookup and object movement (strongly likely).
; Split L08C7 results into nibbles, normalize direction bits, read L1297-based
; formation records through L08DA and apply resulting moves.
;-------------------------------------------------------------------------------
L1137: lis 2 ; 1137 72
lr 0, A ; 1138 50
pi L08C7 ; 1139 28 08 C7
ni $F0 ; 113C 21 F0
sr 4 ; 113E 14
lr 7, A ; 113F 57
pi L0A10 ; 1140 28 0A 10
ds 0 ; 1143 30
pi L08C7 ; 1144 28 08 C7
ni $F ; 1147 21 0F
lr 7, A ; 1149 57
pi L0A10 ; 114A 28 0A 10
lis 3 ; 114D 73
lr 0, A ; 114E 50
xs 9 ; 114F E9
bz L1159 ; 1150 84 08
clr ; 1152 70
lr 4, A ; 1153 54
pi L0A24 ; 1154 28 0A 24
br L1189 ; 1157 90 31
L1159: pi L0A1F ; 1159 28 0A 1F
lis 6 ; 115C 76
lr 0, A ; 115D 50
pi L08DA ; 115E 28 08 DA
lisu 5 ; 1161 65
lisl 4 ; 1162 6C
bnz L1166 ; 1163 94 02
lr S, A ; 1165 5C
L1166: li $F0 ; 1166 20 F0
ns S ; 1168 FC
sr 4 ; 1169 14
lr 7, A ; 116A 57
pi L0A10 ; 116B 28 0A 10
ds 0 ; 116E 30
lisu 5 ; 116F 65
lisl 4 ; 1170 6C
lis $F ; 1171 7F
ns S ; 1172 FC
lr 7, A ; 1173 57
pi L0A10 ; 1174 28 0A 10
ds 0 ; 1177 30
pi L08DA ; 1178 28 08 DA
lm ; 117B 16
lisu 5 ; 117C 65
lisl 5 ; 117D 6D
bnz L1181 ; 117E 94 02
lr S, A ; 1180 5C
L1181: lis $F ; 1181 7F
ns S ; 1182 FC
lr 7, A ; 1183 57
pi L0A10 ; 1184 28 0A 10
br L1194 ; 1187 90 0C
L1189: lis 6 ; 1189 76
lr 0, A ; 118A 50
L118B: pi L0A1F ; 118B 28 0A 1F
ds 0 ; 118E 30
lr A, 0 ; 118F 40
ci 3 ; 1190 25 03
bnz L118B ; 1192 94 F8
;-------------------------------------------------------------------------------
; Multi-object update and event evaluation (strongly likely).
; Compare object 12 and 11, read the opposing controller and update objects 10
; through 7 using direct controls or generated direction steps.
;-------------------------------------------------------------------------------
L1194: lis $C ; 1194 7C
lr 0, A ; 1195 50
pi L0D30 ; 1196 28 0D 30
ds 0 ; 1199 30
pi L0D30 ; 119A 28 0D 30
pi L08C1 ; 119D 28 08 C1
li $30 ; 11A0 20 30
ns S ; 11A2 FC
bz L11A9 ; 11A3 84 05
lr A, $A ; 11A5 4A
oi $40 ; 11A6 22 40
lr $A, A ; 11A8 5A
L11A9: lis $A ; 11A9 7A
lr 0, A ; 11AA 50
pi L0A1F ; 11AB 28 0A 1F
ds 0 ; 11AE 30
L11AF: li $40 ; 11AF 20 40
ns $A ; 11B1 FA
bnz L11CF ; 11B2 94 1C
lr A, 0 ; 11B4 40
ci 8 ; 11B5 25 08
bnz L11BD ; 11B7 94 05
lis 6 ; 11B9 76
lr 7, A ; 11BA 57
br L11BF ; 11BB 90 03
L11BD: lis 5 ; 11BD 75
lr 7, A ; 11BE 57
L11BF: lis 1 ; 11BF 71
lisu 7 ; 11C0 67
lisl 7 ; 11C1 6F
ns S ; 11C2 FC
lr 2, A ; 11C3 52
lr A, S ; 11C4 4C
ai $FF ; 11C5 24 FF
ni 2 ; 11C7 21 02
sr 1 ; 11C9 12
as 0 ; 11CA C0
ni 1 ; 11CB 21 01
bnz L11D4 ; 11CD 94 06
L11CF: pi L0A1F ; 11CF 28 0A 1F
br L11D7 ; 11D2 90 04
L11D4: pi L0D86 ; 11D4 28 0D 86
L11D7: ds 0 ; 11D7 30
lr A, 0 ; 11D8 40
ci 7 ; 11D9 25 07
bm L11AF ; 11DB 91 D3
lisu 7 ; 11DD 67
lisl 3 ; 11DE 6B
li $40 ; 11DF 20 40
ns S ; 11E1 FC
bnz L11FD ; 11E2 94 1A
lisl 7 ; 11E4 6F
lr A, D ; 11E5 4E
ci 4 ; 11E6 25 04
bp L11F8 ; 11E8 81 0F
lisu 7 ; 11EA 67
lisl 5 ; 11EB 6D
lr A, S ; 11EC 4C
ci $A ; 11ED 25 0A
bm L11F8 ; 11EF 91 08
lis 6 ; 11F1 76
lr 7, A ; 11F2 57
pi L0A10 ; 11F3 28 0A 10
br L1200 ; 11F6 90 09
L11F8: pi L0D30 ; 11F8 28 0D 30
br L1200 ; 11FB 90 04
L11FD: pi L0A1F ; 11FD 28 0A 1F
L1200: lis 2 ; 1200 72
lr 5, A ; 1201 55
clr ; 1202 70
as 9 ; 1203 C9
bz L1227 ; 1204 84 22
ci 6 ; 1206 25 06
bm L120B ; 1208 91 02
ds 5 ; 120A 35
L120B: lis 1 ; 120B 71
ns $A ; 120C FA
bz L1210 ; 120D 84 02
ds 5 ; 120F 35
L1210: li $10 ; 1210 20 10
as 9 ; 1212 C9
as 9 ; 1213 C9
lr IS, A ; 1214 0B
lr A, S ; 1215 4C
ds 5 ; 1216 35
bz L1220 ; 1217 84 08
ci $57 ; 1219 25 57
bp L1227 ; 121B 81 0B
jmp L0D13 ; 121D 29 0D 13
L1220: ci $12 ; 1220 25 12
bm L1227 ; 1222 91 04
jmp L0D10 ; 1224 29 0D 10
;-------------------------------------------------------------------------------
; Frame/time update (strongly likely)
; Advance O75, apply timing increment from L124D to O63, propagate carry into
; O62, optionally redraw, then re-enter the active update path at L0FCD.
;-------------------------------------------------------------------------------
L1227: lisu 7 ; 1227 67
lisl 5 ; 1228 6D
lr A, S ; 1229 4C
inc ; 122A 1F
lr S, A ; 122B 5C
ci $60 ; 122C 25 60
bp L1232 ; 122E 81 03
ds S ; 1230 3C
ds S ; 1231 3C
L1232: dci L124D ; 1232 2A 12 4D
lisu 7 ; 1235 67
lisl 2 ; 1236 6A
lr A, S ; 1237 4C
adc ; 1238 8E
lm ; 1239 16
lisu 6 ; 123A 66
lisl 3 ; 123B 6B
as S ; 123C CC
lr S, A ; 123D 5C
bnc L124A ; 123E 92 0B
lisu 6 ; 1240 66
lisl 2 ; 1241 6A
clr ; 1242 70
as S ; 1243 CC
bz L1247 ; 1244 84 02
ds S ; 1246 3C
L1247: pi L09C4 ; 1247 28 09 C4
L124A: jmp L0FCD ; 124A 29 0F CD
;===============================================================================
; DATA TABLES $124D-$13E9
; This range is addressed from reachable code through DCI. It must remain raw
; data. Labels below describe known consumers; contents are preserved exactly.
;===============================================================================
; frame/tempo increment table used at L1232
L124D: .byte $50, $14, $1D, $38 ; 124D
; Delay/parameter table used by the short 1 kHz beep at L0C96.
L1251: .byte $48, $29, $01, $FF, $01, $00, $04, $00, $06, $00, $02, $00 ; 1251
; State lookup table used by L0DB3.
L125D: .byte $00, $03, $07, $AB, $05, $04, $06, $AB, $01, $02, $08 ; 125D
; Variable-length lookup/formation data consumed by L08C7.
L1268: .byte $08, $09, $0A, $0B, $0C, $17, $22, $23, $24, $77, $00, $77, $00, $77, $00, $77 ; 1268
.byte $00, $08, $00, $0C, $88, $0F, $81, $11, $80, $13, $01, $77, $11, $03, $00, $07 ; 1278
.byte $44, $0A, $50, $0C, $00, $0E, $00, $77, $11, $77, $00, $77, $00, $77, $00 ; 1288
; Variable-length lookup/formation data consumed by L08DA.
L1297: .byte $0A, $1C, $25, $34, $40, $52, $5B, $67, $67, $77, $11, $03, $03, $11, $01, $06 ; 1297
.byte $45, $01, $0F, $48, $01, $12, $08, $01, $17, $01, $01, $1B, $01, $04, $77, $06 ; 12A7
.byte $11, $01, $0A, $11, $00, $0C, $95, $00, $77, $03, $11, $01, $0E, $49, $00, $14 ; 12B7
.byte $04, $00, $19, $92, $01, $20, $98, $04, $77, $03, $51, $01, $12, $52, $01, $16 ; 12C7
.byte $14, $01, $1B, $91, $01, $77, $03, $11, $05, $07, $51, $05, $0A, $51, $05, $0D ; 12D7
.byte $12, $09, $0E, $15, $09, $21, $A5, $04, $77, $08, $15, $01, $0C, $55, $01, $10 ; 12E7
.byte $84, $01, $77, $02 ; 12F7
; Alternate state/formation table selected inside L0DCB.
L12FB: .byte $11, $08, $07, $11, $09, $0B, $58, $09, $0D, $15, $00, $77, $77, $77, $1E, $0A ; 12FB
.byte $22, $0A, $1C, $06, $24, $06, $1E, $02 ; 130B
; Primary state/formation table selected inside L0DCB.
L1313: .byte $22, $02, $1C, $02, $20, $02, $20, $07, $23, $0A, $2C, $03, $16, $02, $20, $08 ; 1313
.byte $16, $0B, $2C, $0C, $1C, $14, $1C, $02, $20, $02 ; 1323
; Three short selector/bitmap records chosen near L0BEC.
L132D: .byte $FF, $80 ; 132D
L132F: .byte $AA, $80 ; 132F
L1331: .byte $F7, $80 ; 1331
; Eight consecutive graphics parameter records rendered from L0E83.
L1333: .byte $09, $37, $41, $59, $01, $09, $0E, $41, $01, $2A, $09, $0E, $41, $59, $01, $61 ; 1333
.byte $0E, $41, $01, $2A, $0A, $0F, $C1, $57, $28, $58, $0C, $41, $01, $2E, $0A, $07 ; 1343
.byte $C1, $61, $05, $12, $0C, $41, $01, $2E ; 1353
; Graphics parameter block entered through L0822 at $102F.
L135B: .byte $17, $C1, $09, $11 ; 135B
; Fixed screen graphics parameter block entered through L0820 at $0E1F.
L135F: .byte $19, $11, $C1, $33, $07 ; 135F
; Packed sprite/glyph data indexed as L1364 + 2*r1 by L0840.
L1364: .byte $F6, $DE, $59, $2E, $E7, $CE, $E7, $9E, $B7, $92, $F3, $9E, $F3, $DE, $E5, $24 ; 1364
.byte $F7, $DE, $F7, $9E, $08, $20 ; 1374
; Sound-effect table consumed by L088E from $0C6D.
L137A: .byte $27, $67, $25, $47, $23, $27, $00 ; 137A
; Sound-effect table consumed by L088E from $0CB2.
L1381: .byte $04, $22, $07, $AB, $03, $BB, $08, $CC, $03, $34, $06, $12, $0D, $12, $0D, $12 ; 1381
.byte $00 ; 1391
; Sound-effect table consumed by L088E from $0EC4.
L1392: .byte $37, $6A, $1A, $61, $1B, $6A, $0E, $73, $1D, $73, $0D, $6A, $1D, $73, $0E, $73 ; 1392
.byte $1D, $73, $0E, $73, $1B, $6A, $1D, $73, $10, $82, $20, $82, $0F, $7B, $31, $82 ; 13A2
.byte $24, $90, $2B, $A2, $29, $9D, $24, $90, $20, $82, $1B, $6A, $16, $43, $18, $58 ; 13B2
.byte $0D, $6A, $20, $82, $0E, $73, $1B, $6A, $18, $58, $2B, $43, $00 ; 13C2
; Sound-effect table consumed by L088E from $0D27. The terminating zero is
; followed by unused ROM fill; retain all bytes to preserve the original image.
L13CF: .byte $31, $82, $0F, $7B, $24, $90, $20, $82, $41, $A2, $14, $9D, $31, $AD, $2B, $A2 ; 13CF
.byte $36, $B6, $36, $B6, $36, $B6, $36, $B6, $6D, $B6, $00, $FF, $FF, $FF, $FF, $FF ; 13DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 13EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 13FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 140F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 141F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 142F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 143F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 144F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 145F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 146F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 147F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 148F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 149F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 150F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 151F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 152F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 153F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 154F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 155F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 156F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 157F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 158F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 159F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 160F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 161F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 162F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 163F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 164F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 165F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 166F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 167F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 168F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 169F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16EF
.byte $FF, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 170F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 171F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 172F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 173F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 174F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 175F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 176F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 177F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 178F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 179F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17DF
.byte $FF, $00, $10, $E9, $1B, $DD, $E5, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 17EF
.byte $00 ; 17FF

IF 0

Smart data report
=================
Mode: enabled by -s or /s
Memory range: $0800-$17FF
Code bytes: 2630
Data bytes: 1466

DCI data roots from reachable code:
$1333 from $0E7E
$1392 from $0EC4
$135F from $0E1F
$1364 from $0840
$1313 from $0DCB
$12FB from $0DD8
$1331 from $0BEF
$132F from $0BF9
$132D from $0C00
$137A from $0C6D
$1251 from $0C97
$1381 from $0CB2
$125D from $0DB3
$135B from $102F
$13CF from $0D27
$124D from $1232
$1268 from $08C7
$1297 from $08DA

Data intervals emitted as .byte:
$0837-$0839 (3 bytes)
$0C40-$0C43 (4 bytes)
$124D-$17FF (1459 bytes)

ENDIF
</pre>

Disassembly:Videocart 24

2026-08-27T18:41:38Z

E5frog:

{{Incomplete Disassembly}}

This is the complete disassembly of the [[Channel F]] [[Videocart 24]] made with Peter Trauner's [[f8tool]]. Original code is copyright © 1978 (?) Zircon International.

<pre>
;===============================================================================
; VIDEOCART 24 / PRO FOOTBALL
; Commented disassembly
;
; Original binary copyright Zircon International, approximately 1978.
; Original disassembly generated with f8tool and reconstructed as compilable
; DASM/F8 source. This revision preserves all instructions, labels, data bytes,
; addresses and original address comments. Only explanatory comments and
; section headings have been added.
;
; Confidence terminology used below:
; confirmed directly established by I/O, data flow or control flow
; strongly likely supported by several independent code relationships
; preliminary descriptive working name, not an original symbol
;
; The range $124D-$17FF is emitted as data because reachable code addresses it
; through DC0. Routines and tables are described without changing binary data.
;===============================================================================

processor f8
org $0800

clrscrn equ $00D0

lr 5, A ; 0800 55
nop ; 0801 2B
li $D0 ; 0802 20 D0
lr 3, A ; 0804 53
pi clrscrn ; 0805 28 00 D0
lisu 6 ; 0808 66
lisl 1 ; 0809 69
li $21 ; 080A 20 21
lr S, A ; 080C 5C
lis 1 ; 080D 71
lr $A, A ; 080E 5A
jmp L0E68 ; 080F 29 0E 68
;-------------------------------------------------------------------------------
; set_isar_2x_r0_plus_10 (confirmed)
; Convert object index in r0 to the first byte of a two-byte scratchpad entry.
; Output: ISAR = $10 + 2*r0. A and ISAR are changed; r0 is preserved.
;-------------------------------------------------------------------------------
L0812: li $10 ; 0812 20 10
as 0 ; 0814 C0
as 0 ; 0815 C0
lr IS, A ; 0816 0B
pop ; 0817 1C
;-------------------------------------------------------------------------------
; delay_r5 (confirmed)
; Blocking two-level delay. A wraps through 256 INC operations for each r5
; count. r5 is consumed and returns as zero.
;-------------------------------------------------------------------------------
L0818: clr ; 0818 70
L0819: inc ; 0819 1F
bnz L0819 ; 081A 94 FE
ds 5 ; 081C 35
bnz L0818 ; 081D 94 FA
pop ; 081F 1C
;-------------------------------------------------------------------------------
; Graphics parameter entry points (strongly likely)
; L0820 reads r3, then L0822 reads r4, r2, r5 and r6 from DC0 before entering
; the common renderer. Observed use identifies r3/r4 as coordinates, r2 as
; color/mode, and r5/r6 as width/height counters.
;-------------------------------------------------------------------------------
L0820: lm ; 0820 16
lr 3, A ; 0821 53
L0822: lm ; 0822 16
lr 4, A ; 0823 54
lm ; 0824 16
lr 2, A ; 0825 52
lm ; 0826 16
lr 5, A ; 0827 55
lm ; 0828 16
lr 6, A ; 0829 56
br L084A ; 082A 90 1F
; draw_object_from_scratch: select solid/background mode, then read X/Y pair.
L082C: li $C1 ; 082C 20 C1
lr 2, A ; 082E 52
; Read a two-byte coordinate pair through ISAR with post-increment semantics.
L082F: lr A, I ; 082F 4D
lr 3, A ; 0830 53
ds 3 ; 0831 33
lr A, I ; 0832 4D
lr 4, A ; 0833 54
ds 4 ; 0834 34
br L083A ; 0835 90 04
.byte $20, $C1, $52 ; 0837
L083A: lis 3 ; 083A 73
lr 5, A ; 083B 55
; Short fixed-height graphics entry: use three rows.
L083C: lis 3 ; 083C 73
lr 6, A ; 083D 56
br L084A ; 083E 90 0B
; draw_bitmap_entry (confirmed graphics): select a two-byte glyph/sprite entry
; at L1364 + 2*r1 and use fixed dimensions 3 by 5.
L0840: dci L1364 ; 0840 2A 13 64
lr A, 1 ; 0843 41
adc ; 0844 8E
adc ; 0845 8E
lis 3 ; 0846 73
lr 5, A ; 0847 55
lis 5 ; 0848 75
lr 6, A ; 0849 56
;-------------------------------------------------------------------------------
; draw_bitmap_core (confirmed)
; Port 0: graphics write/strobe. Port 1: color. Port 4: inverted X.
; Port 5: inverted Y in low six bits and sound selection in high two bits.
; r7 is the serial bitmap mask; a new byte is fetched with LM when exhausted.
; r1 and r6 count columns and rows. Port 0 is cleared before return.
;-------------------------------------------------------------------------------
L084A: clr ; 084A 70
lr 7, A ; 084B 57
li $40 ; 084C 20 40
outs 0 ; 084E B0
lr A, 4 ; 084F 44
oi $C0 ; 0850 22 C0
com ; 0852 18
outs 5 ; 0853 B5
L0854: lr A, 3 ; 0854 43
com ; 0855 18
outs 4 ; 0856 B4
lr A, 5 ; 0857 45
lr 1, A ; 0858 51
L0859: lr A, 2 ; 0859 42
outs 1 ; 085A B1
ni 1 ; 085B 21 01
bnz L0873 ; 085D 94 15
com ; 085F 18
adc ; 0860 8E
lr A, 7 ; 0861 47
sr 1 ; 0862 12
lr 7, A ; 0863 57
bnz L086A ; 0864 94 05
lm ; 0866 16
li $80 ; 0867 20 80
lr 7, A ; 0869 57
L086A: nm ; 086A 8A
bnz L0873 ; 086B 94 07
com ; 086D 18
outs 1 ; 086E B1
lis 2 ; 086F 72
ns 2 ; 0870 F2
bnz L087D ; 0871 94 0B
L0873: li $60 ; 0873 20 60
outs 0 ; 0875 B0
li $40 ; 0876 20 40
outs 0 ; 0878 B0
L0879: ai $F5 ; 0879 24 F5
bp L0879 ; 087B 81 FD
L087D: ins 4 ; 087D A4
ai $FF ; 087E 24 FF
outs 4 ; 0880 B4
ds 1 ; 0881 31
bnz L0859 ; 0882 94 D6
ins 5 ; 0884 A5
ai $FF ; 0885 24 FF
outs 5 ; 0887 B5
ds 6 ; 0888 36
bnz L0854 ; 0889 94 CA
clr ; 088B 70
outs 0 ; 088C B0
pop ; 088D 1C
;-------------------------------------------------------------------------------
; play_sound_table (confirmed)
; DC0 points to pairs: repetition/group count followed by delay value. A zero
; count terminates. The routine alternates $80 (500 Hz) and $00 on port 5;
; r5 controls both on-time and off-time, while r4/r7 group the pulses.
;-------------------------------------------------------------------------------
L088E: lis 3 ; 088E 73
lr 4, A ; 088F 54
L0890: inc ; 0890 1F
bnz L0890 ; 0891 94 FE
am ; 0893 88
lr 7, A ; 0894 57
bz L08AF ; 0895 84 19
lm ; 0897 16
lr 5, A ; 0898 55
L0899: li $80 ; 0899 20 80
outs 5 ; 089B B5
lr A, 5 ; 089C 45
L089D: inc ; 089D 1F
bnz L089D ; 089E 94 FE
outs 5 ; 08A0 B5
lr A, 5 ; 08A1 45
L08A2: inc ; 08A2 1F
bnz L08A2 ; 08A3 94 FE
ds 4 ; 08A5 34
bnz L0899 ; 08A6 94 F2
lis 3 ; 08A8 73
lr 4, A ; 08A9 54
ds 7 ; 08AA 37
bnz L0899 ; 08AB 94 ED
br L088E ; 08AD 90 E0
L08AF: pop ; 08AF 1C
;-------------------------------------------------------------------------------
; read_controller_a / read_controller_b (strongly likely)
; Select one of two controller I/O paths according to r10 bit 0. The selected
; input is inverted and stored in O73. L08C1 selects the opposite input path.
;-------------------------------------------------------------------------------
L08B0: lis 1 ; 08B0 71
ns $A ; 08B1 FA
bz L08B9 ; 08B2 84 06
L08B4: clr ; 08B4 70
outs 4 ; 08B5 B4
ins 4 ; 08B6 A4
br L08BC ; 08B7 90 04
L08B9: clr ; 08B9 70
outs 1 ; 08BA B1
ins 1 ; 08BB A1
L08BC: com ; 08BC 18
lisu 7 ; 08BD 67
lisl 3 ; 08BE 6B
lr S, A ; 08BF 5C
pop ; 08C0 1C
L08C1: lis 1 ; 08C1 71
ns $A ; 08C2 FA
bz L08B4 ; 08C3 84 F0
br L08B9 ; 08C5 90 F3
;-------------------------------------------------------------------------------
; lookup_table_1268 (confirmed table lookup)
; Index table L1268 from scratchpad state and accumulate variable-length data.
;-------------------------------------------------------------------------------
L08C7: dci L1268 ; 08C7 2A 12 68
lisu 7 ; 08CA 67
lisl 6 ; 08CB 6E
lr A, D ; 08CC 4E
adc ; 08CD 8E
lm ; 08CE 16
adc ; 08CF 8E
lr A, S ; 08D0 4C
com ; 08D1 18
inc ; 08D2 1F
lr 4, A ; 08D3 54
L08D4: lm ; 08D4 16
as 4 ; 08D5 C4
lm ; 08D6 16
bm L08D4 ; 08D7 91 FC
pop ; 08D9 1C
; lookup_table_1297 (confirmed table lookup)
; Parallel lookup using L1297, with a three-byte accumulation stride.
L08DA: dci L1297 ; 08DA 2A 12 97
lisu 7 ; 08DD 67
lisl 6 ; 08DE 6E
lr A, D ; 08DF 4E
adc ; 08E0 8E
lm ; 08E1 16
adc ; 08E2 8E
lr A, S ; 08E3 4C
com ; 08E4 18
inc ; 08E5 1F
lr 4, A ; 08E6 54
L08E7: lm ; 08E7 16
lm ; 08E8 16
as 4 ; 08E9 C4
lm ; 08EA 16
bm L08E7 ; 08EB 91 FB
pop ; 08ED 1C
;-------------------------------------------------------------------------------
; calc_small_index_a (preliminary)
; Return a small class in r5 according to r0 and player/side flag r10 bit 0.
;-------------------------------------------------------------------------------
L08EE: lis 2 ; 08EE 72
lr 5, A ; 08EF 55
lr A, 0 ; 08F0 40
ci 6 ; 08F1 25 06
bm L08F6 ; 08F3 91 02
ds 5 ; 08F5 35
L08F6: lis 1 ; 08F6 71
ns $A ; 08F7 FA
bz L08FB ; 08F8 84 02
ds 5 ; 08FA 35
L08FB: ds 5 ; 08FB 35
pop ; 08FC 1C
; calc_small_index_b (preliminary)
; Return a small class in r5 from the relation between r0 and r4.
L08FD: lis 2 ; 08FD 72
lr 5, A ; 08FE 55
li $F9 ; 08FF 20 F9
as 0 ; 0901 C0
bm L0905 ; 0902 91 02
ds 5 ; 0904 35
L0905: li $F9 ; 0905 20 F9
as 4 ; 0907 C4
bm L090B ; 0908 91 02
ds 5 ; 090A 35
L090B: ds 5 ; 090B 35
pop ; 090C 1C
;-------------------------------------------------------------------------------
; update_motion_or_collision_vector (strongly likely)
; Compare object coordinate pairs stored at $10 + 2*index. The block computes
; absolute differences, applies side/direction flags, and records an event in
; r11 bit 1 when the tested geometric condition is met.
;-------------------------------------------------------------------------------
L090D: lisu 6 ; 090D 66
lisl 5 ; 090E 6D
li $64 ; 090F 20 64
lr I, A ; 0911 5D
lr A, 9 ; 0912 49
lr S, A ; 0913 5C
lisl 4 ; 0914 6C
lr A, 4 ; 0915 44
lr S, A ; 0916 5C
lis 6 ; 0917 76
lr 9, A ; 0918 59
L0919: li $10 ; 0919 20 10
as 8 ; 091B C8
as 8 ; 091C C8
lr IS, A ; 091D 0B
lr A, S ; 091E 4C
lr 7, A ; 091F 57
li $FE ; 0920 20 FE
lr 5, A ; 0922 55
li $10 ; 0923 20 10
as 9 ; 0925 C9
as 9 ; 0926 C9
lr IS, A ; 0927 0B
lr A, 7 ; 0928 47
com ; 0929 18
inc ; 092A 1F
as S ; 092B CC
lr 7, A ; 092C 57
bp L0931 ; 092D 81 03
com ; 092F 18
inc ; 0930 1F
L0931: lr 4, A ; 0931 54
lis 1 ; 0932 71
ns $A ; 0933 FA
bz L093A ; 0934 84 05
lr A, 7 ; 0936 47
com ; 0937 18
inc ; 0938 1F
lr 7, A ; 0939 57
L093A: lr A, 5 ; 093A 45
inc ; 093B 1F
inc ; 093C 1F
lr 5, A ; 093D 55
lr A, 4 ; 093E 44
ai $FD ; 093F 24 FD
lr 4, A ; 0941 54
bp L093A ; 0942 81 F7
lisu 6 ; 0944 66
lisl 7 ; 0945 6F
lis 8 ; 0946 78
ns S ; 0947 FC
bz L094E ; 0948 84 05
lr A, 5 ; 094A 45
com ; 094B 18
inc ; 094C 1F
lr 5, A ; 094D 55
L094E: lis $C ; 094E 7C
ns S ; 094F FC
bnz L0953 ; 0950 94 02
lr 5, A ; 0952 55
L0953: lis 1 ; 0953 71
ns $A ; 0954 FA
bnz L095B ; 0955 94 05
lr A, 5 ; 0957 45
com ; 0958 18
inc ; 0959 1F
lr 5, A ; 095A 55
L095B: clr ; 095B 70
as 7 ; 095C C7
bm L0963 ; 095D 91 05
lr A, 5 ; 095F 45
com ; 0960 18
inc ; 0961 1F
lr 5, A ; 0962 55
L0963: li $11 ; 0963 20 11
as 8 ; 0965 C8
as 8 ; 0966 C8
lr IS, A ; 0967 0B
lr A, S ; 0968 4C
as 5 ; 0969 C5
com ; 096A 18
inc ; 096B 1F
lr 5, A ; 096C 55
li $11 ; 096D 20 11
as 9 ; 096F C9
as 9 ; 0970 C9
lr IS, A ; 0971 0B
lr A, S ; 0972 4C
as 5 ; 0973 C5
bp L0978 ; 0974 81 03
com ; 0976 18
inc ; 0977 1F
L0978: lr 5, A ; 0978 55
com ; 0979 18
lisu 6 ; 097A 66
lisl 5 ; 097B 6D
as S ; 097C CC
bm L09B3 ; 097D 91 35
lr A, 5 ; 097F 45
lr S, A ; 0980 5C
clr ; 0981 70
as 7 ; 0982 C7
bp L09AF ; 0983 81 2B
lr A, $B ; 0985 4B
ni $FD ; 0986 21 FD
lr $B, A ; 0988 5B
li $10 ; 0989 20 10
as 8 ; 098B C8
as 8 ; 098C C8
lr IS, A ; 098D 0B
lr A, S ; 098E 4C
sr 1 ; 098F 12
as S ; 0990 CC
lr 5, A ; 0991 55
lisu 2 ; 0992 62
lisl 6 ; 0993 6E
lr A, S ; 0994 4C
sr 1 ; 0995 12
com ; 0996 18
inc ; 0997 1F
as 5 ; 0998 C5
lr 5, A ; 0999 55
li $10 ; 099A 20 10
as 9 ; 099C C9
as 9 ; 099D C9
lr IS, A ; 099E 0B
lr A, S ; 099F 4C
com ; 09A0 18
inc ; 09A1 1F
as 5 ; 09A2 C5
lr 5, A ; 09A3 55
lis 1 ; 09A4 71
ns $A ; 09A5 FA
bz L09AC ; 09A6 84 05
lr A, 5 ; 09A8 45
com ; 09A9 18
inc ; 09AA 1F
lr 5, A ; 09AB 55
L09AC: ds 5 ; 09AC 35
bp L09B3 ; 09AD 81 05
L09AF: lr A, $B ; 09AF 4B
oi 2 ; 09B0 22 02
lr $B, A ; 09B2 5B
L09B3: ds 9 ; 09B3 39
lr A, 9 ; 09B4 49
ci 3 ; 09B5 25 03
bp L09BC ; 09B7 81 04
jmp L0919 ; 09B9 29 09 19
L09BC: lisu 6 ; 09BC 66
lisl 6 ; 09BD 6E
lr A, S ; 09BE 4C
lr 9, A ; 09BF 59
lisl 4 ; 09C0 6C
lr A, S ; 09C1 4C
lr 4, A ; 09C2 54
pop ; 09C3 1C
;-------------------------------------------------------------------------------
; draw_player_or_marker (strongly likely)
; Save the nested return in K, derive a screen position from O61/O62, and draw
; four component glyphs through L0840. Return through PK.
;-------------------------------------------------------------------------------
L09C4: lr K, P ; 09C4 08
lisu 6 ; 09C5 66
lisl 1 ; 09C6 69
lr A, I ; 09C7 4D
ci $32 ; 09C8 25 32
li $3C ; 09CA 20 3C
bp L09D0 ; 09CC 81 03
li $19 ; 09CE 20 19
L09D0: lr 3, A ; 09D0 53
clr ; 09D1 70
lr 1, A ; 09D2 51
as S ; 09D3 CC
lr 8, A ; 09D4 58
bz L09E4 ; 09D5 84 0E
L09D7: lr A, 8 ; 09D7 48
ai $C4 ; 09D8 24 C4
ci $C3 ; 09DA 25 C3
bnc L09E4 ; 09DC 92 07
lr 8, A ; 09DE 58
lr A, 1 ; 09DF 41
inc ; 09E0 1F
lr 1, A ; 09E1 51
br L09D7 ; 09E2 90 F4
L09E4: lis 7 ; 09E4 77
lr 4, A ; 09E5 54
li $40 ; 09E6 20 40
lr 2, A ; 09E8 52
pi L0840 ; 09E9 28 08 40
lis 4 ; 09EC 74
as 3 ; 09ED C3
lr 3, A ; 09EE 53
lis $A ; 09EF 7A
lr 1, A ; 09F0 51
pi L0840 ; 09F1 28 08 40
lis 3 ; 09F4 73
as 3 ; 09F5 C3
lr 3, A ; 09F6 53
clr ; 09F7 70
L09F8: lr 1, A ; 09F8 51
lr A, 8 ; 09F9 48
ai $F6 ; 09FA 24 F6
bm L0A04 ; 09FC 91 07
lr 8, A ; 09FE 58
lr A, 1 ; 09FF 41
inc ; 0A00 1F
lr 1, A ; 0A01 51
br L09F8 ; 0A02 90 F5
L0A04: pi L0840 ; 0A04 28 08 40
lis 4 ; 0A07 74
as 3 ; 0A08 C3
lr 3, A ; 0A09 53
lr A, 8 ; 0A0A 48
lr 1, A ; 0A0B 51
pi L0840 ; 0A0C 28 08 40
pk ; 0A0F 0C
;-------------------------------------------------------------------------------
; normalize_control_bits (strongly likely)
; Copy direction bits from r7 to r4 and mirror selected bits for the active side.
;-------------------------------------------------------------------------------
L0A10: lr A, 7 ; 0A10 47
lr 4, A ; 0A11 54
lis 1 ; 0A12 71
ns $A ; 0A13 FA
bnz L0A1D ; 0A14 94 08
lis 3 ; 0A16 73
ns 4 ; 0A17 F4
bz L0A1D ; 0A18 84 04
lis 3 ; 0A1A 73
xs 4 ; 0A1B E4
lr 4, A ; 0A1C 54
L0A1D: br L0A24 ; 0A1D 90 06
; read_control_nibble (strongly likely): load low four bits of O73 into r4.
L0A1F: lisu 7 ; 0A1F 67
lisl 3 ; 0A20 6B
lis $F ; 0A21 7F
ns S ; 0A22 FC
lr 4, A ; 0A23 54
;-------------------------------------------------------------------------------
; apply_direction_and_move (strongly likely)
; Decode r4 bits 0-3 into signed horizontal and vertical steps in r3/r6, then
; apply object-, side- and boundary-specific movement rules.
;-------------------------------------------------------------------------------
L0A24: lr K, P ; 0A24 08
clr ; 0A25 70
lr 3, A ; 0A26 53
lr 6, A ; 0A27 56
lis 1 ; 0A28 71
ns 4 ; 0A29 F4
bz L0A2E ; 0A2A 84 03
lis 1 ; 0A2C 71
lr 3, A ; 0A2D 53
L0A2E: lis 2 ; 0A2E 72
ns 4 ; 0A2F F4
bz L0A33 ; 0A30 84 02
ds 3 ; 0A32 33
L0A33: nop ; 0A33 2B
lis 4 ; 0A34 74
ns 4 ; 0A35 F4
bz L0A3A ; 0A36 84 03
lis 1 ; 0A38 71
lr 6, A ; 0A39 56
L0A3A: lis 8 ; 0A3A 78
ns 4 ; 0A3B F4
bz L0A3F ; 0A3C 84 02
ds 6 ; 0A3E 36
L0A3F: clr ; 0A3F 70
as 0 ; 0A40 C0
bnz L0A61 ; 0A41 94 1F
lr A, 6 ; 0A43 46
sl 1 ; 0A44 13
lr 6, A ; 0A45 56
lr A, 3 ; 0A46 43
bz L0A4D ; 0A47 84 05
sl 1 ; 0A49 13
sl 1 ; 0A4A 13
br L0A4F ; 0A4B 90 03
L0A4D: sl 1 ; 0A4D 13
as 3 ; 0A4E C3
L0A4F: lr 3, A ; 0A4F 53
lisu 7 ; 0A50 67
lisl 6 ; 0A51 6E
lr A, D ; 0A52 4E
ci 6 ; 0A53 25 06
bp L0A73 ; 0A55 81 1D
lis 1 ; 0A57 71
ns S ; 0A58 FC
bnz L0A5D ; 0A59 94 03
li $FF ; 0A5B 20 FF
L0A5D: as 6 ; 0A5D C6
lr 6, A ; 0A5E 56
br L0A73 ; 0A5F 90 13
L0A61: lisu 7 ; 0A61 67
lisl 6 ; 0A62 6E
lis 7 ; 0A63 77
xs S ; 0A64 EC
bnz L0A73 ; 0A65 94 0D
lis 3 ; 0A67 73
xs 9 ; 0A68 E9
bnz L0A73 ; 0A69 94 09
lr A, 0 ; 0A6B 40
ci 6 ; 0A6C 25 06
bm L0A73 ; 0A6E 91 04
clr ; 0A70 70
lr 3, A ; 0A71 53
lr 6, A ; 0A72 56
L0A73: lis 2 ; 0A73 72
ns $A ; 0A74 FA
bnz L0A9A ; 0A75 94 24
lr A, 0 ; 0A77 40
ci 6 ; 0A78 25 06
bp L0A9A ; 0A7A 81 1F
ci $C ; 0A7C 25 0C
bm L0A9A ; 0A7E 91 1B
lis 3 ; 0A80 73
xs 9 ; 0A81 E9
bnz L0A89 ; 0A82 94 06
li $20 ; 0A84 20 20
ns $A ; 0A86 FA
bz L0A9A ; 0A87 84 12
L0A89: lisl 4 ; 0A89 6C
lr A, S ; 0A8A 4C
sl 4 ; 0A8B 15
sl 1 ; 0A8C 13
as S ; 0A8D CC
ai $73 ; 0A8E 24 73
lr S, A ; 0A90 5C
lr A, S ; 0A91 4C
sr 4 ; 0A92 14
sr 1 ; 0A93 12
sr 1 ; 0A94 12
bnz L0A9A ; 0A95 94 04
lr A, 3 ; 0A97 43
sl 1 ; 0A98 13
lr 3, A ; 0A99 53
;-------------------------------------------------------------------------------
; Central object/collision pass (strongly likely)
; Iterate two-byte object records, test position limits and collisions, and set
; event bits in r11. O53/O54 hold a temporary coordinate pair.
;-------------------------------------------------------------------------------
L0A9A: clr ; 0A9A 70
lr $B, A ; 0A9B 5B
L0A9C: pi L0812 ; 0A9C 28 08 12
lr A, I ; 0A9F 4D
as 3 ; 0AA0 C3
lr 1, A ; 0AA1 51
lr A, S ; 0AA2 4C
as 6 ; 0AA3 C6
lisu 5 ; 0AA4 65
lisl 3 ; 0AA5 6B
lr 2, A ; 0AA6 52
lr D, A ; 0AA7 5E
lr A, 1 ; 0AA8 41
lr I, A ; 0AA9 5D
lr A, D ; 0AAA 4E
ci $F ; 0AAB 25 0F
bp L0AB3 ; 0AAD 81 05
ci $35 ; 0AAF 25 35
bp L0AD2 ; 0AB1 81 20
L0AB3: clr ; 0AB3 70
as 0 ; 0AB4 C0
bz L0ACE ; 0AB5 84 18
lisu 5 ; 0AB7 65
lisl 4 ; 0AB8 6C
ci 5 ; 0AB9 25 05
bnz L0AC2 ; 0ABB 94 06
lis $C ; 0ABD 7C
xs S ; 0ABE EC
lr S, A ; 0ABF 5C
br L0ACA ; 0AC0 90 09
L0AC2: ci 6 ; 0AC2 25 06
bnz L0ACA ; 0AC4 94 05
li $C0 ; 0AC6 20 C0
xs S ; 0AC8 EC
lr S, A ; 0AC9 5C
L0ACA: clr ; 0ACA 70
lr 6, A ; 0ACB 56
br L0A9C ; 0ACC 90 CF
L0ACE: lr A, $B ; 0ACE 4B
oi $10 ; 0ACF 22 10
lr $B, A ; 0AD1 5B
L0AD2: lr A, 1 ; 0AD2 41
ci $A ; 0AD3 25 0A
bp L0ADB ; 0AD5 81 05
ci $5F ; 0AD7 25 5F
bp L0AF5 ; 0AD9 81 1B
L0ADB: clr ; 0ADB 70
as 0 ; 0ADC C0
bnz L0AE5 ; 0ADD 94 07
lr A, $B ; 0ADF 4B
oi $40 ; 0AE0 22 40
lr $B, A ; 0AE2 5B
br L0AF5 ; 0AE3 90 11
L0AE5: lr A, 0 ; 0AE5 40
ci 5 ; 0AE6 25 05
lisu 5 ; 0AE8 65
lisl 4 ; 0AE9 6C
bnz L0AF1 ; 0AEA 94 06
lis 3 ; 0AEC 73
xs S ; 0AED EC
lr S, A ; 0AEE 5C
br L0AF1 ; 0AEF 90 01
L0AF1: clr ; 0AF1 70
lr 3, A ; 0AF2 53
br L0A9C ; 0AF3 90 A8
L0AF5: lis 8 ; 0AF5 78
ns $A ; 0AF6 FA
lis 1 ; 0AF7 71
bz L0AFB ; 0AF8 84 02
clr ; 0AFA 70
L0AFB: lr 4, A ; 0AFB 54
L0AFC: lr A, 4 ; 0AFC 44
xs 0 ; 0AFD E0
bz L0B0B ; 0AFE 84 0C
li $10 ; 0B00 20 10
as 4 ; 0B02 C4
as 4 ; 0B03 C4
lr IS, A ; 0B04 0B
lis 2 ; 0B05 72
as I ; 0B06 CD
com ; 0B07 18
as 1 ; 0B08 C1
bm L0B0E ; 0B09 91 04
L0B0B: jmp L0BB1 ; 0B0B 29 0B B1
L0B0E: ai 5 ; 0B0E 24 05
bm L0B0B ; 0B10 91 FA
lis 2 ; 0B12 72
as I ; 0B13 CD
com ; 0B14 18
as 2 ; 0B15 C2
bp L0B0B ; 0B16 81 F4
ai 5 ; 0B18 24 05
bm L0B0B ; 0B1A 91 F0
lr A, 0 ; 0B1C 40
lr 8, A ; 0B1D 58
lr A, 9 ; 0B1E 49
xs 4 ; 0B1F E4
bz L0B28 ; 0B20 84 07
lr A, 4 ; 0B22 44
lr 8, A ; 0B23 58
lr A, 9 ; 0B24 49
xs 0 ; 0B25 E0
bnz L0B8E ; 0B26 94 67
L0B28: clr ; 0B28 70
as 9 ; 0B29 C9
bnz L0B81 ; 0B2A 94 56
lr A, $B ; 0B2C 4B
ni $FD ; 0B2D 21 FD
lr $B, A ; 0B2F 5B
lisu 7 ; 0B30 67
lisl 6 ; 0B31 6E
lr A, D ; 0B32 4E
ci 6 ; 0B33 25 06
bp L0B55 ; 0B35 81 1F
lr A, S ; 0B37 4C
com ; 0B38 18
inc ; 0B39 1F
lisl 1 ; 0B3A 69
as S ; 0B3B CC
bp L0B0B ; 0B3C 81 CE
lr A, 8 ; 0B3E 48
ci 6 ; 0B3F 25 06
lr A, $B ; 0B41 4B
bm L0B49 ; 0B42 91 06
oi $E ; 0B44 22 0E
lr $B, A ; 0B46 5B
br L0B4E ; 0B47 90 06
L0B49: oi $A ; 0B49 22 0A
lr $B, A ; 0B4B 5B
lr A, 8 ; 0B4C 48
lr 9, A ; 0B4D 59
L0B4E: lr A, $A ; 0B4E 4A
oi 2 ; 0B4F 22 02
lr $A, A ; 0B51 5A
jmp L0BBC ; 0B52 29 0B BC
L0B55: lr A, 8 ; 0B55 48
ci 3 ; 0B56 25 03
bp L0B0B ; 0B58 81 B2
ci $A ; 0B5A 25 0A
bm L0B0B ; 0B5C 91 AE
lr A, $B ; 0B5E 4B
oi 2 ; 0B5F 22 02
lr $B, A ; 0B61 5B
lr A, 8 ; 0B62 48
ci 6 ; 0B63 25 06
bp L0B6E ; 0B65 81 08
pi L090D ; 0B67 28 09 0D
lis 2 ; 0B6A 72
ns $B ; 0B6B FB
bz L0BB1 ; 0B6C 84 44
L0B6E: lr A, 8 ; 0B6E 48
lr 9, A ; 0B6F 59
lr A, $B ; 0B70 4B
oi 8 ; 0B71 22 08
ni $FE ; 0B73 21 FE
lr $B, A ; 0B75 5B
lr A, 8 ; 0B76 48
ci 6 ; 0B77 25 06
bp L0B7F ; 0B79 81 05
lr A, $A ; 0B7B 4A
oi 2 ; 0B7C 22 02
lr $A, A ; 0B7E 5A
L0B7F: br L0BBC ; 0B7F 90 3C
L0B81: pi L08FD ; 0B81 28 08 FD
bnz L0B8E ; 0B84 94 09
lr A, $B ; 0B86 4B
oi 4 ; 0B87 22 04
ni $FE ; 0B89 21 FE
lr $B, A ; 0B8B 5B
br L0BBC ; 0B8C 90 2F
L0B8E: lr A, $B ; 0B8E 4B
oi 1 ; 0B8F 22 01
lr $B, A ; 0B91 5B
lr A, 3 ; 0B92 43
ci 1 ; 0B93 25 01
bp L0B9A ; 0B95 81 04
lis 1 ; 0B97 71
br L0BA0 ; 0B98 90 07
L0B9A: ci $FE ; 0B9A 25 FE
bm L0BA4 ; 0B9C 91 07
li $FF ; 0B9E 20 FF
L0BA0: lr 3, A ; 0BA0 53
L0BA1: jmp L0A9A ; 0BA1 29 0A 9A
L0BA4: pi L08FD ; 0BA4 28 08 FD
bz L0BB1 ; 0BA7 84 09
clr ; 0BA9 70
as 6 ; 0BAA C6
bz L0BBC ; 0BAB 84 10
clr ; 0BAD 70
lr 6, A ; 0BAE 56
br L0BA1 ; 0BAF 90 F1
L0BB1: lr A, 4 ; 0BB1 44
inc ; 0BB2 1F
lr 4, A ; 0BB3 54
ci $C ; 0BB4 25 0C
bm L0BBC ; 0BB6 91 05
jmp L0AFC ; 0BB8 29 0A FC
;-------------------------------------------------------------------------------
; Scene/state update entry (preliminary)
; Preserve nested return in K, redraw changed objects, update packed state and
; dispatch event sound or phase transitions.
;-------------------------------------------------------------------------------
L0BBB: lr K, P ; 0BBB 08
L0BBC: lis 8 ; 0BBC 78
ns $B ; 0BBD FB
bz L0BC9 ; 0BBE 84 0A
lr A, $A ; 0BC0 4A
ni $F7 ; 0BC1 21 F7
lr $A, A ; 0BC3 5A
lisu 2 ; 0BC4 62
lisl 0 ; 0BC5 68
pi L082C ; 0BC6 28 08 2C
L0BC9: pi L0812 ; 0BC9 28 08 12
pi L082C ; 0BCC 28 08 2C
li $58 ; 0BCF 20 58
lr 3, A ; 0BD1 53
pi L0812 ; 0BD2 28 08 12
lr A, I ; 0BD5 4D
ci $53 ; 0BD6 25 53
bm L0BE1 ; 0BD8 91 08
ci $17 ; 0BDA 25 17
bm L0BEC ; 0BDC 91 0F
li $12 ; 0BDE 20 12
lr 3, A ; 0BE0 53
L0BE1: lr A, S ; 0BE1 4C
lr 4, A ; 0BE2 54
ds 4 ; 0BE3 34
lis 1 ; 0BE4 71
lr 5, A ; 0BE5 55
li $41 ; 0BE6 20 41
lr 2, A ; 0BE8 52
pi L083C ; 0BE9 28 08 3C
L0BEC: li $80 ; 0BEC 20 80
lr 2, A ; 0BEE 52
dci L1331 ; 0BEF 2A 13 31
pi L08EE ; 0BF2 28 08 EE
bz L0BFC ; 0BF5 84 06
clr ; 0BF7 70
lr 2, A ; 0BF8 52
dci L132F ; 0BF9 2A 13 2F
L0BFC: clr ; 0BFC 70
as 0 ; 0BFD C0
bnz L0C0A ; 0BFE 94 0B
dci L132D ; 0C00 2A 13 2D
lis 8 ; 0C03 78
ns $B ; 0C04 FB
bz L0C0A ; 0C05 84 04
jmp L0C96 ; 0C07 29 0C 96
L0C0A: lr A, 9 ; 0C0A 49
com ; 0C0B 18
inc ; 0C0C 1F
as 0 ; 0C0D C0
bnz L0C13 ; 0C0E 94 04
li $40 ; 0C10 20 40
lr 2, A ; 0C12 52
L0C13: lisu 5 ; 0C13 65
lisl 2 ; 0C14 6A
lr A, I ; 0C15 4D
lr 3, A ; 0C16 53
lr A, S ; 0C17 4C
lr 4, A ; 0C18 54
lis 1 ; 0C19 71
ns $B ; 0C1A FB
bnz L0C24 ; 0C1B 94 08
pi L0812 ; 0C1D 28 08 12
lr A, 3 ; 0C20 43
lr I, A ; 0C21 5D
lr A, 4 ; 0C22 44
lr D, A ; 0C23 5E
L0C24: pi L0812 ; 0C24 28 08 12
pi L082F ; 0C27 28 08 2F
li $40 ; 0C2A 20 40
ns $B ; 0C2C FB
bz L0C5C ; 0C2D 84 2E
lisu 7 ; 0C2F 67
lisl 6 ; 0C30 6E
lr A, S ; 0C31 4C
ci 6 ; 0C32 25 06
bp L0C68 ; 0C34 81 33
ci 7 ; 0C36 25 07
bz L0C44 ; 0C38 84 0B
L0C3A: lr A, $B ; 0C3A 4B
oi 6 ; 0C3B 22 06
lr $B, A ; 0C3D 5B
br L0C96 ; 0C3E 90 57
.byte $5C, $29, $0E, $16 ; 0C40
L0C44: lisu 2 ; 0C44 62
lisl 1 ; 0C45 69
lr A, S ; 0C46 4C
ci $26 ; 0C47 25 26
bm L0C3A ; 0C49 91 F0
ci $1A ; 0C4B 25 1A
bp L0C3A ; 0C4D 81 EC
lisu 2 ; 0C4F 62
lisl 0 ; 0C50 68
lr A, S ; 0C51 4C
ci $32 ; 0C52 25 32
lis $B ; 0C54 7B
bm L0C58 ; 0C55 91 02
lis 3 ; 0C57 73
L0C58: lr 9, A ; 0C58 59
jmp L0D1C ; 0C59 29 0D 1C
L0C5C: li $10 ; 0C5C 20 10
ns $B ; 0C5E FB
bz L0C96 ; 0C5F 84 36
lisu 7 ; 0C61 67
lisl 6 ; 0C62 6E
lr A, S ; 0C63 4C
ci 6 ; 0C64 25 06
bm L0C3A ; 0C66 91 D3
L0C68: li $10 ; 0C68 20 10
ns $A ; 0C6A FA
bnz L0C93 ; 0C6B 94 27
L0C6D: dci L137A ; 0C6D 2A 13 7A
pi L088E ; 0C70 28 08 8E
lis 1 ; 0C73 71
ns $A ; 0C74 FA
lisu 6 ; 0C75 66
lisl 1 ; 0C76 69
lr A, S ; 0C77 4C
bz L0C87 ; 0C78 84 0E
ci $26 ; 0C7A 25 26
bp L0C82 ; 0C7C 81 05
ai $F6 ; 0C7E 24 F6
br L0C92 ; 0C80 90 11
L0C82: ai $12 ; 0C82 24 12
sr 1 ; 0C84 12
br L0C92 ; 0C85 90 0C
L0C87: ci $44 ; 0C87 25 44
bm L0C8F ; 0C89 91 05
ai $A ; 0C8B 24 0A
br L0C92 ; 0C8D 90 04
L0C8F: ai $58 ; 0C8F 24 58
sr 1 ; 0C91 12
L0C92: lr S, A ; 0C92 5C
L0C93: jmp L0E68 ; 0C93 29 0E 68
;-------------------------------------------------------------------------------
; play_short_beep_and_update_state (confirmed sound section)
; Select delay data through L1251, wait, pulse $40 (1 kHz) then $00 on port 5.
; The following path continues into event/state processing when required.
;-------------------------------------------------------------------------------
L0C96: nop ; 0C96 2B
dci L1251 ; 0C97 2A 12 51
lisu 7 ; 0C9A 67
lisl 2 ; 0C9B 6A
lr A, S ; 0C9C 4C
adc ; 0C9D 8E
adc ; 0C9E 8E
lm ; 0C9F 16
lr 5, A ; 0CA0 55
lm ; 0CA1 16
L0CA2: inc ; 0CA2 1F
bnz L0CA2 ; 0CA3 94 FE
ds 5 ; 0CA5 35
bnz L0CA2 ; 0CA6 94 FB
li $40 ; 0CA8 20 40
outs 5 ; 0CAA B5
clr ; 0CAB 70
outs 5 ; 0CAC B5
lis 4 ; 0CAD 74
ns $B ; 0CAE FB
bnz L0CB2 ; 0CAF 94 02
pk ; 0CB1 0C
L0CB2: dci L1381 ; 0CB2 2A 13 81
pi L088E ; 0CB5 28 08 8E
li $10 ; 0CB8 20 10
as 9 ; 0CBA C9
as 9 ; 0CBB C9
lr IS, A ; 0CBC 0B
lr A, S ; 0CBD 4C
lisu 6 ; 0CBE 66
lisl 1 ; 0CBF 69
inc ; 0CC0 1F
lr S, A ; 0CC1 5C
lr A, $B ; 0CC2 4B
ni $FB ; 0CC3 21 FB
lr $B, A ; 0CC5 5B
lis 1 ; 0CC6 71
ns $A ; 0CC7 FA
bz L0CCD ; 0CC8 84 04
lis 4 ; 0CCA 74
as $B ; 0CCB CB
lr $B, A ; 0CCC 5B
L0CCD: lis 2 ; 0CCD 72
ns $A ; 0CCE FA
bz L0CD4 ; 0CCF 84 04
lis 4 ; 0CD1 74
xs $B ; 0CD2 EB
lr $B, A ; 0CD3 5B
L0CD4: lis 4 ; 0CD4 74
ns $B ; 0CD5 FB
bz L0CF9 ; 0CD6 84 22
lr A, S ; 0CD8 4C
ci $58 ; 0CD9 25 58
bm L0D13 ; 0CDB 91 37
ci $11 ; 0CDD 25 11
bm L0CE8 ; 0CDF 91 08
lis 2 ; 0CE1 72
ns $A ; 0CE2 FA
bz L0CF2 ; 0CE3 84 0E
li $21 ; 0CE5 20 21
L0CE7: lr S, A ; 0CE7 5C
L0CE8: lis 2 ; 0CE8 72
ns $A ; 0CE9 FA
bnz L0CEF ; 0CEA 94 04
jmp L0E68 ; 0CEC 29 0E 68
L0CEF: jmp L0E16 ; 0CEF 29 0E 16
L0CF2: li $49 ; 0CF2 20 49
lr S, A ; 0CF4 5C
lis 2 ; 0CF5 72
L0CF6: lr 9, A ; 0CF6 59
br L0D27 ; 0CF7 90 2F
L0CF9: ds S ; 0CF9 3C
ds S ; 0CFA 3C
lr A, S ; 0CFB 4C
ci $11 ; 0CFC 25 11
bp L0D10 ; 0CFE 81 11
ci $58 ; 0D00 25 58
bp L0CE7 ; 0D02 81 E4
lis 2 ; 0D04 72
ns $A ; 0D05 FA
li $49 ; 0D06 20 49
bnz L0CE7 ; 0D08 94 DE
li $21 ; 0D0A 20 21
lr S, A ; 0D0C 5C
lis $A ; 0D0D 7A
br L0CF6 ; 0D0E 90 E7
L0D10: lis 7 ; 0D10 77
br L0D14 ; 0D11 90 02
L0D13: lis $F ; 0D13 7F
L0D14: lr 9, A ; 0D14 59
lis 2 ; 0D15 72
ns $A ; 0D16 FA
bz L0D1C ; 0D17 84 04
lis 1 ; 0D19 71
xs $A ; 0D1A EA
lr $A, A ; 0D1B 5A
L0D1C: lis 8 ; 0D1C 78
ns 9 ; 0D1D F9
lisu 6 ; 0D1E 66
lisl 1 ; 0D1F 69
li $49 ; 0D20 20 49
bnz L0D26 ; 0D22 94 03
li $21 ; 0D24 20 21
L0D26: lr S, A ; 0D26 5C
L0D27: dci L13CF ; 0D27 2A 13 CF
pi L088E ; 0D2A 28 08 8E
jmp L0E18 ; 0D2D 29 0E 18
;-------------------------------------------------------------------------------
; direction_from_coordinate_delta (strongly likely)
; Compare coordinate pair r9 with pair r0, form absolute X/Y differences and
; encode horizontal direction as 1/2 and vertical direction as 4/8 in r4.
;-------------------------------------------------------------------------------
L0D30: li $10 ; 0D30 20 10
as 9 ; 0D32 C9
as 9 ; 0D33 C9
lr IS, A ; 0D34 0B
lr A, I ; 0D35 4D
lr 5, A ; 0D36 55
lr A, S ; 0D37 4C
lr 6, A ; 0D38 56
li $10 ; 0D39 20 10
as 0 ; 0D3B C0
as 0 ; 0D3C C0
lr IS, A ; 0D3D 0B
lr A, I ; 0D3E 4D
com ; 0D3F 18
inc ; 0D40 1F
as 5 ; 0D41 C5
lr 5, A ; 0D42 55
bp L0D47 ; 0D43 81 03
com ; 0D45 18
inc ; 0D46 1F
L0D47: lr 4, A ; 0D47 54
lr A, S ; 0D48 4C
com ; 0D49 18
inc ; 0D4A 1F
as 6 ; 0D4B C6
lr 6, A ; 0D4C 56
bp L0D51 ; 0D4D 81 03
com ; 0D4F 18
inc ; 0D50 1F
L0D51: lr 3, A ; 0D51 53
com ; 0D52 18
inc ; 0D53 1F
as 4 ; 0D54 C4
clr ; 0D55 70
bm L0D5F ; 0D56 91 08
as 5 ; 0D58 C5
lis 1 ; 0D59 71
bp L0D5D ; 0D5A 81 02
lis 2 ; 0D5C 72
L0D5D: br L0D64 ; 0D5D 90 06
L0D5F: as 6 ; 0D5F C6
lis 4 ; 0D60 74
bp L0D64 ; 0D61 81 02
lis 8 ; 0D63 78
L0D64: lr 4, A ; 0D64 54
br L0D83 ; 0D65 90 1D
L0D67: li $10 ; 0D67 20 10
as 0 ; 0D69 C0
as 0 ; 0D6A C0
lr IS, A ; 0D6B 0B
lr A, I ; 0D6C 4D
com ; 0D6D 18
inc ; 0D6E 1F
as 5 ; 0D6F C5
bz L0D76 ; 0D70 84 05
lis 2 ; 0D72 72
bm L0D76 ; 0D73 91 02
lis 1 ; 0D75 71
L0D76: lr 4, A ; 0D76 54
lr A, S ; 0D77 4C
com ; 0D78 18
inc ; 0D79 1F
as 6 ; 0D7A C6
bz L0D81 ; 0D7B 84 05
lis 8 ; 0D7D 78
bm L0D81 ; 0D7E 91 02
lis 4 ; 0D80 74
L0D81: as 4 ; 0D81 C4
lr 4, A ; 0D82 54
L0D83: jmp L0A24 ; 0D83 29 0A 24
;-------------------------------------------------------------------------------
; choose_direction_step (strongly likely)
; Produce small signed steps, normally 0, 4 or $FC (-4), from side, state and
; current object coordinates; continue through the direction decoder.
;-------------------------------------------------------------------------------
L0D86: clr ; 0D86 70
lr 5, A ; 0D87 55
lr 6, A ; 0D88 56
as 2 ; 0D89 C2
ci 0 ; 0D8A 25 00
bnz L0D98 ; 0D8C 94 0B
lis 1 ; 0D8E 71
ns $A ; 0D8F FA
lis 4 ; 0D90 74
bnz L0D95 ; 0D91 94 03
li $FC ; 0D93 20 FC
L0D95: lr 5, A ; 0D95 55
br L0DA6 ; 0D96 90 0F
L0D98: li $11 ; 0D98 20 11
as 7 ; 0D9A C7
as 7 ; 0D9B C7
lr IS, A ; 0D9C 0B
lr A, S ; 0D9D 4C
ci $23 ; 0D9E 25 23
li $FC ; 0DA0 20 FC
bm L0DA5 ; 0DA2 91 02
lis 4 ; 0DA4 74
L0DA5: lr 6, A ; 0DA5 56
L0DA6: li $10 ; 0DA6 20 10
as 7 ; 0DA8 C7
as 7 ; 0DA9 C7
lr IS, A ; 0DAA 0B
lr A, I ; 0DAB 4D
as 5 ; 0DAC C5
lr 5, A ; 0DAD 55
lr A, S ; 0DAE 4C
as 6 ; 0DAF C6
lr 6, A ; 0DB0 56
br L0D67 ; 0DB1 90 B5
;-------------------------------------------------------------------------------
; lookup_state_table_125d (strongly likely)
; Replace the current scratchpad state through L125D and choose r0=6 or 12 from
; ISAR parity before entering the nested update worker.
;-------------------------------------------------------------------------------
L0DB3: dci L125D ; 0DB3 2A 12 5D
lr A, S ; 0DB6 4C
adc ; 0DB7 8E
lm ; 0DB8 16
lr S, A ; 0DB9 5C
lr A, IS ; 0DBA 0A
ni 1 ; 0DBB 21 01
lis $C ; 0DBD 7C
bnz L0DC1 ; 0DBE 94 02
lis 6 ; 0DC0 76
L0DC1: lr 0, A ; 0DC1 50
lisu 6 ; 0DC2 66
lisl 7 ; 0DC3 6F
clr ; 0DC4 70
lr S, A ; 0DC5 5C
; nested_state_update (strongly likely)
; Save the caller return from K in Q, process state/formation tables L1313 or
; L12FB, and return explicitly with LR P0,Q at L0E15.
L0DC6: lr K, P ; 0DC6 08
lr A, KU ; 0DC7 00
lr QU, A ; 0DC8 06
lr A, KL ; 0DC9 01
lr QL, A ; 0DCA 07
L0DCB: dci L1313 ; 0DCB 2A 13 13
lisu 6 ; 0DCE 66
lisl 1 ; 0DCF 69
lr A, S ; 0DD0 4C
lr 6, A ; 0DD1 56
lisu 6 ; 0DD2 66
lisl 7 ; 0DD3 6F
lis 4 ; 0DD4 74
ns S ; 0DD5 FC
bz L0DEB ; 0DD6 84 14
dci L12FB ; 0DD8 2A 12 FB
lr A, 0 ; 0DDB 40
ci 6 ; 0DDC 25 06
bm L0DEB ; 0DDE 91 0C
lis $C ; 0DE0 7C
adc ; 0DE1 8E
lis 1 ; 0DE2 71
ns $A ; 0DE3 FA
li $F6 ; 0DE4 20 F6
bnz L0DE9 ; 0DE6 94 02
lis $A ; 0DE8 7A
L0DE9: as 6 ; 0DE9 C6
lr 6, A ; 0DEA 56
L0DEB: lisu 5 ; 0DEB 65
lisl 3 ; 0DEC 6B
lr A, 0 ; 0DED 40
adc ; 0DEE 8E
adc ; 0DEF 8E
lm ; 0DF0 16
lr D, A ; 0DF1 5E
pi L08EE ; 0DF2 28 08 EE
lm ; 0DF5 16
bz L0DFA ; 0DF6 84 03
com ; 0DF8 18
inc ; 0DF9 1F
L0DFA: as 6 ; 0DFA C6
L0DFB: lr S, A ; 0DFB 5C
ci $C ; 0DFC 25 0C
bp L0E06 ; 0DFE 81 07
ci $5E ; 0E00 25 5E
bp L0E09 ; 0E02 81 06
ai $FE ; 0E04 24 FE
L0E06: inc ; 0E06 1F
br L0DFB ; 0E07 90 F3
L0E09: clr ; 0E09 70
lr $B, A ; 0E0A 5B
pi L0BBB ; 0E0B 28 0B BB
ds 0 ; 0E0E 30
bz L0E15 ; 0E0F 84 05
lis 6 ; 0E11 76
xs 0 ; 0E12 E0
bnz L0DCB ; 0E13 94 B7
L0E15: lr P0, Q ; 0E15 0D
;-------------------------------------------------------------------------------
; start_round_or_screen (strongly likely)
; Reset phase-local state, toggle r10 bit 0, draw fixed screen components, and
; initialize players/objects for the next side or round.
;-------------------------------------------------------------------------------
L0E16: clr ; 0E16 70
lr 9, A ; 0E17 59
L0E18: lis 1 ; 0E18 71
xs $A ; 0E19 EA
lr $A, A ; 0E1A 5A
lisu 6 ; 0E1B 66
lisl 0 ; 0E1C 68
clr ; 0E1D 70
lr S, A ; 0E1E 5C
; draw_fixed_screen_element: render parameter block L135F through L0820.
L0E1F: dci L135F ; 0E1F 2A 13 5F
pi L0820 ; 0E22 28 08 20
L0E25: lisu 5 ; 0E25 65
lisl 6 ; 0E26 6E
li $12 ; 0E27 20 12
lr 4, A ; 0E29 54
li $1B ; 0E2A 20 1B
lr 3, A ; 0E2C 53
clr ; 0E2D 70
lr 2, A ; 0E2E 52
L0E2F: lr A, S ; 0E2F 4C
sr 4 ; 0E30 14
lr 1, A ; 0E31 51
pi L0840 ; 0E32 28 08 40
lr A, I ; 0E35 4D
sl 4 ; 0E36 15
sr 4 ; 0E37 14
lr 1, A ; 0E38 51
lis 5 ; 0E39 75
as 3 ; 0E3A C3
lr 3, A ; 0E3B 53
pi L0840 ; 0E3C 28 08 40
li $43 ; 0E3F 20 43
lr 3, A ; 0E41 53
li $80 ; 0E42 20 80
lr 2, A ; 0E44 52
lr A, IS ; 0E45 0A
ci $2F ; 0E46 25 2F
bz L0E2F ; 0E48 84 E6
lis 7 ; 0E4A 77
ns 9 ; 0E4B F9
bz L0E60 ; 0E4C 84 13
ds 9 ; 0E4E 39
lis 8 ; 0E4F 78
ns 9 ; 0E50 F9
lisl 6 ; 0E51 6E
bnz L0E55 ; 0E52 94 02
lr A, I ; 0E54 4D
L0E55: li $67 ; 0E55 20 67
outs 5 ; 0E57 B5
lr 5, A ; 0E58 55
asd S ; 0E59 DC
lr S, A ; 0E5A 5C
pi L0818 ; 0E5B 28 08 18
br L0E25 ; 0E5E 90 C6
L0E60: lis 2 ; 0E60 72
lr 4, A ; 0E61 54
L0E62: pi L0818 ; 0E62 28 08 18
ds 4 ; 0E65 34
bnz L0E62 ; 0E66 94 FB
;-------------------------------------------------------------------------------
; advance_init_phase (confirmed counter behavior)
; Increment O60 and repeat initialization while the phase value is below four.
; After phase four, build the field and initialize active play state.
;-------------------------------------------------------------------------------
L0E68: lisu 6 ; 0E68 66
lisl 0 ; 0E69 68
lr A, S ; 0E6A 4C
inc ; 0E6B 1F
lr S, A ; 0E6C 5C
ci 4 ; 0E6D 25 04
bm L0E16 ; 0E6F 91 A6
lis 2 ; 0E71 72
lr 4, A ; 0E72 54
L0E73: pi L0818 ; 0E73 28 08 18
ds 4 ; 0E76 34
bnz L0E73 ; 0E77 94 FB
lisu 2 ; 0E79 62
lisl 0 ; 0E7A 68
pi L082C ; 0E7B 28 08 2C
dci L1333 ; 0E7E 2A 13 33
lis 8 ; 0E81 78
lr 8, A ; 0E82 58
L0E83: pi L0820 ; 0E83 28 08 20
ds 8 ; 0E86 38
bnz L0E83 ; 0E87 94 FB
L0E89: lis $D ; 0E89 7D
lr 4, A ; 0E8A 54
lis 2 ; 0E8B 72
lr 6, A ; 0E8C 56
pi L084A ; 0E8D 28 08 4A
li $37 ; 0E90 20 37
lr 4, A ; 0E92 54
lis 2 ; 0E93 72
lr 6, A ; 0E94 56
pi L084A ; 0E95 28 08 4A
lis 7 ; 0E98 77
as 3 ; 0E99 C3
lr 3, A ; 0E9A 53
ci $55 ; 0E9B 25 55
bp L0E89 ; 0E9D 81 EB
lis 2 ; 0E9F 72
lr 9, A ; 0EA0 59
lr A, $A ; 0EA1 4A
ni $C5 ; 0EA2 21 C5
lr $A, A ; 0EA4 5A
lisu 6 ; 0EA5 66
lisl 1 ; 0EA6 69
lr A, D ; 0EA7 4E
lr 3, A ; 0EA8 53
ds 3 ; 0EA9 33
lis 7 ; 0EAA 77
lr 4, A ; 0EAB 54
lis 1 ; 0EAC 71
ns $A ; 0EAD FA
lr $A, A ; 0EAE 5A
clr ; 0EAF 70
bnz L0EB4 ; 0EB0 94 03
li $80 ; 0EB2 20 80
L0EB4: lr 2, A ; 0EB4 52
lr A, S ; 0EB5 4C
lr 1, A ; 0EB6 51
pi L0840 ; 0EB7 28 08 40
pi L09C4 ; 0EBA 28 09 C4
clr ; 0EBD 70
as S ; 0EBE CC
bnz L0ED1 ; 0EBF 94 11
li $F0 ; 0EC1 20 F0
lr S, A ; 0EC3 5C
dci L1392 ; 0EC4 2A 13 92
pi L088E ; 0EC7 28 08 8E
lisl 0 ; 0ECA 68
ds S ; 0ECB 3C
clr ; 0ECC 70
lr 9, A ; 0ECD 59
jmp L0E1F ; 0ECE 29 0E 1F
L0ED1: lisu 2 ; 0ED1 62
lisl 0 ; 0ED2 68
L0ED3: lis 4 ; 0ED3 74
lr S, A ; 0ED4 5C
lr A, IS ; 0ED5 0A
inc ; 0ED6 1F
lr IS, A ; 0ED7 0B
ci $2A ; 0ED8 25 2A
bnz L0ED3 ; 0EDA 94 F8
lis $C ; 0EDC 7C
lr 0, A ; 0EDD 50
lisu 6 ; 0EDE 66
lisl 7 ; 0EDF 6F
lis 4 ; 0EE0 74
lr S, A ; 0EE1 5C
pi L0DC6 ; 0EE2 28 0D C6
pi L0DC6 ; 0EE5 28 0D C6
lisu 7 ; 0EE8 67
lisl 6 ; 0EE9 6E
li $C0 ; 0EEA 20 C0
lr I, A ; 0EEC 5D
lr D, A ; 0EED 5E
lisu 2 ; 0EEE 62
lisl 0 ; 0EEF 68
li $60 ; 0EF0 20 60
lr S, A ; 0EF2 5C
;-------------------------------------------------------------------------------
; main_game_loop (strongly likely)
; Alternate controller sources, debounce console input, update active objects,
; evaluate state transitions and invoke the table-driven update worker.
;-------------------------------------------------------------------------------
L0EF3: lisu 7 ; 0EF3 67
lisl 6 ; 0EF4 6E
L0EF5: li $B0 ; 0EF5 20 B0
L0EF7: inc ; 0EF7 1F
bnz L0EF7 ; 0EF8 94 FE
lis 1 ; 0EFA 71
lr 4, A ; 0EFB 54
L0EFC: lr A, IS ; 0EFC 0A
xi 1 ; 0EFD 23 01
lr IS, A ; 0EFF 0B
lr A, IS ; 0F00 0A
lr 7, A ; 0F01 57
ni 1 ; 0F02 21 01
bnz L0F0B ; 0F04 94 06
pi L08B0 ; 0F06 28 08 B0
br L0F0E ; 0F09 90 04
L0F0B: pi L08C1 ; 0F0B 28 08 C1
L0F0E: lr A, D ; 0F0E 4E
lr 6, A ; 0F0F 56
clr ; 0F10 70
as S ; 0F11 CC
bnz L0F22 ; 0F12 94 0F
lis 5 ; 0F14 75
lr 5, A ; 0F15 55
ins 0 ; 0F16 A0
com ; 0F17 18
ni $F ; 0F18 21 0F
bz L0F22 ; 0F1A 84 07
L0F1C: ds 5 ; 0F1C 35
sr 1 ; 0F1D 12
bnz L0F1C ; 0F1E 94 FD
lr A, 5 ; 0F20 45
lr S, A ; 0F21 5C
L0F22: lr A, 7 ; 0F22 47
lr IS, A ; 0F23 0B
lr A, S ; 0F24 4C
ni $C0 ; 0F25 21 C0
bnz L0F33 ; 0F27 94 0B
ds 4 ; 0F29 34
bnz L0F8E ; 0F2A 94 63
li $CE ; 0F2C 20 CE
L0F2E: inc ; 0F2E 1F
bnz L0F2E ; 0F2F 94 FE
br L0EFC ; 0F31 90 CA
L0F33: lisu 7 ; 0F33 67
lisl 4 ; 0F34 6C
ds S ; 0F35 3C
clr ; 0F36 70
lisu 2 ; 0F37 62
lisl 0 ; 0F38 68
as S ; 0F39 CC
bnz L0F52 ; 0F3A 94 17
lr A, 7 ; 0F3C 47
lr IS, A ; 0F3D 0B
ni 1 ; 0F3E 21 01
bz L0F49 ; 0F40 84 08
lr A, D ; 0F42 4E
li $C0 ; 0F43 20 C0
ns S ; 0F45 FC
lr A, I ; 0F46 4D
bnz L0EF5 ; 0F47 94 AD
L0F49: lr A, S ; 0F49 4C
ni $C0 ; 0F4A 21 C0
bz L0EF5 ; 0F4C 84 A8
clr ; 0F4E 70
lr S, A ; 0F4F 5C
br L0F82 ; 0F50 90 31
L0F52: lisu 2 ; 0F52 62
lisl 1 ; 0F53 69
ds D ; 0F54 3E
bnz L0F58 ; 0F55 94 02
ds D ; 0F57 3E
L0F58: lr A, 7 ; 0F58 47
lr IS, A ; 0F59 0B
lr A, 6 ; 0F5A 46
ni $30 ; 0F5B 21 30
bnz L0F64 ; 0F5D 94 06
L0F5F: lis $F ; 0F5F 7F
ns 6 ; 0F60 F6
ai $C0 ; 0F61 24 C0
lr S, A ; 0F63 5C
L0F64: lr A, 6 ; 0F64 46
com ; 0F65 18
inc ; 0F66 1F
as S ; 0F67 CC
ni $F ; 0F68 21 0F
bnz L0F5F ; 0F6A 94 F4
lr A, S ; 0F6C 4C
ai $C0 ; 0F6D 24 C0
lr S, A ; 0F6F 5C
ni $C0 ; 0F70 21 C0
bz L0F77 ; 0F72 84 04
jmp L0EF5 ; 0F74 29 0E F5
L0F77: lr A, IS ; 0F77 0A
ci $3E ; 0F78 25 3E
bnz L0F82 ; 0F7A 94 07
lisu 2 ; 0F7C 62
lisl 0 ; 0F7D 68
lis 3 ; 0F7E 73
lr S, A ; 0F7F 5C
lr A, 7 ; 0F80 47
lr IS, A ; 0F81 0B
L0F82: pi L0DB3 ; 0F82 28 0D B3
lis 6 ; 0F85 76
as 0 ; 0F86 C0
lr 0, A ; 0F87 50
pi L0DC6 ; 0F88 28 0D C6
jmp L0EF3 ; 0F8B 29 0E F3
;-------------------------------------------------------------------------------
; Timed game-event handling and extended collision checks (strongly likely).
; Initializes O20, waits for controller activity or timeout, updates event flags
; and object state, then dispatches sound/scene handling.
;-------------------------------------------------------------------------------
L0F8E: clr ; 0F8E 70
lr 5, A ; 0F8F 55
lisu 7 ; 0F90 67
lisl 2 ; 0F91 6A
as S ; 0F92 CC
bnz L0F97 ; 0F93 94 03
lis 5 ; 0F95 75
lr S, A ; 0F96 5C
L0F97: lisu 2 ; 0F97 62
lisl 0 ; 0F98 68
li $B0 ; 0F99 20 B0
lr S, A ; 0F9B 5C
pi L0818 ; 0F9C 28 08 18
L0F9F: lisu 2 ; 0F9F 62
lisl 1 ; 0FA0 69
ds D ; 0FA1 3E
bnz L0FAD ; 0FA2 94 0A
ds S ; 0FA4 3C
bnz L0FAD ; 0FA5 94 07
lisu 6 ; 0FA7 66
lisl 0 ; 0FA8 68
ds S ; 0FA9 3C
jmp L0C6D ; 0FAA 29 0C 6D
L0FAD: pi L08B0 ; 0FAD 28 08 B0
bz L0F9F ; 0FB0 84 EE
lisl 5 ; 0FB2 6D
lis 2 ; 0FB3 72
lr S, A ; 0FB4 5C
lisu 7 ; 0FB5 67
lisl 7 ; 0FB6 6F
clr ; 0FB7 70
as S ; 0FB8 CC
bnz L0FBF ; 0FB9 94 05
lr A, $A ; 0FBB 4A
oi $40 ; 0FBC 22 40
lr $A, A ; 0FBE 5A
L0FBF: lis 3 ; 0FBF 73
lr 9, A ; 0FC0 59
lisu 5 ; 0FC1 65
lisl 4 ; 0FC2 6C
li $11 ; 0FC3 20 11
lr I, A ; 0FC5 5D
clr ; 0FC6 70
lr S, A ; 0FC7 5C
lisu 7 ; 0FC8 67
lisl 1 ; 0FC9 69
li $77 ; 0FCA 20 77
lr S, A ; 0FCC 5C
L0FCD: li $FD ; 0FCD 20 FD
lr 6, A ; 0FCF 56
lis 2 ; 0FD0 72
lr 5, A ; 0FD1 55
lisu 6 ; 0FD2 66
lisl 1 ; 0FD3 69
lr A, S ; 0FD4 4C
com ; 0FD5 18
inc ; 0FD6 1F
lisu 2 ; 0FD7 62
lisl 6 ; 0FD8 6E
as S ; 0FD9 CC
bz L0FE9 ; 0FDA 84 0E
bp L0FDF ; 0FDC 81 02
ds 5 ; 0FDE 35
L0FDF: lis 1 ; 0FDF 71
ns $A ; 0FE0 FA
bz L0FE6 ; 0FE1 84 04
ds 5 ; 0FE3 35
lis 3 ; 0FE4 73
lr 6, A ; 0FE5 56
L0FE6: ds 5 ; 0FE6 35
bnz L0FEF ; 0FE7 94 07
L0FE9: lr A, $A ; 0FE9 4A
oi $20 ; 0FEA 22 20
lr $A, A ; 0FEC 5A
br L1035 ; 0FED 90 47
L0FEF: lisu 7 ; 0FEF 67
lisl 4 ; 0FF0 6C
lr A, I ; 0FF1 4D
sr 4 ; 0FF2 14
sr 1 ; 0FF3 12
ai $11 ; 0FF4 24 11
com ; 0FF6 18
as S ; 0FF7 CC
bnz L1035 ; 0FF8 94 3C
lis 3 ; 0FFA 73
xs 9 ; 0FFB E9
bnz L1035 ; 0FFC 94 38
lisl 6 ; 0FFE 6E
lis 4 ; 0FFF 74
xs S ; 1000 EC
bz L1035 ; 1001 84 33
lis 5 ; 1003 75
xs S ; 1004 EC
bz L1035 ; 1005 84 2F
lisu 4 ; 1007 64
lisl 7 ; 1008 6F
lr A, S ; 1009 4C
ci $19 ; 100A 25 19
bp L1035 ; 100C 81 28
lisu 5 ; 100E 65
lisl 1 ; 100F 69
lr A, S ; 1010 4C
ci $23 ; 1011 25 23
bm L1035 ; 1013 91 21
lisu 2 ; 1015 62
lisl 2 ; 1016 6A
lr A, S ; 1017 4C
as 6 ; 1018 C6
lr S, A ; 1019 5C
lisl 4 ; 101A 6C
lr S, A ; 101B 5C
lr A, 6 ; 101C 46
com ; 101D 18
inc ; 101E 1F
lr 6, A ; 101F 56
lisu 4 ; 1020 64
lisl 6 ; 1021 6E
as S ; 1022 CC
lr S, A ; 1023 5C
lisu 5 ; 1024 65
lisl 0 ; 1025 68
lr A, 6 ; 1026 46
as S ; 1027 CC
lr S, A ; 1028 5C
lisu 6 ; 1029 66
lisl 1 ; 102A 69
lr A, S ; 102B 4C
ai $FC ; 102C 24 FC
lr 3, A ; 102E 53
dci L135B ; 102F 2A 13 5B
pi L0822 ; 1032 28 08 22
;-------------------------------------------------------------------------------
; Repositioning and formation/zone tests (strongly likely).
; Copies coordinate state, evaluates object zones and finds minimum distances
; against object records O30-O33. r10 bit 4 records the proximity condition.
;-------------------------------------------------------------------------------
L1035: pi L08B0 ; 1035 28 08 B0
lis 8 ; 1038 78
ns $A ; 1039 FA
bnz L10B9 ; 103A 94 7E
lisu 2 ; 103C 62
lisl 6 ; 103D 6E
lr A, I ; 103E 4D
lr 7, A ; 103F 57
lr A, I ; 1040 4D
lisu 2 ; 1041 62
lisl 1 ; 1042 69
lr D, A ; 1043 5E
lr A, 7 ; 1044 47
lr S, A ; 1045 5C
li $20 ; 1046 20 20
ns $A ; 1048 FA
bz L104E ; 1049 84 04
L104B: jmp L10E0 ; 104B 29 10 E0
L104E: lisu 7 ; 104E 67
lisl 3 ; 104F 6B
as S ; 1050 CC
bp L104B ; 1051 81 F9
lis 3 ; 1053 73
xs 9 ; 1054 E9
bnz L104B ; 1055 94 F5
lr 9, A ; 1057 59
lis 8 ; 1058 78
as $A ; 1059 CA
lr $A, A ; 105A 5A
lisl 6 ; 105B 6E
lr A, S ; 105C 4C
ci 6 ; 105D 25 06
bp L1096 ; 105F 81 36
lr A, $A ; 1061 4A
oi 2 ; 1062 22 02
lr $A, A ; 1064 5A
lisl 4 ; 1065 6C
lr A, I ; 1066 4D
sr 4 ; 1067 14
sr 1 ; 1068 12
ai $A ; 1069 24 0A
as S ; 106B CC
lisl 1 ; 106C 69
lr S, A ; 106D 5C
lisl 6 ; 106E 6E
lis 7 ; 106F 77
xs S ; 1070 EC
bnz L1096 ; 1071 94 24
lisl 1 ; 1073 69
lr A, S ; 1074 4C
ai $FD ; 1075 24 FD
lr S, A ; 1077 5C
lis 1 ; 1078 71
ns $A ; 1079 FA
lisu 2 ; 107A 62
lisl 0 ; 107B 68
bnz L1083 ; 107C 94 06
li $F6 ; 107E 20 F6
as S ; 1080 CC
br L1087 ; 1081 90 05
L1083: lr A, S ; 1083 4C
com ; 1084 18
ai $61 ; 1085 24 61
L1087: lr 5, A ; 1087 55
lisu 7 ; 1088 67
lisl 4 ; 1089 6C
li $3F ; 108A 20 3F
ns D ; 108C FE
as 5 ; 108D C5
ci $39 ; 108E 25 39
clr ; 1090 70
bp L1095 ; 1091 81 03
li $20 ; 1093 20 20
L1095: lr S, A ; 1095 5C
L1096: lr A, $A ; 1096 4A
oi $40 ; 1097 22 40
lr $A, A ; 1099 5A
lisu 7 ; 109A 67
lisl 3 ; 109B 6B
li $10 ; 109C 20 10
ns S ; 109E FC
lis 6 ; 109F 76
bnz L10A9 ; 10A0 94 08
li $20 ; 10A2 20 20
ns S ; 10A4 FC
lis $A ; 10A5 7A
bnz L10A9 ; 10A6 94 02
lis 2 ; 10A8 72
L10A9: lr 7, A ; 10A9 57
lis 1 ; 10AA 71
ns $A ; 10AB FA
bz L10B5 ; 10AC 84 08
li $30 ; 10AE 20 30
ns S ; 10B0 FC
lis $F ; 10B1 7F
bnz L10B5 ; 10B2 94 02
lis 3 ; 10B4 73
L10B5: lisu 6 ; 10B5 66
lisl 7 ; 10B6 6F
xs 7 ; 10B7 E7
lr S, A ; 10B8 5C
L10B9: lisu 2 ; 10B9 62
lisl 0 ; 10BA 68
lr A, I ; 10BB 4D
com ; 10BC 18
inc ; 10BD 1F
lr 4, A ; 10BE 54
lr A, D ; 10BF 4E
com ; 10C0 18
inc ; 10C1 1F
lr 5, A ; 10C2 55
lisu 3 ; 10C3 63
lisl 0 ; 10C4 68
L10C5: lr A, I ; 10C5 4D
as 4 ; 10C6 C4
bp L10CB ; 10C7 81 03
com ; 10C9 18
inc ; 10CA 1F
L10CB: lr 2, A ; 10CB 52
lr A, I ; 10CC 4D
as 5 ; 10CD C5
bp L10D2 ; 10CE 81 03
com ; 10D0 18
inc ; 10D1 1F
L10D2: as 2 ; 10D2 C2
ci $F ; 10D3 25 0F
bnc L10DB ; 10D5 92 05
lr A, $A ; 10D7 4A
oi $10 ; 10D8 22 10
lr $A, A ; 10DA 5A
L10DB: lr A, IS ; 10DB 0A
ci $1C ; 10DC 25 1C
bp L10C5 ; 10DE 81 E6
;-------------------------------------------------------------------------------
; Player/object turn and automatic movement selection (strongly likely).
; Select control- or table-driven movement, iterate object groups and route the
; resulting event to the common frame/state handlers.
;-------------------------------------------------------------------------------
L10E0: lisu 7 ; 10E0 67
lisl 5 ; 10E1 6D
lr A, S ; 10E2 4C
com ; 10E3 18
inc ; 10E4 1F
lisl 1 ; 10E5 69
as S ; 10E6 CC
clr ; 10E7 70
lr 0, A ; 10E8 50
bm L10EE ; 10E9 91 04
lisu 6 ; 10EB 66
lisl 7 ; 10EC 6F
lr A, S ; 10ED 4C
L10EE: lr 4, A ; 10EE 54
lis 8 ; 10EF 78
ns $A ; 10F0 FA
bz L10F6 ; 10F1 84 04
pi L0A24 ; 10F3 28 0A 24
L10F6: lis 2 ; 10F6 72
ns $A ; 10F7 FA
bnz L10FD ; 10F8 94 04
jmp L1137 ; 10FA 29 11 37
L10FD: lis 6 ; 10FD 76
lr 0, A ; 10FE 50
L10FF: pi L0A1F ; 10FF 28 0A 1F
ds 0 ; 1102 30
bnz L10FF ; 1103 94 FB
pi L08C1 ; 1105 28 08 C1
lis $C ; 1108 7C
lr 0, A ; 1109 50
lis 8 ; 110A 78
ns $A ; 110B FA
bz L111A ; 110C 84 0D
L110E: pi L0A1F ; 110E 28 0A 1F
ds 0 ; 1111 30
lr A, 0 ; 1112 40
ci 6 ; 1113 25 06
bm L110E ; 1115 91 F8
jmp L1227 ; 1117 29 12 27
L111A: com ; 111A 18
inc ; 111B 1F
as 9 ; 111C C9
bnz L1124 ; 111D 94 06
pi L0A1F ; 111F 28 0A 1F
br L112E ; 1122 90 0B
L1124: lis 1 ; 1124 71
ns $A ; 1125 FA
lis 2 ; 1126 72
bnz L112A ; 1127 94 02
lis 1 ; 1129 71
L112A: lr 4, A ; 112A 54
pi L0A24 ; 112B 28 0A 24
L112E: ds 0 ; 112E 30
lr A, 0 ; 112F 40
ci 6 ; 1130 25 06
bm L111A ; 1132 91 E7
jmp L1200 ; 1134 29 12 00
;-------------------------------------------------------------------------------
; Formation lookup and object movement (strongly likely).
; Split L08C7 results into nibbles, normalize direction bits, read L1297-based
; formation records through L08DA and apply resulting moves.
;-------------------------------------------------------------------------------
L1137: lis 2 ; 1137 72
lr 0, A ; 1138 50
pi L08C7 ; 1139 28 08 C7
ni $F0 ; 113C 21 F0
sr 4 ; 113E 14
lr 7, A ; 113F 57
pi L0A10 ; 1140 28 0A 10
ds 0 ; 1143 30
pi L08C7 ; 1144 28 08 C7
ni $F ; 1147 21 0F
lr 7, A ; 1149 57
pi L0A10 ; 114A 28 0A 10
lis 3 ; 114D 73
lr 0, A ; 114E 50
xs 9 ; 114F E9
bz L1159 ; 1150 84 08
clr ; 1152 70
lr 4, A ; 1153 54
pi L0A24 ; 1154 28 0A 24
br L1189 ; 1157 90 31
L1159: pi L0A1F ; 1159 28 0A 1F
lis 6 ; 115C 76
lr 0, A ; 115D 50
pi L08DA ; 115E 28 08 DA
lisu 5 ; 1161 65
lisl 4 ; 1162 6C
bnz L1166 ; 1163 94 02
lr S, A ; 1165 5C
L1166: li $F0 ; 1166 20 F0
ns S ; 1168 FC
sr 4 ; 1169 14
lr 7, A ; 116A 57
pi L0A10 ; 116B 28 0A 10
ds 0 ; 116E 30
lisu 5 ; 116F 65
lisl 4 ; 1170 6C
lis $F ; 1171 7F
ns S ; 1172 FC
lr 7, A ; 1173 57
pi L0A10 ; 1174 28 0A 10
ds 0 ; 1177 30
pi L08DA ; 1178 28 08 DA
lm ; 117B 16
lisu 5 ; 117C 65
lisl 5 ; 117D 6D
bnz L1181 ; 117E 94 02
lr S, A ; 1180 5C
L1181: lis $F ; 1181 7F
ns S ; 1182 FC
lr 7, A ; 1183 57
pi L0A10 ; 1184 28 0A 10
br L1194 ; 1187 90 0C
L1189: lis 6 ; 1189 76
lr 0, A ; 118A 50
L118B: pi L0A1F ; 118B 28 0A 1F
ds 0 ; 118E 30
lr A, 0 ; 118F 40
ci 3 ; 1190 25 03
bnz L118B ; 1192 94 F8
;-------------------------------------------------------------------------------
; Multi-object update and event evaluation (strongly likely).
; Compare object 12 and 11, read the opposing controller and update objects 10
; through 7 using direct controls or generated direction steps.
;-------------------------------------------------------------------------------
L1194: lis $C ; 1194 7C
lr 0, A ; 1195 50
pi L0D30 ; 1196 28 0D 30
ds 0 ; 1199 30
pi L0D30 ; 119A 28 0D 30
pi L08C1 ; 119D 28 08 C1
li $30 ; 11A0 20 30
ns S ; 11A2 FC
bz L11A9 ; 11A3 84 05
lr A, $A ; 11A5 4A
oi $40 ; 11A6 22 40
lr $A, A ; 11A8 5A
L11A9: lis $A ; 11A9 7A
lr 0, A ; 11AA 50
pi L0A1F ; 11AB 28 0A 1F
ds 0 ; 11AE 30
L11AF: li $40 ; 11AF 20 40
ns $A ; 11B1 FA
bnz L11CF ; 11B2 94 1C
lr A, 0 ; 11B4 40
ci 8 ; 11B5 25 08
bnz L11BD ; 11B7 94 05
lis 6 ; 11B9 76
lr 7, A ; 11BA 57
br L11BF ; 11BB 90 03
L11BD: lis 5 ; 11BD 75
lr 7, A ; 11BE 57
L11BF: lis 1 ; 11BF 71
lisu 7 ; 11C0 67
lisl 7 ; 11C1 6F
ns S ; 11C2 FC
lr 2, A ; 11C3 52
lr A, S ; 11C4 4C
ai $FF ; 11C5 24 FF
ni 2 ; 11C7 21 02
sr 1 ; 11C9 12
as 0 ; 11CA C0
ni 1 ; 11CB 21 01
bnz L11D4 ; 11CD 94 06
L11CF: pi L0A1F ; 11CF 28 0A 1F
br L11D7 ; 11D2 90 04
L11D4: pi L0D86 ; 11D4 28 0D 86
L11D7: ds 0 ; 11D7 30
lr A, 0 ; 11D8 40
ci 7 ; 11D9 25 07
bm L11AF ; 11DB 91 D3
lisu 7 ; 11DD 67
lisl 3 ; 11DE 6B
li $40 ; 11DF 20 40
ns S ; 11E1 FC
bnz L11FD ; 11E2 94 1A
lisl 7 ; 11E4 6F
lr A, D ; 11E5 4E
ci 4 ; 11E6 25 04
bp L11F8 ; 11E8 81 0F
lisu 7 ; 11EA 67
lisl 5 ; 11EB 6D
lr A, S ; 11EC 4C
ci $A ; 11ED 25 0A
bm L11F8 ; 11EF 91 08
lis 6 ; 11F1 76
lr 7, A ; 11F2 57
pi L0A10 ; 11F3 28 0A 10
br L1200 ; 11F6 90 09
L11F8: pi L0D30 ; 11F8 28 0D 30
br L1200 ; 11FB 90 04
L11FD: pi L0A1F ; 11FD 28 0A 1F
L1200: lis 2 ; 1200 72
lr 5, A ; 1201 55
clr ; 1202 70
as 9 ; 1203 C9
bz L1227 ; 1204 84 22
ci 6 ; 1206 25 06
bm L120B ; 1208 91 02
ds 5 ; 120A 35
L120B: lis 1 ; 120B 71
ns $A ; 120C FA
bz L1210 ; 120D 84 02
ds 5 ; 120F 35
L1210: li $10 ; 1210 20 10
as 9 ; 1212 C9
as 9 ; 1213 C9
lr IS, A ; 1214 0B
lr A, S ; 1215 4C
ds 5 ; 1216 35
bz L1220 ; 1217 84 08
ci $57 ; 1219 25 57
bp L1227 ; 121B 81 0B
jmp L0D13 ; 121D 29 0D 13
L1220: ci $12 ; 1220 25 12
bm L1227 ; 1222 91 04
jmp L0D10 ; 1224 29 0D 10
;-------------------------------------------------------------------------------
; Frame/time update (strongly likely)
; Advance O75, apply timing increment from L124D to O63, propagate carry into
; O62, optionally redraw, then re-enter the active update path at L0FCD.
;-------------------------------------------------------------------------------
L1227: lisu 7 ; 1227 67
lisl 5 ; 1228 6D
lr A, S ; 1229 4C
inc ; 122A 1F
lr S, A ; 122B 5C
ci $60 ; 122C 25 60
bp L1232 ; 122E 81 03
ds S ; 1230 3C
ds S ; 1231 3C
L1232: dci L124D ; 1232 2A 12 4D
lisu 7 ; 1235 67
lisl 2 ; 1236 6A
lr A, S ; 1237 4C
adc ; 1238 8E
lm ; 1239 16
lisu 6 ; 123A 66
lisl 3 ; 123B 6B
as S ; 123C CC
lr S, A ; 123D 5C
bnc L124A ; 123E 92 0B
lisu 6 ; 1240 66
lisl 2 ; 1241 6A
clr ; 1242 70
as S ; 1243 CC
bz L1247 ; 1244 84 02
ds S ; 1246 3C
L1247: pi L09C4 ; 1247 28 09 C4
L124A: jmp L0FCD ; 124A 29 0F CD
;===============================================================================
; DATA TABLES $124D-$13E9
; This range is addressed from reachable code through DCI. It must remain raw
; data. Labels below describe known consumers; contents are preserved exactly.
;===============================================================================
; frame/tempo increment table used at L1232
L124D: .byte $50, $14, $1D, $38 ; 124D
; Delay/parameter table used by the short 1 kHz beep at L0C96.
L1251: .byte $48, $29, $01, $FF, $01, $00, $04, $00, $06, $00, $02, $00 ; 1251
; State lookup table used by L0DB3.
L125D: .byte $00, $03, $07, $AB, $05, $04, $06, $AB, $01, $02, $08 ; 125D
; Variable-length lookup/formation data consumed by L08C7.
L1268: .byte $08, $09, $0A, $0B, $0C, $17, $22, $23, $24, $77, $00, $77, $00, $77, $00, $77 ; 1268
.byte $00, $08, $00, $0C, $88, $0F, $81, $11, $80, $13, $01, $77, $11, $03, $00, $07 ; 1278
.byte $44, $0A, $50, $0C, $00, $0E, $00, $77, $11, $77, $00, $77, $00, $77, $00 ; 1288
; Variable-length lookup/formation data consumed by L08DA.
L1297: .byte $0A, $1C, $25, $34, $40, $52, $5B, $67, $67, $77, $11, $03, $03, $11, $01, $06 ; 1297
.byte $45, $01, $0F, $48, $01, $12, $08, $01, $17, $01, $01, $1B, $01, $04, $77, $06 ; 12A7
.byte $11, $01, $0A, $11, $00, $0C, $95, $00, $77, $03, $11, $01, $0E, $49, $00, $14 ; 12B7
.byte $04, $00, $19, $92, $01, $20, $98, $04, $77, $03, $51, $01, $12, $52, $01, $16 ; 12C7
.byte $14, $01, $1B, $91, $01, $77, $03, $11, $05, $07, $51, $05, $0A, $51, $05, $0D ; 12D7
.byte $12, $09, $0E, $15, $09, $21, $A5, $04, $77, $08, $15, $01, $0C, $55, $01, $10 ; 12E7
.byte $84, $01, $77, $02 ; 12F7
; Alternate state/formation table selected inside L0DCB.
L12FB: .byte $11, $08, $07, $11, $09, $0B, $58, $09, $0D, $15, $00, $77, $77, $77, $1E, $0A ; 12FB
.byte $22, $0A, $1C, $06, $24, $06, $1E, $02 ; 130B
; Primary state/formation table selected inside L0DCB.
L1313: .byte $22, $02, $1C, $02, $20, $02, $20, $07, $23, $0A, $2C, $03, $16, $02, $20, $08 ; 1313
.byte $16, $0B, $2C, $0C, $1C, $14, $1C, $02, $20, $02 ; 1323
; Three short selector/bitmap records chosen near L0BEC.
L132D: .byte $FF, $80 ; 132D
L132F: .byte $AA, $80 ; 132F
L1331: .byte $F7, $80 ; 1331
; Eight consecutive graphics parameter records rendered from L0E83.
L1333: .byte $09, $37, $41, $59, $01, $09, $0E, $41, $01, $2A, $09, $0E, $41, $59, $01, $61 ; 1333
.byte $0E, $41, $01, $2A, $0A, $0F, $C1, $57, $28, $58, $0C, $41, $01, $2E, $0A, $07 ; 1343
.byte $C1, $61, $05, $12, $0C, $41, $01, $2E ; 1353
; Graphics parameter block entered through L0822 at $102F.
L135B: .byte $17, $C1, $09, $11 ; 135B
; Fixed screen graphics parameter block entered through L0820 at $0E1F.
L135F: .byte $19, $11, $C1, $33, $07 ; 135F
; Packed sprite/glyph data indexed as L1364 + 2*r1 by L0840.
L1364: .byte $F6, $DE, $59, $2E, $E7, $CE, $E7, $9E, $B7, $92, $F3, $9E, $F3, $DE, $E5, $24 ; 1364
.byte $F7, $DE, $F7, $9E, $08, $20 ; 1374
; Sound-effect table consumed by L088E from $0C6D.
L137A: .byte $27, $67, $25, $47, $23, $27, $00 ; 137A
; Sound-effect table consumed by L088E from $0CB2.
L1381: .byte $04, $22, $07, $AB, $03, $BB, $08, $CC, $03, $34, $06, $12, $0D, $12, $0D, $12 ; 1381
.byte $00 ; 1391
; Sound-effect table consumed by L088E from $0EC4.
L1392: .byte $37, $6A, $1A, $61, $1B, $6A, $0E, $73, $1D, $73, $0D, $6A, $1D, $73, $0E, $73 ; 1392
.byte $1D, $73, $0E, $73, $1B, $6A, $1D, $73, $10, $82, $20, $82, $0F, $7B, $31, $82 ; 13A2
.byte $24, $90, $2B, $A2, $29, $9D, $24, $90, $20, $82, $1B, $6A, $16, $43, $18, $58 ; 13B2
.byte $0D, $6A, $20, $82, $0E, $73, $1B, $6A, $18, $58, $2B, $43, $00 ; 13C2
; Sound-effect table consumed by L088E from $0D27. The terminating zero is
; followed by unused ROM fill; retain all bytes to preserve the original image.
L13CF: .byte $31, $82, $0F, $7B, $24, $90, $20, $82, $41, $A2, $14, $9D, $31, $AD, $2B, $A2 ; 13CF
.byte $36, $B6, $36, $B6, $36, $B6, $36, $B6, $6D, $B6, $00, $FF, $FF, $FF, $FF, $FF ; 13DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 13EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 13FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 140F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 141F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 142F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 143F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 144F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 145F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 146F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 147F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 148F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 149F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 14FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 150F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 151F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 152F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 153F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 154F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 155F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 156F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 157F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 158F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 159F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15EF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 15FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 160F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 161F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 162F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 163F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 164F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 165F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 166F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 167F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 168F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 169F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16DF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16EF
.byte $FF, $00, $00, $00, $00, $00, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 16FF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 170F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 171F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 172F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 173F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 174F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 175F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 176F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 177F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 178F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 179F
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17AF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17BF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17CF
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 17DF
.byte $FF, $00, $10, $E9, $1B, $DD, $E5, $00, $00, $00, $00, $00, $00, $00, $00, $00 ; 17EF
.byte $00 ; 17FF

IF 0

Smart data report
=================
Mode: enabled by -s or /s
Memory range: $0800-$17FF
Code bytes: 2630
Data bytes: 1466

DCI data roots from reachable code:
$1333 from $0E7E
$1392 from $0EC4
$135F from $0E1F
$1364 from $0840
$1313 from $0DCB
$12FB from $0DD8
$1331 from $0BEF
$132F from $0BF9
$132D from $0C00
$137A from $0C6D
$1251 from $0C97
$1381 from $0CB2
$125D from $0DB3
$135B from $102F
$13CF from $0D27
$124D from $1232
$1268 from $08C7
$1297 from $08DA

Data intervals emitted as .byte:
$0837-$0839 (3 bytes)
$0C40-$0C43 (4 bytes)
$124D-$17FF (1459 bytes)

ENDIF
</pre>

Opcode

2026-08-07T17:02:44Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
! colspan="2" | Register alias
|-
| || '''HU''' = ISAR r10, '''HL''' = ISAR r11 '''KU''' = ISAR r12, '''KL''' = ISAR r13 '''QU''' = ISAR r14, '''QL''' = ISAR r15
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU) || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL) || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU) || %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL) || %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || KU ← (PC1U) KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU) PC1L ← (KL) || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL) PC0U ← (KU) || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL) PC0U ← (QU) || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || QU ← (DC0U) QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU) DC0L ← (QL) || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (HU) DC0L ← (HL) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || HU ← (DC0U) HL ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || ((DC0)) ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $60-$67 ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $68-$6F ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)!=7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-08-07T16:57:14Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
! colspan="2" | Register alias
|-
| || '''HU''' = ISAR r10, '''HL''' = ISAR r11 '''KU''' = ISAR r12, '''KL''' = ISAR r13 '''QU''' = ISAR r14, '''QL''' = ISAR r15
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU) || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL) || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU) || %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL) || %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || KU ← (PC1U) KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU) PC1L ← (KL) || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL) PC0U ← (KU) || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL) PC0U ← (QU) || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || QU ← (DC0U) QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU) DC0L ← (QL) || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (HU) DC0L ← (HL) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || HU ← (DC0U) HL ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || ((DC0)) ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)!=7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Snippet:KStack

2026-08-05T18:25:46Z

E5frog:

<pre>
;===========================================================================
; KStack Functions
;===========================================================================
; the K stack implements a stack using the registers. it uses r63 as a stack
; pointer that holds the register number of the top of the stack.
; When called, K is pushed to the first two registers on the stack, and the
; pointer is increased.
;
; at startup, the stack pointer (r63) should be set to 62 ($3E)

;---------------------------------------------------------------------------
; KStack Push
;---------------------------------------------------------------------------
; pushes register K onto the stack using r63 as the stack pointer
; destroys ISAR data

pushk:
lisu 7 ; get the top of the stack
lisl 7 ; r63, stack pointer
lr A,S
lr IS, A ; load the referenced register
lr A,KU
lr I,A ; push high byte of K
lr A,KL
lr I,A ; push low byte of K
lr A,IS
lisu 7
lisl 3
lr S,A ; save the register number to the stack pointer
pop

;---------------------------------------------------------------------------
; KStack Pop
;---------------------------------------------------------------------------
; pops register K from the stack using r63 as the stack pointer
; destroys ISAR

popk:
lisu 7 ; r63, stack pointer
lisl 7
lr A,S ; A = stack pointer, points to next free
ai $ff ; A = last pushed byte, KL
lr IS,A ; ISAR -> KL
lr A,D ; read KL, then ISAR -> KU
lr KL,A
lr A,S ; read KU
lr KU,A
lr A,IS ; ISAR now points to new stack pointer
lisu 7
lisl 3
lr S,A ; store new stack pointer in r59
pop
</pre>

Disassembly:Videocart 4

2026-08-05T18:20:52Z

E5frog:

This is the disassembly (made with help from Peter Trauner's [[f8tool]]) of the [[Channel F]] [[Videocart 4]]. Original code is copyright © 1977 Fairchild Semiconductor.

<pre> processor f8
org $0800

delay equ $008F
prompt equ $0099
clrscrn equ $00D0
drawchar equ $0679

CartridgeStart:
.byte $55,$2B

L0802:
clr ; 0802 70 Set ports to 0
outs 0 ; 0803 B0
outs 1 ; 0804 B1
outs 4 ; 0805 B4
outs 5 ; 0806 B5
lisu 7 ; 0807 67 Set ISAR tp 'O'73
lisl 3 ; 0808 6B
li $3C ; 0809 20 3C
lr S,A ; 080B 5C register 'O'73 = $3C
li $D0 ; 080C 20 D0
lr 3,A ; 080E 53
pi clrscrn ; 080F 28 00 D0 Calls BIOS clear screen routine, clear to grey background
L0812:
li $8A ; 0812 20 8A Loads character $8A in r0
lr 0,A ; 0814 50
pi prompt ; 0815 28 00 99 Calls BIOS prompt, draws character and waits for keypress
lr A,4 ; 0818 44 Button result returned in r4
ci 4 ; 0819 25 04 Compare to %00000100 - Button 3
bnz L0820 ; 081B 94 04
jmp L0E99 ; 081D 29 0E 99 Button 3 makes a jump to A0e99

L0820:
lr A,4 ; 0820 44 Not button 3...
ci 1 ; 0821 25 01 Button 1?
bz L082D ; 0823 84 09 If it is, jump
ci 2 ; 0825 25 02 Button 2?
bnz L0812 ; 0827 94 EA If not, go back to wait for button press A0812
lr A,HL ; 0829 4B Game 2 selected
oi $20 ; 082A 22 20
lr HL,A ; 082C 5B Change bit 5 in r11 to 1
L082D:
li $93 ; 082D 20 93
lr 3,A ; 082F 53
pi clrscrn ; 0830 28 00 D0 Clear screen to lt.blue using BIOS routine.
br L0861 ; 0833 90 2D
L0835:
lr K,P ; 0835 08
lis 3 ; 0836 73
lr 9,A ; 0837 59
dci L0DD7 ; 0838 2A 0D D7
br L083E ; 083B 90 02
L083D:
lr DC,Q ; 083D 0F
L083E:
li 8 ; 083E 20 08
lr 3,A ; 0840 53
lr 6,A ; 0841 56
lr 5,A ; 0842 55
lm ; 0843 16
lr 0,A ; 0844 50
lm ; 0845 16
lr 1,A ; 0846 51
lm ; 0847 16
lr 2,A ; 0848 52
lr Q,DC ; 0849 0E
li $C0 ; 084A 20 C0
lr 4,A ; 084C 54
dci L0E60 ; 084D 2A 0E 60
lr A,HL ; 0850 4B
sl 1 ; 0851 13
bp L0859 ; 0852 81 06
clr ; 0854 70
lr 0,A ; 0855 50
dci L0E88 ; 0856 2A 0E 88
L0859:
pi L0CA8 ; 0859 28 0C A8
ds 9 ; 085C 39
bnz L083D ; 085D 94 DF
lr P,K ; 085F 09
pop ; 0860 1C

L0861:
lisu 2 ; 0861 62
lisl 0 ; 0862 68
li $18 ; 0863 20 18
lr I,A ; 0865 5D
li $5A ; 0866 20 5A
lr I,A ; 0868 5D
li $34 ; 0869 20 34
lr I,A ; 086B 5D
lisu 3 ; 086C 63
clr ; 086D 70
lr I,A ; 086E 5D
li 9 ; 086F 20 09
lr I,A ; 0871 5D
li $34 ; 0872 20 34
lr I,A ; 0874 5D
pi L0835 ; 0875 28 08 35
dci L0DE0 ; 0878 2A 0D E0
pi L0C8E ; 087B 28 0C 8E
pi L0CA8 ; 087E 28 0C A8
lis 8 ; 0881 78
sl 4 ; 0882 15
pi L0C9F ; 0883 28 0C 9F
dci L0DE0 ; 0886 2A 0D E0
pi L0CA8 ; 0889 28 0C A8
lr A,HL ; 088C 4B
ni $F7 ; 088D 21 F7
lr HL,A ; 088F 5B
lisu 6 ; 0890 66
lisl 0 ; 0891 68
li $FF ; 0892 20 FF
lr S,A ; 0894 5C
lisl 3 ; 0895 6B
lr S,A ; 0896 5C
lr A,HL ; 0897 4B
sl 4 ; 0898 15
sr 1 ; 0899 12
sl 4 ; 089A 15
bp L08A0 ; 089B 81 04
jmp L0BDE ; 089D 29 0B DE

L08A0:
lisu 7 ; 08A0 67
lisl 0 ; 08A1 68
lis $F ; 08A2 7F
lr S,A ; 08A3 5C
lr A,HL ; 08A4 4B
sl 1 ; 08A5 13
sl 1 ; 08A6 13
bm L08D1 ; 08A7 91 29
L08A9:
li $85 ; 08A9 20 85
lr 0,A ; 08AB 50
pi prompt ; 08AC 28 00 99
lr A,4 ; 08AF 44
ci 8 ; 08B0 25 08
bnz L08B6 ; 08B2 94 03
br L08D1 ; 08B4 90 1C
L08B6:
ci 2 ; 08B6 25 02
bnz L08A9 ; 08B8 94 F0
li $8E ; 08BA 20 8E
lr 0,A ; 08BC 50
pi prompt ; 08BD 28 00 99
lisu 7 ; 08C0 67
lisl 0 ; 08C1 68
dci L0E90 ; 08C2 2A 0E 90
lr A,4 ; 08C5 44
sr 1 ; 08C6 12
adc ; 08C7 8E
lm ; 08C8 16
lr S,A ; 08C9 5C
br L08A9 ; 08CA 90 DE
.byte $4B,$13,$13,$91,$01 ; 08CC
L08D1:
li $83 ; 08D1 20 83
lisu 7 ; 08D3 67
lisl 2 ; 08D4 6A
lr S,A ; 08D5 5C
L08D6:
lr A,S ; 08D6 4C
lr 0,A ; 08D7 50
li $33 ; 08D8 20 33
lr 1,A ; 08DA 51
li $13 ; 08DB 20 13
lr 2,A ; 08DD 52
pi drawchar ; 08DE 28 06 79
clr ; 08E1 70
lr 6,A ; 08E2 56
pi delay ; 08E3 28 00 8F
ds S ; 08E6 3C
lr A,S ; 08E7 4C
sl 1 ; 08E8 13
bnz L08D6 ; 08E9 94 EC
li $D ; 08EB 20 0D
lr 0,A ; 08ED 50
li $33 ; 08EE 20 33
lr 1,A ; 08F0 51
li $13 ; 08F1 20 13
lr 2,A ; 08F3 52
pi drawchar ; 08F4 28 06 79
L08F7:
lr A,HL ; 08F7 4B
sl 4 ; 08F8 15
lisu 2 ; 08F9 62
lisl 0 ; 08FA 68
bp L08FF ; 08FB 81 03
lisu 3 ; 08FD 63
lisl 3 ; 08FE 6B
L08FF:
pi L0C56 ; 08FF 28 0C 56
lr A,S ; 0902 4C
ci $7F ; 0903 25 7F
bnz L090B ; 0905 94 05
li $68 ; 0907 20 68
br L091B ; 0909 90 11
L090B:
ci $69 ; 090B 25 69
bnz L0913 ; 090D 94 05
li 0 ; 090F 20 00
br L091B ; 0911 90 09
L0913:
dci L0DE0 ; 0913 2A 0D E0
lr A,S ; 0916 4C
lr 9,A ; 0917 59
lis 1 ; 0918 71
br L0920 ; 0919 90 06
L091B:
lr 9,A ; 091B 59
dci L0E88 ; 091C 2A 0E 88
clr ; 091F 70
L0920:
lr 7,A ; 0920 57
lr A,HL ; 0921 4B
sl 4 ; 0922 15
pi L0C9F ; 0923 28 0C 9F
lr A,9 ; 0926 49
lr S,A ; 0927 5C
clr ; 0928 70
as 7 ; 0929 C7
bnz L092D ; 092A 94 02
lr 0,A ; 092C 50
L092D:
pi L0CA8 ; 092D 28 0C A8
lr A,HL ; 0930 4B
xi 8 ; 0931 23 08
lr HL,A ; 0933 5B
sl 4 ; 0934 15
bm L08F7 ; 0935 91 C1
lr A,HL ; 0937 4B
sl 1 ; 0938 13
bm L0954 ; 0939 91 1A
lisu 2 ; 093B 62
lisl 2 ; 093C 6A
lr A,S ; 093D 4C
com ; 093E 18
inc ; 093F 1F
ai $2E ; 0940 24 2E
bp L094D ; 0942 81 0A
lisu 3 ; 0944 63
lisl 5 ; 0945 6D
lr A,S ; 0946 4C
com ; 0947 18
inc ; 0948 1F
ai $2E ; 0949 24 2E
bm L0954 ; 094B 91 08
L094D:
lr A,HL ; 094D 4B
oi $40 ; 094E 22 40
lr HL,A ; 0950 5B
pi L0835 ; 0951 28 08 35
L0954:
lisu 7 ; 0954 67
lisl 0 ; 0955 68
lr A,S ; 0956 4C
ni $F ; 0957 21 0F
lr 5,A ; 0959 55
pi delay ; 095A 28 00 8F
ins 0 ; 095D A0
ci $B ; 095E 25 0B
bnz L0965 ; 0960 94 04
jmp L08A9 ; 0962 29 08 A9

L0965:
lr A,HL ; 0965 4B
xi $80 ; 0966 23 80
lr HL,A ; 0968 5B
lisu 7 ; 0969 67
lisl 1 ; 096A 69
lr A,S ; 096B 4C
inc ; 096C 1F
ci 3 ; 096D 25 03
bz L0974 ; 096F 84 04
lr S,A ; 0971 5C
br L09BF ; 0972 90 4C
L0974:
clr ; 0974 70
lr S,A ; 0975 5C
lr A,HL ; 0976 4B
sl 1 ; 0977 13
sl 1 ; 0978 13
bp L097E ; 0979 81 04
jmp L0D02 ; 097B 29 0D 02

L097E:
clr ; 097E 70
outs 0 ; 097F B0
outs 1 ; 0980 B1
outs 4 ; 0981 B4
outs 5 ; 0982 B5
ins 1 ; 0983 A1
lisu 6 ; 0984 66
lisl 0 ; 0985 68
lr S,A ; 0986 5C
lisl 3 ; 0987 6B
lr A,HL ; 0988 4B
sl 1 ; 0989 13
sl 1 ; 098A 13
bm L098F ; 098B 91 03
ins 4 ; 098D A4
lr S,A ; 098E 5C
L098F:
lr A,S ; 098F 4C
sl 4 ; 0990 15
bm L099B ; 0991 91 09
lisu 3 ; 0993 63
ds S ; 0994 3C
lr A,S ; 0995 4C
ni $F ; 0996 21 0F
lr S,A ; 0998 5C
br L09A4 ; 0999 90 0A
L099B:
sl 1 ; 099B 13
bm L09A4 ; 099C 91 07
lisu 3 ; 099E 63
lr A,S ; 099F 4C
inc ; 09A0 1F
ni $F ; 09A1 21 0F
lr S,A ; 09A3 5C
L09A4:
lisu 6 ; 09A4 66
lisl 0 ; 09A5 68
lr A,S ; 09A6 4C
sl 4 ; 09A7 15
bm L09B4 ; 09A8 91 0B
lisu 2 ; 09AA 62
ds S ; 09AB 3C
lr A,S ; 09AC 4C
ni $F ; 09AD 21 0F
oi $10 ; 09AF 22 10
lr S,A ; 09B1 5C
L09B2:
br L09BF ; 09B2 90 0C
L09B4:
sl 1 ; 09B4 13
bm L09B2 ; 09B5 91 FC
lisu 2 ; 09B7 62
lr A,S ; 09B8 4C
inc ; 09B9 1F
ni $F ; 09BA 21 0F
oi $10 ; 09BC 22 10
lr S,A ; 09BE 5C
L09BF:
lr A,HL ; 09BF 4B
sl 1 ; 09C0 13
bm L09C6 ; 09C1 91 04
jmp L08F7 ; 09C3 29 08 F7

L09C6:
lisu 6 ; 09C6 66
lisl 1 ; 09C7 69
clr ; 09C8 70
as D ; 09C9 CE
bm L0A0C ; 09CA 91 41
clr ; 09CC 70
as I ; 09CD CD
bp L09D5 ; 09CE 81 06
clr ; 09D0 70
lr I,A ; 09D1 5D
L09D2:
jmp L0B6B ; 09D2 29 0B 6B

L09D5:
lr A,S ; 09D5 4C
sl 1 ; 09D6 13
bm L09D2 ; 09D7 91 FA
li $80 ; 09D9 20 80
as S ; 09DB CC
lr D,A ; 09DC 5E
lisu 2 ; 09DD 62
L09DE:
pi L0C98 ; 09DE 28 0C 98
lr A,HL ; 09E1 4B
sl 4 ; 09E2 15
lisl 0 ; 09E3 68
bm L09E7 ; 09E4 91 02
lisl 3 ; 09E6 6B
L09E7:
lr A,0 ; 09E7 40
lr I,A ; 09E8 5D
lr A,1 ; 09E9 41
lr I,A ; 09EA 5D
lr A,2 ; 09EB 42
lr I,A ; 09EC 5D
lr A,HL ; 09ED 4B
sl 4 ; 09EE 15
lisl 0 ; 09EF 68
bm L09F3 ; 09F0 91 02
lisl 3 ; 09F2 6B
L09F3:
dci L0E95 ; 09F3 2A 0E 95
lr A,S ; 09F6 4C
ni $10 ; 09F7 21 10
lr A,I ; 09F9 4D
bz L09FD ; 09FA 84 02
com ; 09FC 18
L09FD:
ni $F ; 09FD 21 0F
sr 1 ; 09FF 12
sr 1 ; 0A00 12
adc ; 0A01 8E
lm ; 0A02 16
lr 8,A ; 0A03 58
ni $F ; 0A04 21 0F
as S ; 0A06 CC
lr I,A ; 0A07 5D
lr A,8 ; 0A08 48
sr 4 ; 0A09 14
as S ; 0A0A CC
lr I,A ; 0A0B 5D
L0A0C:
clr ; 0A0C 70
br L0A54 ; 0A0D 90 46
L0A0F:
lr A,HL ; 0A0F 4B
sl 4 ; 0A10 15
lisu 6 ; 0A11 66
lisl 1 ; 0A12 69
bp L0A16 ; 0A13 81 02
lisl 2 ; 0A15 6A
L0A16:
clr ; 0A16 70
as S ; 0A17 CC
bp L0A7C ; 0A18 81 63
lis $A ; 0A1A 7A
lr 5,A ; 0A1B 55
L0A1C:
lr A,HL ; 0A1C 4B
sl 4 ; 0A1D 15
lisu 2 ; 0A1E 62
lisl 3 ; 0A1F 6B
bp L0A24 ; 0A20 81 03
lisu 3 ; 0A22 63
lisl 0 ; 0A23 68
L0A24:
pi L0A8A ; 0A24 28 0A 8A
pi L0C56 ; 0A27 28 0C 56
lr A,I ; 0A2A 4D
ni $70 ; 0A2B 21 70
ci $70 ; 0A2D 25 70
bz L0A36 ; 0A2F 84 06
lr A,I ; 0A31 4D
ni $3F ; 0A32 21 3F
bnz L0A4B ; 0A34 94 16
L0A36:
lisu 6 ; 0A36 66
lr A,HL ; 0A37 4B
sl 4 ; 0A38 15
lisl 0 ; 0A39 68
clr ; 0A3A 70
bp L0A41 ; 0A3B 81 05
lisl 3 ; 0A3D 6B
as D ; 0A3E CE
br L0A42 ; 0A3F 90 02
L0A41:
as I ; 0A41 CD
L0A42:
clr ; 0A42 70
bm L0A47 ; 0A43 91 03
li $40 ; 0A45 20 40
L0A47:
lr S,A ; 0A47 5C
clr ; 0A48 70
br L0A54 ; 0A49 90 0A
L0A4B:
lr A,HL ; 0A4B 4B
xi $80 ; 0A4C 23 80
lr HL,A ; 0A4E 5B
ds 5 ; 0A4F 35
bnz L0A1C ; 0A50 94 CB
li $80 ; 0A52 20 80
L0A54:
lr K,P ; 0A54 08
lr 0,A ; 0A55 50
lis 1 ; 0A56 71
lr 5,A ; 0A57 55
lr 6,A ; 0A58 56
lr 3,A ; 0A59 53
lr A,HL ; 0A5A 4B
sl 4 ; 0A5B 15
lisu 3 ; 0A5C 63
lisl 1 ; 0A5D 69
bm L0A62 ; 0A5E 91 03
lisu 2 ; 0A60 62
lisl 4 ; 0A61 6C
L0A62:
lr A,I ; 0A62 4D
lr 1,A ; 0A63 51
lr A,D ; 0A64 4E
lr 2,A ; 0A65 52
li $C0 ; 0A66 20 C0
lr 4,A ; 0A68 54
lisu 0 ; 0A69 60
lisl 0 ; 0A6A 68
pi L0CC4 ; 0A6B 28 0C C4
lr A,HL ; 0A6E 4B
sl 4 ; 0A6F 15
sr 1 ; 0A70 12
sl 4 ; 0A71 15
bp L0A76 ; 0A72 81 03
lr P,K ; 0A74 09
pop ; 0A75 1C

L0A76:
clr ; 0A76 70
as 0 ; 0A77 C0
bm L0A7C ; 0A78 91 03
br L0A0F ; 0A7A 90 94
L0A7C:
lr A,HL ; 0A7C 4B
sl 4 ; 0A7D 15
bm L0A83 ; 0A7E 91 04
jmp L0B6B ; 0A80 29 0B 6B

L0A83:
lr A,HL ; 0A83 4B
ni $F7 ; 0A84 21 F7
lr HL,A ; 0A86 5B
jmp L08F7 ; 0A87 29 08 F7

L0A8A:
lr K,P ; 0A8A 08
lr A,5 ; 0A8B 45
lr 8,A ; 0A8C 58
lr A,I ; 0A8D 4D
lr A,I ; 0A8E 4D
lr 0,A ; 0A8F 50
lr A,D ; 0A90 4E
lr 1,A ; 0A91 51
lr A,IS ; 0A92 0A
xi 8 ; 0A93 23 08
lr IS,A ; 0A95 0B
lr A,I ; 0A96 4D
com ; 0A97 18
inc ; 0A98 1F
as 0 ; 0A99 C0
bm L0ACE ; 0A9A 91 33
lr 9,A ; 0A9C 59
sl 1 ; 0A9D 13
sr 4 ; 0A9E 14
bnz L0ACE ; 0A9F 94 2E
lr A,D ; 0AA1 4E
com ; 0AA2 18
inc ; 0AA3 1F
as 1 ; 0AA4 C1
bm L0ACE ; 0AA5 91 28
lr HU,A ; 0AA7 5A
sl 1 ; 0AA8 13
sr 4 ; 0AA9 14
bnz L0ACE ; 0AAA 94 23
lis 8 ; 0AAC 78
xs HL ; 0AAD EB
sl 4 ; 0AAE 15
pi L0C9F ; 0AAF 28 0C 9F
lr A,D ; 0AB2 4E
lr A,S ; 0AB3 4C
sl 4 ; 0AB4 15
sr 1 ; 0AB5 12
dci L0DE0 ; 0AB6 2A 0D E0
adc ; 0AB9 8E
lr A,S ; 0ABA 4C
ni $10 ; 0ABB 21 10
lr A,HU ; 0ABD 4A
bz L0AC2 ; 0ABE 84 03
xi 7 ; 0AC0 23 07
L0AC2:
adc ; 0AC2 8E
li $80 ; 0AC3 20 80
L0AC5:
ds 9 ; 0AC5 39
bm L0ACB ; 0AC6 91 04
sr 1 ; 0AC8 12
br L0AC5 ; 0AC9 90 FB
L0ACB:
nm ; 0ACB 8A
bnz L0ADA ; 0ACC 94 0D
L0ACE:
lr A,HL ; 0ACE 4B
sl 4 ; 0ACF 15
lisu 2 ; 0AD0 62
lisl 3 ; 0AD1 6B
bp L0AD6 ; 0AD2 81 03
lisu 3 ; 0AD4 63
lisl 0 ; 0AD5 68
L0AD6:
lr A,8 ; 0AD6 48
lr 5,A ; 0AD7 55
lr P,K ; 0AD8 09
pop ; 0AD9 1C

L0ADA:
lr A,HL ; 0ADA 4B
ni $BF ; 0ADB 21 BF
lr HL,A ; 0ADD 5B
pi L0835 ; 0ADE 28 08 35
lisu 3 ; 0AE1 63
lisl 0 ; 0AE2 68
pi L0C93 ; 0AE3 28 0C 93
lis 9 ; 0AE6 79
xs HL ; 0AE7 EB
lr HL,A ; 0AE8 5B
pi L0A54 ; 0AE9 28 0A 54
lisu 2 ; 0AEC 62
lisl 3 ; 0AED 6B
pi L0C93 ; 0AEE 28 0C 93
lis 8 ; 0AF1 78
xs HL ; 0AF2 EB
lr HL,A ; 0AF3 5B
pi L0A54 ; 0AF4 28 0A 54
lis 1 ; 0AF7 71
xs HL ; 0AF8 EB
lr HL,A ; 0AF9 5B
L0AFA:
lr A,HL ; 0AFA 4B
sl 4 ; 0AFB 15
com ; 0AFC 18
li $80 ; 0AFD 20 80
bp L0B03 ; 0AFF 81 03
li $40 ; 0B01 20 40
L0B03:
outs 5 ; 0B03 B5
pi L0C9F ; 0B04 28 0C 9F
dci L0DE0 ; 0B07 2A 0D E0
pi L0CA8 ; 0B0A 28 0C A8
lr A,HL ; 0B0D 4B
sl 4 ; 0B0E 15
lisu 2 ; 0B0F 62
lisl 0 ; 0B10 68
bm L0B15 ; 0B11 91 03
lisu 3 ; 0B13 63
lisl 3 ; 0B14 6B
L0B15:
lr A,S ; 0B15 4C
inc ; 0B16 1F
ni $F ; 0B17 21 0F
lr 0,A ; 0B19 50
li $10 ; 0B1A 20 10
ns S ; 0B1C FC
as 0 ; 0B1D C0
lr S,A ; 0B1E 5C
lis 4 ; 0B1F 74
lr 5,A ; 0B20 55
pi delay ; 0B21 28 00 8F
lr A,HL ; 0B24 4B
sl 4 ; 0B25 15
com ; 0B26 18
dci L0E88 ; 0B27 2A 0E 88
pi L0C9F ; 0B2A 28 0C 9F
clr ; 0B2D 70
lr 0,A ; 0B2E 50
outs 5 ; 0B2F B5
pi L0CA8 ; 0B30 28 0C A8
lr A,HL ; 0B33 4B
sl 4 ; 0B34 15
lisu 2 ; 0B35 62
lisl 2 ; 0B36 6A
bm L0B3B ; 0B37 91 03
lisu 3 ; 0B39 63
lisl 5 ; 0B3A 6D
L0B3B:
lr A,S ; 0B3B 4C
ci $33 ; 0B3C 25 33
bz L0B46 ; 0B3E 84 07
inc ; 0B40 1F
ni $3F ; 0B41 21 3F
lr S,A ; 0B43 5C
br L0AFA ; 0B44 90 B5
L0B46:
lr A,D ; 0B46 4E
lr A,S ; 0B47 4C
ci $33 ; 0B48 25 33
bz L0B55 ; 0B4A 84 0A
lis 1 ; 0B4C 71
bp L0B51 ; 0B4D 81 03
com ; 0B4F 18
inc ; 0B50 1F
L0B51:
as S ; 0B51 CC
lr S,A ; 0B52 5C
br L0AFA ; 0B53 90 A6
L0B55:
ins 5 ; 0B55 A5
ni $3F ; 0B56 21 3F
outs 5 ; 0B58 B5
lisu 6 ; 0B59 66
lisl 1 ; 0B5A 69
lr A,S ; 0B5B 4C
sl 1 ; 0B5C 13
sr 1 ; 0B5D 12
lr I,A ; 0B5E 5D
lr A,S ; 0B5F 4C
sl 1 ; 0B60 13
sr 1 ; 0B61 12
lr S,A ; 0B62 5C
lr A,HL ; 0B63 4B
sl 4 ; 0B64 15
lisu 2 ; 0B65 62
bp L0B69 ; 0B66 81 02
lisu 3 ; 0B68 63
L0B69:
br L0B91 ; 0B69 90 27
L0B6B:
lr A,HL ; 0B6B 4B
oi 8 ; 0B6C 22 08
lr HL,A ; 0B6E 5B
lisu 6 ; 0B6F 66
lisl 2 ; 0B70 6A
clr ; 0B71 70
as I ; 0B72 CD
bp L0B78 ; 0B73 81 04
jmp L0A0C ; 0B75 29 0A 0C

L0B78:
clr ; 0B78 70
as D ; 0B79 CE
bp L0B85 ; 0B7A 81 0A
clr ; 0B7C 70
lr S,A ; 0B7D 5C
L0B7E:
lr A,HL ; 0B7E 4B
ni $F7 ; 0B7F 21 F7
lr HL,A ; 0B81 5B
jmp L08F7 ; 0B82 29 08 F7

L0B85:
lr A,S ; 0B85 4C
sl 1 ; 0B86 13
bm L0B7E ; 0B87 91 F6
li $80 ; 0B89 20 80
as S ; 0B8B CC
lr I,A ; 0B8C 5D
lisu 3 ; 0B8D 63
jmp L09DE ; 0B8E 29 09 DE

L0B91:
lr A,IS ; 0B91 0A
lr 0,A ; 0B92 50
lr A,HL ; 0B93 4B
sl 1 ; 0B94 13
sl 1 ; 0B95 13
bp L0BAF ; 0B96 81 18
lr A,IS ; 0B98 0A
sl 1 ; 0B99 13
sr 4 ; 0B9A 14
ci 2 ; 0B9B 25 02
lisu 7 ; 0B9D 67
lisl 0 ; 0B9E 68
bnz L0BA8 ; 0B9F 94 08
ds S ; 0BA1 3C
bnz L0BAF ; 0BA2 94 0C
lis 1 ; 0BA4 71
lr S,A ; 0BA5 5C
br L0BAF ; 0BA6 90 08
L0BA8:
lr A,S ; 0BA8 4C
inc ; 0BA9 1F
ci $10 ; 0BAA 25 10
bz L0BAF ; 0BAC 84 02
lr S,A ; 0BAE 5C
L0BAF:
lr A,0 ; 0BAF 40
lr IS,A ; 0BB0 0B
lisl 6 ; 0BB1 6E
li $67 ; 0BB2 20 67
asd S ; 0BB4 DC
lr S,A ; 0BB5 5C
ci 0 ; 0BB6 25 00
bnz L0BBF ; 0BB8 94 06
lr I,A ; 0BBA 5D
li $67 ; 0BBB 20 67
asd S ; 0BBD DC
lr S,A ; 0BBE 5C
L0BBF:
lr A,HL ; 0BBF 4B
oi 1 ; 0BC0 22 01
lr HL,A ; 0BC2 5B
dci L0E88 ; 0BC3 2A 0E 88
pi L0C8E ; 0BC6 28 0C 8E
clr ; 0BC9 70
lr 0,A ; 0BCA 50
pi L0CA8 ; 0BCB 28 0C A8
dci L0E88 ; 0BCE 2A 0E 88
lis 8 ; 0BD1 78
sl 4 ; 0BD2 15
pi L0C9F ; 0BD3 28 0C 9F
clr ; 0BD6 70
lr 0,A ; 0BD7 50
pi L0CA8 ; 0BD8 28 0C A8
pi L0861 ; 0BDB 28 08 61
L0BDE:
lr A,HL ; 0BDE 4B
ni $20 ; 0BDF 21 20
lr HL,A ; 0BE1 5B
L0BE2:
lr A,HL ; 0BE2 4B
sl 4 ; 0BE3 15
lisu 7 ; 0BE4 67
bm L0BE8 ; 0BE5 91 02
lisu 3 ; 0BE7 63
L0BE8:
lisl 7 ; 0BE8 6F
li $1B ; 0BE9 20 1B
lr 1,A ; 0BEB 51
li $33 ; 0BEC 20 33
lr 2,A ; 0BEE 52
lr A,D ; 0BEF 4E
ni $F ; 0BF0 21 0F
ai $80 ; 0BF2 24 80
lr 0,A ; 0BF4 50
pi drawchar ; 0BF5 28 06 79
lr A,S ; 0BF8 4C
sr 4 ; 0BF9 14
ai $80 ; 0BFA 24 80
lr 0,A ; 0BFC 50
pi drawchar ; 0BFD 28 06 79
lr A,S ; 0C00 4C
ni $F ; 0C01 21 0F
ai $80 ; 0C03 24 80
lr 0,A ; 0C05 50
pi drawchar ; 0C06 28 06 79
lr A,HL ; 0C09 4B
sl 4 ; 0C0A 15
lisu 7 ; 0C0B 67
bm L0C0F ; 0C0C 91 02
lisu 2 ; 0C0E 62
L0C0F:
lisl 7 ; 0C0F 6F
li $47 ; 0C10 20 47
lr 1,A ; 0C12 51
li $33 ; 0C13 20 33
lr 2,A ; 0C15 52
lr A,D ; 0C16 4E
ni $F ; 0C17 21 0F
ai $40 ; 0C19 24 40
lr 0,A ; 0C1B 50
pi drawchar ; 0C1C 28 06 79
lr A,S ; 0C1F 4C
sr 4 ; 0C20 14
ai $40 ; 0C21 24 40
lr 0,A ; 0C23 50
pi drawchar ; 0C24 28 06 79
lr A,S ; 0C27 4C
ni $F ; 0C28 21 0F
ai $40 ; 0C2A 24 40
lr 0,A ; 0C2C 50
pi drawchar ; 0C2D 28 06 79
lr A,HL ; 0C30 4B
sl 4 ; 0C31 15
bm L0C4F ; 0C32 91 1C
clr ; 0C34 70
lr 6,A ; 0C35 56
pi delay ; 0C36 28 00 8F
clr ; 0C39 70
lr 6,A ; 0C3A 56
pi delay ; 0C3B 28 00 8F
clr ; 0C3E 70
lr 6,A ; 0C3F 56
pi delay ; 0C40 28 00 8F
lisu 7 ; 0C43 67
lisl 7 ; 0C44 6F
li $DD ; 0C45 20 DD
lr D,A ; 0C47 5E
lr S,A ; 0C48 5C
lr A,HL ; 0C49 4B
oi 8 ; 0C4A 22 08
lr HL,A ; 0C4C 5B
br L0BE2 ; 0C4D 90 94
L0C4F:
lr A,HL ; 0C4F 4B
ni $20 ; 0C50 21 20
lr HL,A ; 0C52 5B
jmp L08D1 ; 0C53 29 08 D1

L0C56:
dci L0E78 ; 0C56 2A 0E 78
lr A,S ; 0C59 4C
ni $F ; 0C5A 21 0F
adc ; 0C5C 8E
lr A,I ; 0C5D 4D
ni $10 ; 0C5E 21 10
sr 1 ; 0C60 12
sl 4 ; 0C61 15
am ; 0C62 88
lr 0,A ; 0C63 50
lr A,I ; 0C64 4D
lr J,W ; 0C65 1E
clr ; 0C66 70
as HL ; 0C67 CB
lr A,0 ; 0C68 40
bp L0C6C ; 0C69 81 02
sr 1 ; 0C6B 12
L0C6C:
sr 4 ; 0C6C 14
ni 1 ; 0C6D 21 01
lr W,J ; 0C6F 1D
bp L0C74 ; 0C70 81 03
com ; 0C72 18
inc ; 0C73 1F
L0C74:
as S ; 0C74 CC
ni $3F ; 0C75 21 3F
lr D,A ; 0C77 5E
lr A,0 ; 0C78 40
sl 4 ; 0C79 15
lr J,W ; 0C7A 1E
sr 4 ; 0C7B 14
clr ; 0C7C 70
as HL ; 0C7D CB
lr A,0 ; 0C7E 40
bp L0C82 ; 0C7F 81 02
sr 1 ; 0C81 12
L0C82:
ni 1 ; 0C82 21 01
lr W,J ; 0C84 1D
bp L0C89 ; 0C85 81 03
com ; 0C87 18
inc ; 0C88 1F
L0C89:
as S ; 0C89 CC
ni $7F ; 0C8A 21 7F
lr S,A ; 0C8C 5C
pop ; 0C8D 1C

L0C8E:
li $40 ; 0C8E 20 40
lr 4,A ; 0C90 54
lisu 2 ; 0C91 62
lisl 0 ; 0C92 68
L0C93:
li 8 ; 0C93 20 08
lr 5,A ; 0C95 55
lr 6,A ; 0C96 56
lr 3,A ; 0C97 53
L0C98:
lr A,I ; 0C98 4D
lr 0,A ; 0C99 50
lr A,I ; 0C9A 4D
lr 1,A ; 0C9B 51
lr A,D ; 0C9C 4E
lr 2,A ; 0C9D 52
pop ; 0C9E 1C

L0C9F:
bp L0C8E ; 0C9F 81 EE
li $80 ; 0CA1 20 80
lr 4,A ; 0CA3 54
lisu 3 ; 0CA4 63
lisl 3 ; 0CA5 6B
br L0C93 ; 0CA6 90 EC
L0CA8:
lisu 4 ; 0CA8 64
lisl 0 ; 0CA9 68
lr A,0 ; 0CAA 40
sl 4 ; 0CAB 15
sr 1 ; 0CAC 12
adc ; 0CAD 8E
lr A,0 ; 0CAE 40
ni $10 ; 0CAF 21 10
bnz L0CBB ; 0CB1 94 09
L0CB3:
lm ; 0CB3 16
lr I,A ; 0CB4 5D
br7 L0CB3 ; 0CB5 8F FD
lm ; 0CB7 16
lr I,A ; 0CB8 5D
br L0CC4 ; 0CB9 90 0A
L0CBB:
lisl 7 ; 0CBB 6F
L0CBC:
lm ; 0CBC 16
lr D,A ; 0CBD 5E
br7 L0CBC ; 0CBE 8F FD
lisl 0 ; 0CC0 68
br L0CC4 ; 0CC1 90 02
L0CC3:
lr 5,A ; 0CC3 55
L0CC4:
lr A,2 ; 0CC4 42
com ; 0CC5 18
ni $3F ; 0CC6 21 3F
lr 8,A ; 0CC8 58
ins 5 ; 0CC9 A5
ni $C0 ; 0CCA 21 C0
as 8 ; 0CCC C8
outs 5 ; 0CCD B5
lr A,I ; 0CCE 4D
lr 7,A ; 0CCF 57
L0CD0:
lr A,1 ; 0CD0 41
com ; 0CD1 18
outs 4 ; 0CD2 B4
lr A,7 ; 0CD3 47
oi 0 ; 0CD4 22 00
lr A,4 ; 0CD6 44
bm L0CDA ; 0CD7 91 02
clr ; 0CD9 70
L0CDA:
com ; 0CDA 18
outs 1 ; 0CDB B1
lr A,7 ; 0CDC 47
sl 1 ; 0CDD 13
lr 7,A ; 0CDE 57
li $60 ; 0CDF 20 60
outs 0 ; 0CE1 B0
li $50 ; 0CE2 20 50
outs 0 ; 0CE4 B0
lr A,1 ; 0CE5 41
inc ; 0CE6 1F
lr 1,A ; 0CE7 51
lis 4 ; 0CE8 74
lr 8,A ; 0CE9 58
L0CEA:
ds 8 ; 0CEA 38
bnz L0CEA ; 0CEB 94 FE
ds 5 ; 0CED 35
bnz L0CD0 ; 0CEE 94 E1
lr A,2 ; 0CF0 42
inc ; 0CF1 1F
lr 2,A ; 0CF2 52
lr A,3 ; 0CF3 43
ni $F ; 0CF4 21 0F
com ; 0CF6 18
inc ; 0CF7 1F
as 1 ; 0CF8 C1
lr 1,A ; 0CF9 51
lr A,3 ; 0CFA 43
ds 6 ; 0CFB 36
bnz L0CC3 ; 0CFC 94 C6
clr ; 0CFE 70
outs 1 ; 0CFF B1
outs 0 ; 0D00 B0
pop ; 0D01 1C

L0D02:
lr A,HL ; 0D02 4B
sl 1 ; 0D03 13
bp L0D73 ; 0D04 81 6E
sl 4 ; 0D06 15
bm L0D73 ; 0D07 91 6B
lisu 6 ; 0D09 66
lisl 2 ; 0D0A 6A
clr ; 0D0B 70
as I ; 0D0C CD
bp L0D15 ; 0D0D 81 07
li $FF ; 0D0F 20 FF
lr S,A ; 0D11 5C
jmp L0DA8 ; 0D12 29 0D A8

L0D15:
lr A,HL ; 0D15 4B
sl 1 ; 0D16 13
sl 1 ; 0D17 13
sl 4 ; 0D18 15
bp L0D1E ; 0D19 81 04
jmp L0DBE ; 0D1B 29 0D BE

L0D1E:
lisu 3 ; 0D1E 63
lisl 5 ; 0D1F 6D
lr A,D ; 0D20 4E
com ; 0D21 18
inc ; 0D22 1F
lr 0,A ; 0D23 50
lr A,I ; 0D24 4D
com ; 0D25 18
inc ; 0D26 1F
lr 1,A ; 0D27 51
lisu 2 ; 0D28 62
lisl 2 ; 0D29 6A
lr A,D ; 0D2A 4E
as 0 ; 0D2B C0
lr 0,A ; 0D2C 50
lr A,D ; 0D2D 4E
as 1 ; 0D2E C1
lr 1,A ; 0D2F 51
clr ; 0D30 70
as 0 ; 0D31 C0
bm L0D36 ; 0D32 91 03
com ; 0D34 18
inc ; 0D35 1F
L0D36:
ai 2 ; 0D36 24 02
bm L0D40 ; 0D38 91 07
lisu 3 ; 0D3A 63
lisl 3 ; 0D3B 6B
lis 7 ; 0D3C 77
ns S ; 0D3D FC
bz L0DAB ; 0D3E 84 6C
L0D40:
clr ; 0D40 70
as 1 ; 0D41 C1
bm L0D46 ; 0D42 91 03
com ; 0D44 18
inc ; 0D45 1F
L0D46:
ai 2 ; 0D46 24 02
bm L0D54 ; 0D48 91 0B
lisu 3 ; 0D4A 63
lisl 3 ; 0D4B 6B
lis 4 ; 0D4C 74
xs S ; 0D4D EC
lis $C ; 0D4E 7C
bz L0DAB ; 0D4F 84 5B
xs S ; 0D51 EC
bz L0DAB ; 0D52 84 58
L0D54:
lisl 0 ; 0D54 68
lisu 5 ; 0D55 65
lr A,0 ; 0D56 40
lr I,A ; 0D57 5D
lr A,1 ; 0D58 41
lr D,A ; 0D59 5E
clr ; 0D5A 70
as I ; 0D5B CD
lis 4 ; 0D5C 74
bp L0D84 ; 0D5D 81 26
lr 0,A ; 0D5F 50
clr ; 0D60 70
as S ; 0D61 CC
lr J,W ; 0D62 1E
com ; 0D63 18
inc ; 0D64 1F
lr D,A ; 0D65 5E
lr W,J ; 0D66 1D
lis 2 ; 0D67 72
bm L0D95 ; 0D68 91 2C
lr A,S ; 0D6A 4C
com ; 0D6B 18
inc ; 0D6C 1F
lr S,A ; 0D6D 5C
lis 2 ; 0D6E 72
com ; 0D6F 18
inc ; 0D70 1F
br L0D95 ; 0D71 90 23
L0D73:
lr A,HL ; 0D73 4B
oi 4 ; 0D74 22 04
lr HL,A ; 0D76 5B
clr ; 0D77 70
lr 0,A ; 0D78 50
lisu 3 ; 0D79 63
lisl 1 ; 0D7A 69
lr A,S ; 0D7B 4C
asd I ; 0D7C DD
as S ; 0D7D CC
lisu 1 ; 0D7E 61
as S ; 0D7F CC
ni $F ; 0D80 21 0F
br L0D95 ; 0D82 90 12
L0D84:
lis $C ; 0D84 7C
lr 0,A ; 0D85 50
clr ; 0D86 70
as D ; 0D87 CE
lr J,W ; 0D88 1E
lr A,S ; 0D89 4C
com ; 0D8A 18
inc ; 0D8B 1F
lr W,J ; 0D8C 1D
bm L0D90 ; 0D8D 91 02
lr S,A ; 0D8F 5C
L0D90:
lis 2 ; 0D90 72
bp L0D95 ; 0D91 81 03
com ; 0D93 18
inc ; 0D94 1F
L0D95:
as 0 ; 0D95 C0
lisu 5 ; 0D96 65
lisl 3 ; 0D97 6B
lr S,A ; 0D98 5C
com ; 0D99 18
inc ; 0D9A 1F
lisu 3 ; 0D9B 63
as S ; 0D9C CC
bz L0DAB ; 0D9D 84 0D
sl 4 ; 0D9F 15
li $F7 ; 0DA0 20 F7
bp L0DA6 ; 0DA2 81 03
xi $C ; 0DA4 23 0C
L0DA6:
lisu 6 ; 0DA6 66
lr S,A ; 0DA7 5C
L0DA8:
jmp L097E ; 0DA8 29 09 7E

L0DAB:
lr A,HL ; 0DAB 4B
sl 1 ; 0DAC 13
sl 4 ; 0DAD 15
lr A,HL ; 0DAE 4B
bm L0DB9 ; 0DAF 91 09
lisu 6 ; 0DB1 66
lisl 3 ; 0DB2 6B
li $7F ; 0DB3 20 7F
lr S,A ; 0DB5 5C
lr A,HL ; 0DB6 4B
oi 2 ; 0DB7 22 02
L0DB9:
ni $FB ; 0DB9 21 FB
lr HL,A ; 0DBB 5B
br L0DA8 ; 0DBC 90 EB
L0DBE:
lisu 5 ; 0DBE 65
lisl 0 ; 0DBF 68
lr A,I ; 0DC0 4D
as S ; 0DC1 CC
lis 1 ; 0DC2 71
bp L0DC7 ; 0DC3 81 03
com ; 0DC5 18
inc ; 0DC6 1F
L0DC7:
lisu 3 ; 0DC7 63
lisl 3 ; 0DC8 6B
as S ; 0DC9 CC
ni $F ; 0DCA 21 0F
lr S,A ; 0DCC 5C
lisu 6 ; 0DCD 66
li $7F ; 0DCE 20 7F
lr S,A ; 0DD0 5C
lr A,HL ; 0DD1 4B
ni $FD ; 0DD2 21 FD
lr HL,A ; 0DD4 5B
br L0DA8 ; 0DD5 90 D2

L0DD7:
.byte $00, $30, $2E, $01, $33, $2E, $02, $31, $33 ; 0DD7 object/parameter triples

; aeroplane sprites 8x8, full loop

L0DE0:
.byte %00000000 ; 0DE0 00 right
.byte %01000000
.byte %01100000
.byte %01111101
.byte %01111111
.byte %01111101
.byte %00000000
.byte %00000000

.byte %00000000 ; 0DE8 00 first angle up
.byte %00000010
.byte %00001111
.byte %01011101
.byte %01111000
.byte %01110000
.byte %00000000
.byte %00000000

.byte %00000100 ; 0DF0 04 second angle up
.byte %00000010
.byte %00001101
.byte %01011100
.byte %01111000
.byte %01110000
.byte %00100000
.byte %00000000

.byte %00001100 ; 0DF8 0C third angle up
.byte %00000110
.byte %00001100
.byte %00011100
.byte %01011000
.byte %01111000
.byte %00110000
.byte %00000000

.byte %00011100 ; 0E00 1C up
.byte %00001000
.byte %00011100
.byte %00011100
.byte %00011100
.byte %00111100
.byte %01111100
.byte %00000000

.byte %00110000 ; 0E08 30 loop 3
.byte %01100000
.byte %00110000
.byte %00111000
.byte %00011100
.byte %00001100
.byte %00011100
.byte %00000000

.byte %00100000 ; 0E10 20 loop 3
.byte %01000000
.byte %10110000
.byte %00111000
.byte %00011100
.byte %00001110
.byte %00011100
.byte %00000000

.byte %00000000 ; 0E18 00 loop 3
.byte %01000000
.byte %11110000
.byte %10111100
.byte %00011110
.byte %00001110
.byte %00011100
.byte %00000000

.byte %00000000 ; 0E20 00 left up-side-down
.byte %00000000
.byte %10111110
.byte %11111110
.byte %10111110
.byte %00000110
.byte %00000010
.byte %00000000

.byte %00000000 ; 0E28 00 loop down 1
.byte %00000000
.byte %00001110
.byte %00011110
.byte %10111010
.byte %11110000
.byte %01000000
.byte %00000000

.byte %00000000 ; 0E30 00 loop down 2
.byte %00000100
.byte %00001110
.byte %00011110
.byte %00111010
.byte %10110000
.byte %01000000
.byte %00100000

.byte %00000000 ; 0E38 00 loop down 3
.byte %00001100
.byte %00011110
.byte %00011010
.byte %00111000
.byte %00110000
.byte %01100000
.byte %00110000

.byte %00000000 ; 0E40 00 straight down
.byte %00111110
.byte %00111100
.byte %00111000
.byte %00111000
.byte %00111000
.byte %00010000
.byte %00111000

.byte %00000000 ; 0E48 00 loop up 1
.byte %00111000
.byte %00110000
.byte %00111000
.byte %00011100
.byte %00001100
.byte %00000110
.byte %00001100

.byte %00000000 ; 0E50 00 loop up 2
.byte %00111000
.byte %01110000
.byte %00111000
.byte %00011100
.byte %00001101
.byte %00000010
.byte %00000100

.byte %00000000 ; 0E58 00 loop up 3
.byte %00110000
.byte %01100000
.byte %01111000
.byte %00111101
.byte %00001111
.byte %00000010
.byte %00000000

; flight tower image 8x8 parts

L0E60:
L0E60:
.byte %00001110 ; 0E60 0E
.byte %11111111
.byte %11111111
.byte %00111111
.byte %00101010
.byte %00101110
.byte %00101010
.byte %00101110

.byte %01110000 ; 0E68 70
.byte %11111111
.byte %11111111
.byte %11111100
.byte %01010100
.byte %01110100
.byte %01010100
.byte %01110100

.byte %01011101 ; 0E70 5D
.byte %01010101
.byte %01011101
.byte %01010101
.byte %01011101
.byte %01010101
.byte %01011101
.byte %01010101

L0E78:
.byte $03, $A3, $B3, $B2, $B0, $BA, $BB, $AB, $0B, $2B, $3B, $3A, $30, $32, $33, $23 ; 0E78 16 byte look-up

L0E88:
.byte $00, $00, $00, $00, $00, $00, $00, $00 ; 0E88 clear sprite

L0E90:
.byte $0C, $09, $06, $2B, $03 ; 0E90 parameter table

L0E95:
.byte $43, $33, $34, $44 ; 0E95 lookup table

L0E99:
dci L0FD0 ; 0E99 2A 0F D0 Jumps here after button 3 is pressed at prompt, set keypress data pointer
L0E9C:
li $8A ; 0E9C 20 8A
lr 0,A ; 0E9E 50 $8A in r0 (RED G)
lr Q,DC ; 0E9F 0E Load DC0 address in Q,backup address
pi prompt ; 0EA0 28 00 99 Jump to BIOS subroutine prompt + read buttons
lr DC,Q ; 0EA3 0F Restore address to DC again
lr A,4 ; 0EA4 44 Fetch collected button press
cm ; 0EA5 8D Compare memory and A by doing ((DC0))-A but only set flags, A is untouched. DC0 is increased
bnz L0ED3 ; 0EA6 94 2C If they're not the same, reboot the cartridge
lr H,DC ; 0EA8 11 Store current DC0 address in H this time (r10 and r11)
lr A,HU ; 0EA9 4A Load upper part of H in A
ci $10 ; 0EAA 25 10 Check if DC0 address rolled over from $0F to $10
bnz L0E9C ; 0EAC 94 EF If it didn't, repeat the above (press the button same as the data) until you do.
li $10 ; 0EAE 20 10 ***** DRAW SECRET MESSAGE *****
lr 1,A ; 0EB0 51 X coordinate $10 in r1
li $13 ; 0EB1 20 13
lr 2,A ; 0EB3 52 Y coordinate $13 in r2
dci L0ED6 ; 0EB4 2A 0E D6 Point data counter to graphics
lis 7 ; 0EB7 77
lr 4,A ; 0EB8 54 8 letters, amount in r4 (DONE BY )
L0EB9:
li $80 ; 0EB9 20 80
lr 0,A ; 0EBB 50 $80 in 0 - RED color
pi $067C ; 0EBC 28 06 7C Subroutine jump to BIOS drawchar...
ds 4 ; 0EBF 34
bnz L0EB9 ; 0EC0 94 F8 Loop if there's letters left
li $10 ; 0EC2 20 10
lr 1,A ; 0EC4 51 X coordinate $10
li $1A ; 0EC5 20 1A
lr 2,A ; 0EC7 52 Y coordinate $1A
lis $F ; 0EC8 7F
lr 4,A ; 0EC9 54 16 letters to write, loaded in r4 (MICHAEL K GLASS)
L0ECA:
li $40 ; 0ECA 20 40
lr 0,A ; 0ECC 50 Blue color set in r0
pi $067C ; 0ECD 28 06 7C Subroutine jump to BIOS drawchar...
ds 4 ; 0ED0 34 Decrease r4
bnz L0ECA ; 0ED1 94 F8 Repeat if not yet 0
L0ED3:
jmp L0802 ; 0ED3 29 08 02 Reboot cartridge

; Graphics data starts here 5x5 pixels, one row per byte.
L0ED6:
.byte %11100000 ; 0ED6 E0 ; D
.byte %10010000
.byte %10001000
.byte %10010000
.byte %11100000

.byte %11111000 ; 0EDB F8 ; O
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

.byte %10001000 ; 0EE0 88 ; N
.byte %11001000
.byte %10101000
.byte %10011000
.byte %10001000

.byte %11111000 ; 0EE5 F8 ; E
.byte %10000000
.byte %11100000
.byte %10000000
.byte %11111000

.byte %00000000 ; 0EEA 00 ; space
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

.byte %11110000 ; 0EEF F0 ; B
.byte %10001000
.byte %11110000
.byte %10001000
.byte %11110000

.byte %10001000 ; 0EF4 88 ; Y
.byte %01010000
.byte %00100000
.byte %00100000
.byte %00100000

.byte %10001000 ; 0EF9 88 ; M
.byte %11011000
.byte %10101000
.byte %10001000
.byte %10001000

.byte %11111000 ; 0EFE F8 ; I
.byte %00100000
.byte %00100000
.byte %00100000
.byte %11111000

.byte %11111000 ; 0F03 F8 ; C
.byte %10000000
.byte %10000000
.byte %10000000
.byte %11111000

.byte %10001000 ; 0F08 88 ; H
.byte %10001000
.byte %11111000
.byte %10001000
.byte %10001000

.byte %11111000 ; 0F0D F8 ; A
.byte %10001000
.byte %11111000
.byte %10001000
.byte %10001000

.byte %11111000 ; 0F12 F8 ; E
.byte %10000000
.byte %11100000
.byte %10000000
.byte %11111000

.byte %10000000 ; 0F17 80 ; L
.byte %10000000
.byte %10000000
.byte %10000000
.byte %11111000

.byte %00000000 ; 0F1C 00 ; space
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

.byte %10010000 ; 0F21 90 ; K
.byte %10100000
.byte %11000000
.byte %10100000
.byte %10010000

.byte %00000000 ; 0F26 00 ; space
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

.byte %11111000 ; 0F2B F8 ; G
.byte %10000000
.byte %10111000
.byte %10001000
.byte %11111000

.byte %10000000 ; 0F30 80 ; L
.byte %10000000
.byte %10000000
.byte %10000000
.byte %11110000

.byte %11111000 ; 0F35 F8 ; A
.byte %10001000
.byte %11111000
.byte %10001000
.byte %10001000

.byte %11111000 ; 0F3A F8 ; S
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

.byte %11111000 ; 0F3F F8 ; S
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

.byte %11111111 ; 0F44 FF ; filler
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0F49
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0F59
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0F69
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0F79
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0F89
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0F99
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0FA9
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0FB9
.byte $FF, $FF, $FF, $FF, $FF, $FF, $FF ; 0FC9

; Easter Egg keypresses needed after selecting the backdoor option with button 3
; $01 means button 1, $02 means button 2, $04 means button 3, $08 means button 4

L0FD0: .byte $04, $08, $04, $02, $08, $02, $01, $02, $08, $01, $04, $04, $02, $04, $01, $08 ; 0FD0
.byte $04, $02, $01, $08, $02, $04, $01, $08, $04, $02, $02, $01, $04, $02, $04, $08 ; 0FE0
.byte $02, $04, $04, $08, $01, $01, $01, $02, $02, $04, $04, $02, $08, $08, $08, $04 ; 0FF0

; Decodes to sequence: 343 242 124 133 231 432 142 314 322 132 342 334 111 223 324 443 (after first pressing button 3)

IF 0

Smart data report
=================
Mode:
enabled by -s or /s
Memory range: $0800-$0FFF
Code bytes: 1551
Data bytes: 497

DCI data roots from reachable code:
$0FD0 from $0E99
$0ED6 from $0EB4
$0DE0 from $0878
$0DE0 from $0886
$0DD7 from $0838
$0E60 from $084D
$0E88 from $0856
$0E90 from $08C2
$0E78 from $0C56
$0E88 from $091C
$0DE0 from $0913
$0E95 from $09F3
$0DE0 from $0AB6
$0DE0 from $0B07
$0E88 from $0B27
$0E88 from $0BC3
$0E88 from $0BCE

Data intervals emitted as .byte:
$08CC-$08D0 (5 bytes)
$0DD7-$0E98 (194 bytes)
$0ED6-$0FFF (298 bytes)

ENDIF

</pre>

Here's how the plane sprites at $0DE0 looks as well as the following tower parts: 
<div style="display: flex; align-items: flex-start; gap: 10px;">
<div>[[File:L0DE0_bitmap_8x128_scale16.png|100px]]</div>
<div>[[File:L0E60_bitmap_8x24_scale24.png|100px]]</div>
</div>

File:L0E60 bitmap 8x24 scale24.png

2026-08-05T18:07:38Z

E5frog:

File:L0DE0 bitmap 8x128 scale16.png

2026-08-05T18:03:00Z

E5frog:

Snippet:KStack

2026-08-04T22:44:31Z

E5frog:

<pre>
;===========================================================================
; KStack Functions
;===========================================================================
; the K stack implements a stack using the registers. it uses r63 as a stack
; pointer that holds the register number of the top of the stack, starting
; at r57 and working down. when called, K is pushed to the first two
; registers on the stack, and the pointer is increased.
;
; at startup, the stack pointer (r63) should be set to 62 ($3E)

;---------------------------------------------------------------------------
; KStack Push
;---------------------------------------------------------------------------
; pushes register K onto the stack using r63 as the stack pointer
; destroys ISAR

kstack.push:
; get the top of the stack
lisu 7
lisl 7 ; r63, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr D, A ; push high byte of K
lr A, Kl
lr S, A ; push low byte of K
; adjust the stack pointer
lr A, IS
ai $ff ; decrease ISAR
lisu 7
lisl 7
lr S, A ; store the adjusted stack pointer in r63

; return from the subroutine
pop

;---------------------------------------------------------------------------
; KStack Pop
;---------------------------------------------------------------------------
; pops register K from the stack using r63 as the stack pointer
; destroys ISAR

kstack.pop:
; retrieve K from the stack
lisu 7
lisl 7
lr A, S ; load the stack pointer into A
inc ; increment the pointer
lr IS, A ; and set the ISAR
lr A, I
lr Kl, A ; load lower byte of K
lr A, S
lr Ku, A ; load upper byte of K
; adjust the stack pointer
lr A, IS
lisu 7
lisl 7
lr S, A ; store the adjusted stack pointer in r63

; return from the subroutine
pop
</pre>

Snippet:KStack

2026-08-04T22:43:21Z

E5frog: Created page with "<pre> ;=========================================================================== ; KStack Functions ;========================================================================..."

<pre>
;===========================================================================
; KStack Functions
;===========================================================================
; the K stack implements a stack using the registers. it uses r63 as a stack
; pointer that holds the register number of the top of the stack, starting
; at r57 and working down. when called, K is pushed to the first two
; registers on the stack, and the pointer is increased.
;
; at startup, the stack pointer (r63) should be set to 62 ($3E)

;---------------------------------------------------------------------------
; KStack Push
;---------------------------------------------------------------------------
; pushes register K onto the stack using r63 as the stack pointer
; destroys ISAR

kstack.push:
; get the top of the stack
lisu 7
lisl 7 ; r63, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
ai $ff ; decrease ISAR
lr IS, A
lr A, Kl
lr S, A ; push low byte of K
; adjust the stack pointer
lr A, IS
ai $ff ; decrease ISAR
lisu 7
lisl 7
lr S, A ; store the adjusted stack pointer in r63

; return from the subroutine
pop

;---------------------------------------------------------------------------
; KStack Pop
;---------------------------------------------------------------------------
; pops register K from the stack using r63 as the stack pointer
; destroys ISAR

kstack.pop:
; retrieve K from the stack
lisu 7
lisl 7
lr A, S ; load the stack pointer into A
inc ; increment the pointer
lr IS, A ; and set the ISAR
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
inc ; increase ISAR
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust the stack pointer
lr A, IS
lisu 7
lisl 7
lr S, A ; store the adjusted stack pointer in r63

; return from the subroutine
pop
</pre>

Subroutines

2026-08-04T22:41:49Z

E5frog:

The F8 has no internal stack for the program counter, so you must be careful when calling subroutines. Using PI/POP only works for one level of subroutines, because the return address for the first PI opcode will be overwritten by subsequent PI opcodes. Here's a single-level example:

prog:
; ...code
pi sub ; Pushes address of next instruction to PC1
; address of sub is stored in PC0 (jump to subroutine)
; ...code continues

sub:
; ... often used code
pop ; Move return address from PC1 to PC0

To have 2 levels of subroutines, you can use the K register to save the first return address:

prog:
; ...do something...
pi sub1 ; Address of next instruction stored in PC1
; sub1 is stored in PC0 (jump to subroutine)
; ...do more...

sub1:
lr k,p ; Copy PC1 to K, original jump address to K
; ...do something...
pi sub2 ; Pushes address of next instruction to PC1
; sub1 is stored in PC0 (jump to subroutine)
; ...do more...
pk ; Store address of next instruction in PC1
; Copy value in K to PC0 (jump back to main)

sub2:
; ...do something...
pop ; Move return address from PC1 to PC0

That's as deep as the processor allows you to go without writing additional code to save return addresses. In the Channel F BIOS, there are routines which create a simulated [[stack]] for the K register. The routine at $0107 (known as PUSHK or CALL) can push K to the stack and the routine at $011E (known as POPK or RTRN) can pop K from the stack. For example:

prog:
; ...do something...
pi sub1
; ...do more...

sub1:
lr k,p
pi PUSHK
; ...do something...
pi sub2
; ...do more...
pi POPK
pk

sub2:
lr k,p
pi PUSHK
; ...do something...
pi sub3
; ...do more...
pi POPK
pk

sub3:
; ...do something...
pop

By using PUSHK/POPK, you can have more than 2 levels of subroutine calls. However, a lot of overhead is added to the code by manipulating the stack. When inside a pushk/popk subroutine it's still possible to use plain pi/pop as it only affects PC0 and PC1. Whenever calling a subroutine one level deep, it's best to use the PI/POP combination; for two levels of subroutines, it's best to use the second example above. If using the K register in a subroutine only simple PI/POP is usable to get there, not to destroy contents of K.

You can use the pushk ($0107) and popk ($011E) routines from BIOS or use these slightly faster versions:

<pre>
;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

; 26% faster than BIOS (6 cycles)
pushk:
lr A, IS ; backup ISAR in r7
lr 7,A
lisu 7 ; get the top of the stack
lisl 3 ; r59, stack pointer
lr A,S
lr IS, A ; load the referenced register
lr A,KU
lr I,A ; push high byte of K
lr A,KL
lr I,A ; push low byte of K
lr A,IS
lisu 7
lisl 3
lr S,A ; save the register number to the stack pointer
lr A,7 ; restore the ISAR
lr IS,A
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

; 18% faster than BIOS (4.5 cycles)
popk:
lr A,IS ; backup ISAR in r7
lr 7,A
lisu 7 ; r59, stack pointer
lisl 3
lr A,S ; A = stack pointer, points to next free
ai $ff ; A = last pushed byte, KL
lr IS,A ; ISAR -> KL
lr A,D ; read KL, then ISAR -> KU
lr KL,A
lr A,S ; read KU
lr KU,A
lr A,IS ; ISAR now points to new stack pointer
lisu 7
lisl 3
lr S,A ; store new stack pointer in r59
lr A,7 ; restore original ISAR
lr IS,A
pop

;===================;
</pre>

Also consider using macros- you have a lot more code space than the original Channel F programmers, so you might as well use it; the time you save can be considerable.

Blackbird is writing more efficient versions of PUSHK/POPK ([[Snippet:KStack]]). Another idea is to write a version that uses the Schach RAM at $2800 that MESS emulates. That would free up more scratchpad registers and possibly also be quicker.

Here's a trick from the [https://www.channelf.se/files/channelf/F8_Guide_to_Programming.pdf Guide]: if a subroutine will be called frequently, it's quicker to load its address into the K register and call it using PK than to use PI multiple times. You'll use 4.5 cycles instead of 6.5 cycles to do the same thing.

It's also possible to change the Program Counter (PC0) with "lr P,Q" but there's no opcode for the other direction, address could be copied from A to Q in two steps or K to Q in four steps via Accumulator one byte at the time.

=== See Also ===
* [https://www.channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming]

Subroutines

2026-08-04T22:38:12Z

E5frog:

The F8 has no internal stack for the program counter, so you must be careful when calling subroutines. Using PI/POP only works for one level of subroutines, because the return address for the first PI opcode will be overwritten by subsequent PI opcodes. Here's a single-level example:

prog:
; ...code
pi sub ; Pushes address of next instruction to PC1
; address of sub is stored in PC0 (jump to subroutine)
; ...code continues

sub:
; ... often used code
pop ; Move return address from PC1 to PC0

To have 2 levels of subroutines, you can use the K register to save the first return address:

prog:
; ...do something...
pi sub1 ; Address of next instruction stored in PC1
; sub1 is stored in PC0 (jump to subroutine)
; ...do more...

sub1:
lr k,p ; Copy PC1 to K, original jump address to K
; ...do something...
pi sub2 ; Pushes address of next instruction to PC1
; sub1 is stored in PC0 (jump to subroutine)
; ...do more...
pk ; Store address of next instruction in PC1
; Copy value in K to PC0 (jump back to main)

sub2:
; ...do something...
pop ; Move return address from PC1 to PC0

That's as deep as the processor allows you to go without writing additional code to save return addresses. In the Channel F BIOS, there are routines which create a simulated [[stack]] for the K register. The routine at $0107 (known as PUSHK or CALL) can push K to the stack and the routine at $011E (known as POPK or RTRN) can pop K from the stack. For example:

prog:
; ...do something...
pi sub1
; ...do more...

sub1:
lr k,p
pi PUSHK
; ...do something...
pi sub2
; ...do more...
pi POPK
pk

sub2:
lr k,p
pi PUSHK
; ...do something...
pi sub3
; ...do more...
pi POPK
pk

sub3:
; ...do something...
pop

By using PUSHK/POPK, you can have more than 2 levels of subroutine calls. However, a lot of overhead is added to the code by manipulating the stack. When inside a pushk/popk subroutine it's still possible to use plain pi/pop as it only affects PC0 and PC1. Whenever calling a subroutine one level deep, it's best to use the PI/POP combination; for two levels of subroutines, it's best to use the second example above. If using the K register in a subroutine only simple PI/POP is usable to get there, not to destroy contents of K.

You can use the pushk and popk routines in [BIOS or use these slightly faster versions

<pre>
;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

; 26% faster than BIOS (6 cycles)
pushk:
lr A, IS ; backup ISAR in r7
lr 7,A
lisu 7 ; get the top of the stack
lisl 3 ; r59, stack pointer
lr A,S
lr IS, A ; load the referenced register
lr A,KU
lr I,A ; push high byte of K
lr A,KL
lr I,A ; push low byte of K
lr A,IS
lisu 7
lisl 3
lr S,A ; save the register number to the stack pointer
lr A,7 ; restore the ISAR
lr IS,A
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

; 18% faster than BIOS (4.5 cycles)
popk:
lr A,IS ; backup ISAR in r7
lr 7,A
lisu 7 ; r59, stack pointer
lisl 3
lr A,S ; A = stack pointer, points to next free
ai $ff ; A = last pushed byte, KL
lr IS,A ; ISAR -> KL
lr A,D ; read KL, then ISAR -> KU
lr KL,A
lr A,S ; read KU
lr KU,A
lr A,IS ; ISAR now points to new stack pointer
lisu 7
lisl 3
lr S,A ; store new stack pointer in r59
lr A,7 ; restore original ISAR
lr IS,A
pop

;===================;
</pre>

Also consider using macros- you have a lot more code space than the original Channel F programmers, so you might as well use it; the time you save can be considerable.

Blackbird is writing more efficient versions of PUSHK/POPK ([[Snippet:KStack]]). Another idea is to write a version that uses the Schach RAM at $2800 that MESS emulates. That would free up more scratchpad registers and possibly also be quicker.

Here's a trick from the [https://www.channelf.se/files/channelf/F8_Guide_to_Programming.pdf Guide]: if a subroutine will be called frequently, it's quicker to load its address into the K register and call it using PK than to use PI multiple times. You'll use 4.5 cycles instead of 6.5 cycles to do the same thing.

It's also possible to change the Program Counter (PC0) with "lr P,Q" but there's no opcode for the other direction, address could be copied from A to Q in two steps or K to Q in four steps via Accumulator one byte at the time.

=== See Also ===
* [https://www.channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming]

Disassembly:Democart 2

2026-08-04T22:34:28Z

E5frog:

This is a disassembly of the [[Channel F]] [[Democart 2]]. Original code is copyright © 1977 Fairchild Semiconductor.

<pre>
; -----------------------------------------------------------------------------
; Annotated and formatted Democart 2 disassembly.
; -----------------------------------------------------------------------------
processor f8
org $0800

reset equ $0000
delay equ $008F
clrscrn equ $00D0
pushk equ $0107
popk equ $011E
drawchar equ $0679
drawchar_entry equ $067C
b_drawchar_bmp_entry equ $068A
b_score_left equ $02AC
b_score_right equ $02B5

cartridge_start:
.byte $55, $2B

; -----------------------------------------------------------------------------
; Main Democart 2 script. Shows multiple demo screens, uses BIOS text and
; graphics routines, then returns to BIOS reset.
; -----------------------------------------------------------------------------

cartridge_entry:
lisu 3 ; 0802 63
lisl 7 ; 0803 6F
lis 1 ; 0804 71
lr S,A ; 0805 5C - store A in selected scratchpad register
pi $0135 ; 0806 28 01 35
dci L0BC6 ; 0809 2A 0B C6 - load DC with data/code pointer
pi draw_stream ; 080C 28 0B A3
lisu 3 ; 080F 63
lisl 7 ; 0810 6F
lis 3 ; 0811 73
lr S,A ; 0812 5C - store A in selected scratchpad register
pi $0135 ; 0813 28 01 35
dci L0BCF ; 0816 2A 0B CF - load DC with data/code pointer
pi draw_stream ; 0819 28 0B A3
lis 6 ; 081C 76
lr 3,A ; 081D 53
pi clear_screen_o37_0 ; 081E 28 0F EA
li $26 ; 0821 20 26
lr 1,A ; 0823 51
li $14 ; 0824 20 14
lr 2,A ; 0826 52
li $28 ; 0827 20 28
lr 3,A ; 0829 53
pi draw_entity_wrapper ; 082A 28 0B 76
li $26 ; 082D 20 26
lr 1,A ; 082F 51
li $21 ; 0830 20 21
lr 2,A ; 0832 52
li $28 ; 0833 20 28
lr 3,A ; 0835 53
pi draw_entity_wrapper ; 0836 28 0B 76
li $33 ; 0839 20 33
lr 1,A ; 083B 51
pi draw_three_markers ; 083C 28 0B 7D
li $41 ; 083F 20 41
lr 1,A ; 0841 51
pi draw_three_markers ; 0842 28 0B 7D
dci L0BD8 ; 0845 2A 0B D8 - load DC with data/code pointer
pi draw_stream ; 0848 28 0B A3
clr ; 084B 70
lr 3,A ; 084C 53
pi clear_screen_o37_1 ; 084D 28 0F ED
li $14 ; 0850 20 14
lr 1,A ; 0852 51
lis 6 ; 0853 76
lr 2,A ; 0854 52
pi $020E ; 0855 28 02 0E
li $14 ; 0858 20 14
lr 1,A ; 085A 51
li $2E ; 085B 20 2E
lr 2,A ; 085D 52
pi $020E ; 085E 28 02 0E
li $12 ; 0861 20 12
lr 1,A ; 0863 51
lr 2,A ; 0864 52
li $58 ; 0865 20 58
lr 0,A ; 0867 50
pi drawchar ; 0868 28 06 79 - BIOS draw character routine
dci L0BE6 ; 086B 2A 0B E6 - load DC with data/code pointer
pi draw_stream ; 086E 28 0B A3
lis 6 ; 0871 76
lr 3,A ; 0872 53
pi clear_screen_o37_0 ; 0873 28 0F EA
lis 6 ; 0876 76
lr $A,A ; 0877 5A
dci L0C98 ; 0878 2A 0C 98 - load DC with data/code pointer
li $20 ; 087B 20 20
lr 1,A ; 087D 51
lr 2,A ; 087E 52
L087F:
li $80 ; 087F 20 80
lr 0,A ; 0881 50
pi b_drawchar_bmp_wrapper ; 0882 28 0F CD
lis 2 ; 0885 72
as 1 ; 0886 C1
lr 1,A ; 0887 51
ds $A ; 0888 3A
bnz L087F ; 0889 94 F5
pi short_delay ; 088B 28 0B 96
lis 6 ; 088E 76
lr 3,A ; 088F 53
pi clear_screen_o37_0 ; 0890 28 0F EA
li $18 ; 0893 20 18
lr 2,A ; 0895 52
li $30 ; 0896 20 30
lr 1,A ; 0898 51
dci L0CC8 ; 0899 2A 0C C8 - load DC with data/code pointer
li $80 ; 089C 20 80
lr 0,A ; 089E 50
pi b_drawchar_bmp_wrapper ; 089F 28 0F CD
lis 2 ; 08A2 72
as 1 ; 08A3 C1
lr 1,A ; 08A4 51
li $80 ; 08A5 20 80
lr 0,A ; 08A7 50
dci L0CC8 ; 08A8 2A 0C C8 - load DC with data/code pointer
pi b_drawchar_bmp_wrapper ; 08AB 28 0F CD
li $30 ; 08AE 20 30
lr 1,A ; 08B0 51
li $20 ; 08B1 20 20
lr 2,A ; 08B3 52
li $80 ; 08B4 20 80
lr 0,A ; 08B6 50
dci L0CC8 ; 08B7 2A 0C C8 - load DC with data/code pointer
pi b_drawchar_bmp_wrapper ; 08BA 28 0F CD
lis 2 ; 08BD 72
as 1 ; 08BE C1
lr 1,A ; 08BF 51
li $80 ; 08C0 20 80
lr 0,A ; 08C2 50
dci L0CC8 ; 08C3 2A 0C C8 - load DC with data/code pointer
pi b_drawchar_bmp_wrapper ; 08C6 28 0F CD
dci L0CD0 ; 08C9 2A 0C D0 - load DC with data/code pointer
pi draw_stream ; 08CC 28 0B A3
lis 6 ; 08CF 76
lr 3,A ; 08D0 53
pi clear_screen_o37_1 ; 08D1 28 0F ED
li $13 ; 08D4 20 13
lr 1,A ; 08D6 51
lis 6 ; 08D7 76
lr 2,A ; 08D8 52
pi $020E ; 08D9 28 02 0E
li $13 ; 08DC 20 13
lr 1,A ; 08DE 51
li $2F ; 08DF 20 2F
lr 2,A ; 08E1 52
pi $020E ; 08E2 28 02 0E
li $11 ; 08E5 20 11
lr 1,A ; 08E7 51
lis 9 ; 08E8 79
lr 2,A ; 08E9 52
li $24 ; 08EA 20 24
lr 3,A ; 08EC 53
pi bios_draw_a01fc_wrapper ; 08ED 28 0F C6
li $5A ; 08F0 20 5A
lr 1,A ; 08F2 51
lis 9 ; 08F3 79
lr 2,A ; 08F4 52
li $24 ; 08F5 20 24
lr 3,A ; 08F7 53
pi bios_draw_a01fc_wrapper ; 08F8 28 0F C6
lis 9 ; 08FB 79
lr 4,A ; 08FC 54
dci L0C00 ; 08FD 2A 0C 00 - load DC with data/code pointer
L0900:
lm ; 0900 16 - load byte from DC and increment DC
lr 1,A ; 0901 51
lm ; 0902 16 - load byte from DC and increment DC
lr 2,A ; 0903 52
lm ; 0904 16 - load byte from DC and increment DC
lr 0,A ; 0905 50
xdc ; 0906 2C - exchange DC and H pointers
dci $0C1B ; 0907 2A 0C 1B - load DC with data/code pointer
pi drawchar_entry ; 090A 28 06 7C
xdc ; 090D 2C - exchange DC and H pointers
ds 4 ; 090E 34
bnz L0900 ; 090F 94 F0
pi bios_score_prompt_wrapper ; 0911 28 0F D6
dci L0BF9 ; 0914 2A 0B F9 - load DC with data/code pointer
pi draw_stream ; 0917 28 0B A3
lis 6 ; 091A 76
lr 3,A ; 091B 53
pi clear_screen_o37_0 ; 091C 28 0F EA
clr ; 091F 70
lr 2,A ; 0920 52
lr 0,A ; 0921 50
lis $D ; 0922 7D
lr $A,A ; 0923 5A
L0924:
li $7E ; 0924 20 7E
lr 1,A ; 0926 51
pi drawchar ; 0927 28 06 79 - BIOS draw character routine
lr A,2 ; 092A 42
inc ; 092B 1F
lr 2,A ; 092C 52
ds $A ; 092D 3A
bnz L0924 ; 092E 94 F5
L0930:
lis 4 ; 0930 74
as 2 ; 0931 C2
lr 2,A ; 0932 52
lis 3 ; 0933 73
lr 1,A ; 0934 51
L0935:
li $C0 ; 0935 20 C0
lr 0,A ; 0937 50
dci $4000 ; 0938 2A 40 00 - load DC with data/code pointer
; Points data counter to unused area.
; Hardware holds the proper value.

pi drawchar_entry ; 093B 28 06 7C
ds 1 ; 093E 31
lr A,1 ; 093F 41
ci $77 ; 0940 25 77
bc L0935 ; 0942 82 F2
lr A,2 ; 0944 42
ci $28 ; 0945 25 28
bc L0930 ; 0947 82 E8
lis 3 ; 0949 73
lr $A,A ; 094A 5A
li $26 ; 094B 20 26
lr 2,A ; 094D 52
L094E:
lis 8 ; 094E 78
lr 1,A ; 094F 51
clr ; 0950 70
lr 0,A ; 0951 50
L0952:
pi drawchar ; 0952 28 06 79 - BIOS draw character routine
lis 2 ; 0955 72
as 2 ; 0956 C2
lr 2,A ; 0957 52
ds 1 ; 0958 31
ds $A ; 0959 3A
bnz L0952 ; 095A 94 F7
pi drawchar ; 095C 28 06 79 - BIOS draw character routine
lr A,2 ; 095F 42
inc ; 0960 1F
lr 2,A ; 0961 52
ds 1 ; 0962 31
pi drawchar ; 0963 28 06 79 - BIOS draw character routine
lr A,2 ; 0966 42
ci $31 ; 0967 25 31
bnc L0973 ; 0969 92 09
li $2B ; 096B 20 2B
lr 2,A ; 096D 52
lis 3 ; 096E 73
lr $A,A ; 096F 5A
jmp L094E ; 0970 29 09 4E - unconditional jump

L0973:
nop ; 0973 2B
clr ; 0974 70
lr 0,A ; 0975 50
li $2D ; 0976 20 2D
lr 2,A ; 0978 52
L0979:
li $53 ; 0979 20 53
lr 1,A ; 097B 51
pi drawchar ; 097C 28 06 79 - BIOS draw character routine
ds 1 ; 097F 31
ds 2 ; 0980 32
pi drawchar ; 0981 28 06 79 - BIOS draw character routine
lis 3 ; 0984 73
lr $A,A ; 0985 5A
L0986:
ds 2 ; 0986 32
ds 2 ; 0987 32
ds 1 ; 0988 31
pi drawchar ; 0989 28 06 79 - BIOS draw character routine
ds $A ; 098C 3A
bnz L0986 ; 098D 94 F8
lr A,2 ; 098F 42
ci $27 ; 0990 25 27
bnc L099A ; 0992 92 07
li $30 ; 0994 20 30
lr 2,A ; 0996 52
jmp L0979 ; 0997 29 09 79 - unconditional jump

L099A:
pi bios_score_prompt_wrapper ; 099A 28 0F D6
dci L0C76 ; 099D 2A 0C 76 - load DC with data/code pointer
li $69 ; 09A0 20 69
lr $A,A ; 09A2 5A
pi draw_stream ; 09A3 28 0B A3
pi draw_stream ; 09A6 28 0B A3
clr ; 09A9 70
lr $A,A ; 09AA 5A
pi draw_stream ; 09AB 28 0B A3
lis 3 ; 09AE 73
lr 3,A ; 09AF 53
pi clear_screen_o37_0 ; 09B0 28 0F EA
dci L0C34 ; 09B3 2A 0C 34 - load DC with data/code pointer
xdc ; 09B6 2C - exchange DC and H pointers
dci L0C67 ; 09B7 2A 0C 67 - load DC with data/code pointer
lis 5 ; 09BA 75
lr $A,A ; 09BB 5A
L09BC:
lm ; 09BC 16 - load byte from DC and increment DC
lr 1,A ; 09BD 51
lm ; 09BE 16 - load byte from DC and increment DC
lr 2,A ; 09BF 52
lm ; 09C0 16 - load byte from DC and increment DC
lr 0,A ; 09C1 50
xdc ; 09C2 2C - exchange DC and H pointers
pi b_drawchar_bmp_wrapper ; 09C3 28 0F CD
xdc ; 09C6 2C - exchange DC and H pointers
ds $A ; 09C7 3A
bnz L09BC ; 09C8 94 F3
dci L0C5C ; 09CA 2A 0C 5C - load DC with data/code pointer
pi draw_stream ; 09CD 28 0B A3
lis 3 ; 09D0 73
lr 3,A ; 09D1 53
pi clear_screen_o37_1 ; 09D2 28 0F ED
pi bios_score_prompt_wrapper ; 09D5 28 0F D6
lis 9 ; 09D8 79
lr $A,A ; 09D9 5A
dci L0CDE ; 09DA 2A 0C DE - load DC with data/code pointer
L09DD:
lm ; 09DD 16 - load byte from DC and increment DC
lr 1,A ; 09DE 51
lm ; 09DF 16 - load byte from DC and increment DC
lr 2,A ; 09E0 52
lm ; 09E1 16 - load byte from DC and increment DC
lr 0,A ; 09E2 50
xdc ; 09E3 2C - exchange DC and H pointers
dci $0CF9 ; 09E4 2A 0C F9 - load DC with data/code pointer
pi drawchar_entry ; 09E7 28 06 7C
xdc ; 09EA 2C - exchange DC and H pointers
ds $A ; 09EB 3A
bnz L09DD ; 09EC 94 F0
dci $0D08 ; 09EE 2A 0D 08 - load DC with data/code pointer
pi draw_stream ; 09F1 28 0B A3
lis 3 ; 09F4 73
lr 3,A ; 09F5 53
pi clear_screen_o37_1 ; 09F6 28 0F ED
pi bios_score_prompt_wrapper ; 09F9 28 0F D6
li $10 ; 09FC 20 10
lr 1,A ; 09FE 51
li $1A ; 09FF 20 1A
lr 2,A ; 0A01 52
li $10 ; 0A02 20 10
lr 3,A ; 0A04 53
pi draw_entity_wrapper ; 0A05 28 0B 76
lis 2 ; 0A08 72
lr $A,A ; 0A09 5A
L0A0A:
lis $F ; 0A0A 7F
lr 3,A ; 0A0B 53
lis $F ; 0A0C 7F
as 1 ; 0A0D C1
lr 1,A ; 0A0E 51
pi draw_entity_wrapper ; 0A0F 28 0B 76
ds $A ; 0A12 3A
bnz L0A0A ; 0A13 94 F6
li $69 ; 0A15 20 69
lr $A,A ; 0A17 5A
dci L0D14 ; 0A18 2A 0D 14 - load DC with data/code pointer
pi draw_stream ; 0A1B 28 0B A3
pi draw_stream ; 0A1E 28 0B A3
pi draw_stream ; 0A21 28 0B A3
li $30 ; 0A24 20 30
lr 1,A ; 0A26 51
li $28 ; 0A27 20 28
lr 2,A ; 0A29 52
li $10 ; 0A2A 20 10
lr 3,A ; 0A2C 53
pi draw_entity_wrapper ; 0A2D 28 0B 76
lis 6 ; 0A30 76
lr $A,A ; 0A31 5A
dci L0D44 ; 0A32 2A 0D 44 - load DC with data/code pointer
L0A35:
lm ; 0A35 16 - load byte from DC and increment DC
lr 1,A ; 0A36 51
lm ; 0A37 16 - load byte from DC and increment DC
lr 2,A ; 0A38 52
lm ; 0A39 16 - load byte from DC and increment DC
lr 0,A ; 0A3A 50
xdc ; 0A3B 2C - exchange DC and H pointers
pi drawchar ; 0A3C 28 06 79 - BIOS draw character routine
xdc ; 0A3F 2C - exchange DC and H pointers
ds $A ; 0A40 3A
bnz L0A35 ; 0A41 94 F3
dci L0D56 ; 0A43 2A 0D 56 - load DC with data/code pointer
clr ; 0A46 70
lr $A,A ; 0A47 5A
pi draw_stream ; 0A48 28 0B A3
lis 6 ; 0A4B 76
lr 3,A ; 0A4C 53
pi clear_screen_o37_1 ; 0A4D 28 0F ED
pi bios_score_prompt_wrapper ; 0A50 28 0F D6
dci L0D61 ; 0A53 2A 0D 61 - load DC with data/code pointer
li $69 ; 0A56 20 69
lr $A,A ; 0A58 5A
pi draw_stream ; 0A59 28 0B A3
pi draw_stream ; 0A5C 28 0B A3
pi draw_stream ; 0A5F 28 0B A3
clr ; 0A62 70
lr $A,A ; 0A63 5A
pi draw_stream ; 0A64 28 0B A3
lis 6 ; 0A67 76
lr 3,A ; 0A68 53
pi clear_screen_o37_1 ; 0A69 28 0F ED
pi bios_score_prompt_wrapper ; 0A6C 28 0F D6
dci L0D79 ; 0A6F 2A 0D 79 - load DC with data/code pointer
lis 6 ; 0A72 76
lr $A,A ; 0A73 5A
L0A74:
lm ; 0A74 16 - load byte from DC and increment DC
lr 1,A ; 0A75 51
lm ; 0A76 16 - load byte from DC and increment DC
lr 2,A ; 0A77 52
lm ; 0A78 16 - load byte from DC and increment DC
lr 0,A ; 0A79 50
xdc ; 0A7A 2C - exchange DC and H pointers
dci L0D8B ; 0A7B 2A 0D 8B - load DC with data/code pointer
pi b_drawchar_bmp_wrapper ; 0A7E 28 0F CD
xdc ; 0A81 2C - exchange DC and H pointers
ds $A ; 0A82 3A
bnz L0A74 ; 0A83 94 F0
dci $0D99 ; 0A85 2A 0D 99 - load DC with data/code pointer
xdc ; 0A88 2C - exchange DC and H pointers
dci L0DA8 ; 0A89 2A 0D A8 - load DC with data/code pointer
lis 3 ; 0A8C 73
lr $A,A ; 0A8D 5A
L0A8E:
lm ; 0A8E 16 - load byte from DC and increment DC
lr 1,A ; 0A8F 51
lm ; 0A90 16 - load byte from DC and increment DC
lr 2,A ; 0A91 52
lm ; 0A92 16 - load byte from DC and increment DC
lr 0,A ; 0A93 50
xdc ; 0A94 2C - exchange DC and H pointers
pi drawchar_entry ; 0A95 28 06 7C
xdc ; 0A98 2C - exchange DC and H pointers
ds $A ; 0A99 3A
bnz L0A8E ; 0A9A 94 F3
dci L0D93 ; 0A9C 2A 0D 93 - load DC with data/code pointer
pi draw_stream ; 0A9F 28 0B A3
lis 6 ; 0AA2 76
lr 3,A ; 0AA3 53
pi clear_screen_o37_0 ; 0AA4 28 0F EA
dci L0DB1 ; 0AA7 2A 0D B1 - load DC with data/code pointer
lis 2 ; 0AAA 72
lr $A,A ; 0AAB 5A
L0AAC:
lm ; 0AAC 16 - load byte from DC and increment DC
lr 1,A ; 0AAD 51
lm ; 0AAE 16 - load byte from DC and increment DC
lr 2,A ; 0AAF 52
lm ; 0AB0 16 - load byte from DC and increment DC
lr 0,A ; 0AB1 50
xdc ; 0AB2 2C - exchange DC and H pointers
dci $0F58 ; 0AB3 2A 0F 58 - load DC with data/code pointer
pi drawchar_entry ; 0AB6 28 06 7C
xdc ; 0AB9 2C - exchange DC and H pointers
ds $A ; 0ABA 3A
bnz L0AAC ; 0ABB 94 F0
lis 4 ; 0ABD 74
lr $A,A ; 0ABE 5A
li $10 ; 0ABF 20 10
lr 2,A ; 0AC1 52
L0AC2:
li $17 ; 0AC2 20 17
lr 1,A ; 0AC4 51
li $81 ; 0AC5 20 81
lr 0,A ; 0AC7 50
pi drawchar ; 0AC8 28 06 79 - BIOS draw character routine
lis 5 ; 0ACB 75
as 2 ; 0ACC C2
lr 2,A ; 0ACD 52
ci $27 ; 0ACE 25 27
bc L0AC2 ; 0AD0 82 F1
li $1A ; 0AD2 20 1A
lr 1,A ; 0AD4 51
li $1A ; 0AD5 20 1A
lr 2,A ; 0AD7 52
dci L0DC3 ; 0AD8 2A 0D C3 - load DC with data/code pointer
lis 6 ; 0ADB 76
lr $A,A ; 0ADC 5A
L0ADD:
lm ; 0ADD 16 - load byte from DC and increment DC
lr 0,A ; 0ADE 50
xdc ; 0ADF 2C - exchange DC and H pointers
dci L0DC9 ; 0AE0 2A 0D C9 - load DC with data/code pointer
pi drawchar_entry ; 0AE3 28 06 7C
ds 1 ; 0AE6 31
ds 1 ; 0AE7 31
xdc ; 0AE8 2C - exchange DC and H pointers
ds $A ; 0AE9 3A
bnz L0ADD ; 0AEA 94 F2
li $2C ; 0AEC 20 2C
lr 2,A ; 0AEE 52
li $12 ; 0AEF 20 12
lr 1,A ; 0AF1 51
li $80 ; 0AF2 20 80
lr 0,A ; 0AF4 50
dci L0DCE ; 0AF5 2A 0D CE - load DC with data/code pointer
pi b_drawchar_bmp_wrapper ; 0AF8 28 0F CD
li $43 ; 0AFB 20 43
lr 1,A ; 0AFD 51
li $40 ; 0AFE 20 40
lr 0,A ; 0B00 50
dci L0DCE ; 0B01 2A 0D CE - load DC with data/code pointer
pi b_drawchar_bmp_wrapper ; 0B04 28 0F CD
pi bios_score_prompt_wrapper ; 0B07 28 0F D6
dci L0DB7 ; 0B0A 2A 0D B7 - load DC with data/code pointer
pi draw_stream ; 0B0D 28 0B A3
lis 6 ; 0B10 76
lr 3,A ; 0B11 53
pi clear_screen_o37_0 ; 0B12 28 0F EA
dci L0DD6 ; 0B15 2A 0D D6 - load DC with data/code pointer
lis 8 ; 0B18 78
lr 2,A ; 0B19 52
L0B1A:
lis $F ; 0B1A 7F
L0B1B:
lr 1,A ; 0B1B 51
li $C0 ; 0B1C 20 C0
lr 0,A ; 0B1E 50
lm ; 0B1F 16 - load byte from DC and increment DC
xdc ; 0B20 2C - exchange DC and H pointers
lr $A,A ; 0B21 5A
sr 4 ; 0B22 14
sl 4 ; 0B23 15
sr 1 ; 0B24 12
lr $B,A ; 0B25 5B
lr A,$A ; 0B26 4A
sl 4 ; 0B27 15
sr 1 ; 0B28 12
lr $A,A ; 0B29 5A
dci L0E26 ; 0B2A 2A 0E 26 - load DC with data/code pointer
lr A,$B ; 0B2D 4B
adc ; 0B2E 8E
pi b_drawchar_bmp_wrapper ; 0B2F 28 0F CD
ds 1 ; 0B32 31
dci L0E26 ; 0B33 2A 0E 26 - load DC with data/code pointer
lr A,$A ; 0B36 4A
adc ; 0B37 8E
li $C0 ; 0B38 20 C0
lr 0,A ; 0B3A 50
pi b_drawchar_bmp_wrapper ; 0B3B 28 0F CD
xdc ; 0B3E 2C - exchange DC and H pointers
ds 1 ; 0B3F 31
lr A,1 ; 0B40 41
ci $5A ; 0B41 25 5A
bc L0B1B ; 0B43 82 D7
lis 4 ; 0B45 74
as 2 ; 0B46 C2
lr 2,A ; 0B47 52
ci $2F ; 0B48 25 2F
bc L0B1A ; 0B4A 82 CF
dci L0E96 ; 0B4C 2A 0E 96 - load DC with data/code pointer
pi draw_stream ; 0B4F 28 0B A3
lis 6 ; 0B52 76
lr 3,A ; 0B53 53
pi clear_screen_o37_0 ; 0B54 28 0F EA
L0B57:
dci L0E9D ; 0B57 2A 0E 9D - load DC with data/code pointer
lis $C ; 0B5A 7C
L0B5B:
lr $A,A ; 0B5B 5A
L0B5C:
lm ; 0B5C 16 - load byte from DC and increment DC
lr 1,A ; 0B5D 51
lm ; 0B5E 16 - load byte from DC and increment DC
lr 2,A ; 0B5F 52
lm ; 0B60 16 - load byte from DC and increment DC
lr 0,A ; 0B61 50
xdc ; 0B62 2C - exchange DC and H pointers
dci L0EC1 ; 0B63 2A 0E C1 - load DC with data/code pointer
pi drawchar_entry ; 0B66 28 06 7C
xdc ; 0B69 2C - exchange DC and H pointers
ds $A ; 0B6A 3A
bnz L0B5C ; 0B6B 94 F0
dci L0EE4 ; 0B6D 2A 0E E4 - load DC with data/code pointer
pi draw_stream ; 0B70 28 0B A3
jmp reset ; 0B73 29 00 00 - unconditional jump

; -----------------------------------------------------------------------------
; Wrapper around BIOS draw routine at $0215. Saves K, then tail-jumps into BIOS
; code.
; -----------------------------------------------------------------------------
draw_entity_wrapper:
lr K,P ; 0B76 08
pi pushk ; 0B77 28 01 07 - bios pushk - save return address on BIOS K-stack
jmp $0215 ; 0B7A 29 02 15 - bios, calls draw char - unconditional jump

; -----------------------------------------------------------------------------
; Draws three repeated BIOS objects at fixed Y positions $0A, $17 and $24 using
; BIOS routine $01F6.
; -----------------------------------------------------------------------------
draw_three_markers:
lr K,P ; 0B7D 08
pi pushk ; 0B7E 28 01 07 - bios pushk - save return address on BIOS K-stack
lis $A ; 0B81 7A
lr 2,A ; 0B82 52
pi $01F6 ; 0B83 28 01 F6
li $17 ; 0B86 20 17
lr 2,A ; 0B88 52
pi $01F6 ; 0B89 28 01 F6
li $24 ; 0B8C 20 24
lr 2,A ; 0B8E 52
pi $01F6 ; 0B8F 28 01 F6
pi popk ; 0B92 28 01 1E - restore return address from BIOS K-stack
pk ; 0B95 0C - return via K/P after BIOS K-stack restore

; -----------------------------------------------------------------------------
; Short delay helper. Uses r0 as outer counter and r5 as BIOS delay parameter.
; -----------------------------------------------------------------------------
short_delay:
lr K,P ; 0B96 08
lis 3 ; 0B97 73
lr 0,A ; 0B98 50
lis $F ; 0B99 7F
lr 5,A ; 0B9A 55
short_delay_loop:
pi delay ; 0B9B 28 00 8F
ds 0 ; 0B9E 30
bnz short_delay_loop ; 0B9F 94 FB
lr P,K ; 0BA1 09
pop ; 0BA2 1C - return from subroutine

; -----------------------------------------------------------------------------
; Draws a compressed or data-driven text/object stream. DC points at stream
; header: count, Y, X, then character/object bytes.
; -----------------------------------------------------------------------------
draw_stream:
lr K,P ; 0BA3 08
pi pushk ; 0BA4 28 01 07 - bios pushk - save return address on BIOS K-stack
lm ; 0BA7 16 - load byte from DC and increment DC
lr 3,A ; 0BA8 53
lm ; 0BA9 16 - load byte from DC and increment DC
lr 2,A ; 0BAA 52
lm ; 0BAB 16 - load byte from DC and increment DC
lr 1,A ; 0BAC 51

; -----------------------------------------------------------------------------
; Inner stream loop. Loads one stream item from DC and draws through BIOS
; drawchar entry with alternate glyph/data pointer.
; -----------------------------------------------------------------------------
draw_stream_next:
lm ; 0BAD 16 - load byte from DC and increment DC
lr 0,A ; 0BAE 50
xdc ; 0BAF 2C - exchange DC and H pointers
dci L0EEF ; 0BB0 2A 0E EF - load DC with data/code pointer

; -----------------------------------------------------------------------------
; Calls BIOS drawchar entry for one stream item, advances, and repeats until
; count expires.
; -----------------------------------------------------------------------------
draw_stream_call:
pi drawchar_entry ; 0BB3 28 06 7C
xdc ; 0BB6 2C - exchange DC and H pointers
ds 3 ; 0BB7 33
bnz draw_stream_next ; 0BB8 94 F4
lr A,$A ; 0BBA 4A
ci $69 ; 0BBB 25 69
bz draw_stream_done ; 0BBD 84 04
pi short_delay ; 0BBF 28 0B 96

; -----------------------------------------------------------------------------
; Restores return address from BIOS K-stack and returns from stream drawing
; routine.
; -----------------------------------------------------------------------------
draw_stream_done:
pi popk ; 0BC2 28 01 1E - restore return address from BIOS K-stack
pk ; 0BC5 0C - return via K/P after BIOS K-stack restore

L0BC6:
lr QU,A ; 0BC6 06
sl 1 ; 0BC7 13
out $91 ; 0BC8 27 91
bf 9,L0B57 ; 0BCA 99 8C
bnz L0B5B ; 0BCC 94 8E
db $A3 ; 0BCE A3
L0BCF:
lr QU,A ; 0BCF 06
oi $26 ; 0BD0 22 26
lr D,A ; 0BD2 5E - store A and decrement ISAR
lr A,D ; 0BD3 4E - read selected scratchpad register and decrement ISAR
lr 8,A ; 0BD4 58
lr 8,A ; 0BD5 58
lr 2,A ; 0BD6 52
lr I,A ; 0BD7 5D - store A and increment ISAR
L0BD8:
lr IS,A ; 0BD8 0B
ds 1 ; 0BD9 31
di ; 0BDA 1A
bf $E, L0B6E ; 0BDB 9E 92
xm ; 0BDD 8C
lr A,KU ; 0BDE 00
lr D,A ; 0BDF 5E - store A and decrement ISAR
lr A,$A ; 0BE0 4A
lr A,S ; 0BE1 4C - read selected scratchpad register
lr A,KU ; 0BE2 00
asd D ; 0BE3 DE
asd 9 ; 0BE4 D9
as D ; 0BE5 CE
L0BE6:
lr DC,H ; 0BE6 10
li $0A ; 0BE7 20 0A
bf $D, L0B7B ; 0BE9 9D 91
bf 9, L0B85 ; 0BEB 99 99
bf $E, L0B80 ; 0BED 9E 92
bno L0B80 ; 0BEF 98 90
lr A,KU ; 0BF1 00
br draw_three_markers ; 0BF2 90 8A - unconditional jump

; -----------------------------------------------------------------------------
; data_tables
; Smart disassembly marks $0BF4-$0FC5 as data.
; -----------------------------------------------------------------------------

L0BF4:
.byte $96, $96, $8E, $9C, $A3 ; 0BF4
L0BF9:
.byte $04, $2B, $2D, $5E, $4A, $58, $54 ; 0BF9
L0C00:
.byte $2A, $10, $C0, $42, $10, $C0, $36, $1B ; 0C00
.byte $C0, $2A, $25, $C0, $42, $25, $C0, $19 ; 0C08
.byte $0D, $83, $52, $28, $84, $17, $0B, $C1 ; 0C10
.byte $54, $2A, $42 ; 0C18
L0C1B:
.byte $00, $20, $70, $20, $00, $20, $70, $E0 ; 0C1B
.byte $50, $08, $80, $50, $38, $70, $20, $08 ; 0C23
.byte $08, $08, $08, $F8, $F8, $80, $80, $80 ; 0C2B
.byte $80 ; 0C33
L0C34:
.byte $0E, $FF, $FF, $3F, $2A, $2E, $2A, $2E ; 0C34
.byte $70, $FF, $FF, $FC, $54, $74, $54, $74 ; 0C3C
.byte $5D, $55, $5D, $55, $5D, $55, $5D, $55 ; 0C44
.byte $00, $40, $60, $7D, $7F, $7D, $00, $00 ; 0C4C
.byte $00, $02, $06, $BE, $FE, $BE, $00, $00 ; 0C54
L0C5C:
.byte $08, $13, $1F, $9D, $9A, $92, $9E, $8F ; 0C5C
.byte $92, $9C, $8E ; 0C64
L0C67:
.byte $30, $2E, $C0, $33, $2E, $C0, $31, $33 ; 0C67
.byte $C0, $0B, $32, $80, $5C, $32, $40 ; 0C6F
L0C76:
.byte $0C, $0B, $17, $40, $45, $40, $40, $00 ; 0C76
.byte $00, $00, $00, $40, $45, $40, $40, $04 ; 0C7E
.byte $33, $2E, $4B, $4E, $5E, $66, $09, $1C ; 0C86
.byte $20, $4B, $56, $4A, $4C, $54, $53, $4A ; 0C8E
.byte $4C, $54 ; 0C96
L0C98:
.byte $F8, $84, $82, $81, $81, $81, $81, $FF ; 0C98
.byte $00, $00, $00, $1C, $23, $22, $22, $DC ; 0CA0
.byte $00, $00, $00, $78, $C7, $44, $44, $38 ; 0CA8
.byte $04, $04, $04, $04, $FC, $44, $44, $7F ; 0CB0
.byte $10, $28, $28, $28, $28, $28, $10, $EF ; 0CB8
.byte $00, $00, $00, $08, $14, $14, $08, $F6 ; 0CC0
L0CC8:
.byte $FF, $C3, $A5, $99, $99, $A5, $C3, $FF ; 0CC8
L0CD0:
.byte $0B, $30, $19, $8A, $DF, $5E, $99, $00 ; 0CD0
.byte $4D, $59, $D9, $CD, $56, $8E ; 0CD8
L0CDE:
.byte $1B, $10, $82, $50, $27, $82, $25, $0D ; 0CDE
.byte $C1, $3D, $10, $C1, $36, $1B, $C1, $2F ; 0CE6
.byte $25, $C1, $47, $28, $C1, $17, $0B, $C0 ; 0CEE
.byte $54, $2A, $40 ; 0CF6
L0CF9:
.byte $00, $20, $F8, $70, $00, $00, $50, $20 ; 0CF9
.byte $50, $00, $20, $70, $D8, $70, $20 ; 0D01
L0D08:
.byte $09, $16, $1D, $5D, $5A, $4A, $4C, $4E ; 0D08
.byte $00, $61, $4A, $5C ; 0D10
L0D14:
.byte $0D, $10, $13, $00, $42, $43, $00, $00 ; 0D14
.byte $00, $47, $42, $00, $00, $00, $41, $43 ; 0D1C
.byte $0D, $16, $13, $E9, $44, $42, $00, $00 ; 0D24
.byte $EA, $41, $43, $00, $00, $E2, $00, $43 ; 0D2C
.byte $0D, $1E, $13, $00, $46, $45, $00, $00 ; 0D34
.byte $00, $45, $49, $00, $00, $00, $43, $49 ; 0D3C
L0D44:
.byte $2E, $2B, $81, $28, $2C, $43, $35, $2C ; 0D44
.byte $46, $3B, $2C, $49, $35, $24, $42, $3B ; 0D4C
.byte $24, $43 ; 0D54
L0D56:
.byte $08, $09, $20, $97, $8A, $9E, $91, $9B ; 0D56
.byte $9F, $92, $A4 ; 0D5E
L0D61:
.byte $03, $27, $14, $40, $40, $40, $01, $2D ; 0D61
.byte $14, $6A, $02, $33, $33, $42, $40, $06 ; 0D69
.byte $11, $27, $CB, $CA, $D0, $CE, $D6, $DD ; 0D71
L0D79:
.byte $14, $19, $80, $1A, $19, $80, $30, $19 ; 0D79
.byte $40, $36, $19, $40, $4D, $19, $40, $53 ; 0D81
.byte $19, $40 ; 0D89
L0D8B:
.byte $FE, $FE, $FE, $FE, $FE, $FE, $FE, $00 ; 0D8B
L0D93:
.byte $03, $11, $2E, $98, $92, $97 ; 0D93
L0D99:
.byte $D8, $D8, $D8, $D8, $D8, $00, $70, $00 ; 0D99
.byte $70, $00, $00, $F0, $00, $7F, $00 ; 0DA1
L0DA8:
.byte $18, $1A, $80, $34, $1A, $40, $51, $1A ; 0DA8
.byte $40 ; 0DB0
L0DB1:
.byte $10, $10, $80, $10, $23, $40 ; 0DB1
L0DB7:
.byte $09, $08, $17, $CD, $DC, $CA, $D0, $00 ; 0DB7
.byte $DC, $CA, $CC, $CE ; 0DBF
L0DC3:
.byte $C0, $80, $40, $C0, $80, $40 ; 0DC3
L0DC9:
.byte $F0, $F0, $F0, $F0, $00 ; 0DC9
L0DCE:
.byte $FF, $FF, $00, $00, $00, $00, $00, $00 ; 0DCE
L0DD6:
.byte $45, $45, $45, $49, $C5, $4C, $54, $C5 ; 0DD6
.byte $C7, $63, $DD, $D7, $5D, $D1, $DD, $46 ; 0DDE
.byte $D4, $64, $67, $61, $DD, $DD, $DD, $D1 ; 0DE6
.byte $87, $57, $CC, $5D, $D7, $6D, $86, $76 ; 0DEE
.byte $D4, $6C, $CC, $67, $61, $4B, $64, $92 ; 0DF6
.byte $76, $0C, $C5, $14, $CB, $60, $C6, $75 ; 0DFE
.byte $05, $4C, $CB, $6D, $42, $54, $54, $5D ; 0E06
.byte $46, $75, $4C, $C6, $D4, $76, $76, $7B ; 0E0E
.byte $8C, $C6, $A4, $54, $67, $54, $54, $51 ; 0E16
.byte $7C, $C2, $76, $7B, $CC, $B6, $76, $76 ; 0E1E
L0E26:
.byte $FE, $FE, $C0, $C0, $FE, $FE, $00, $00 ; 0E26
.byte $FE, $FE, $C6, $C6, $C6, $C6, $00, $00 ; 0E2E
.byte $FE, $FE, $06, $06, $FE, $FE, $00, $00 ; 0E36
.byte $C6, $C6, $C6, $C6, $FE, $FE, $00, $00 ; 0E3E
.byte $FE, $FE, $C0, $C0, $C6, $C6, $00, $00 ; 0E46
.byte $FE, $FE, $06, $06, $C6, $C6, $00, $00 ; 0E4E
.byte $C6, $C6, $06, $06, $FE, $FE, $00, $00 ; 0E56
.byte $C6, $C6, $C0, $C0, $FE, $FE, $00, $00 ; 0E5E
.byte $C6, $C6, $C0, $C0, $C6, $C6, $00, $00 ; 0E66
.byte $FE, $FE, $00, $00, $C6, $C6, $00, $00 ; 0E6E
.byte $C6, $C6, $06, $06, $C6, $C6, $00, $00 ; 0E76
.byte $C6, $C6, $00, $00, $FE, $FE, $00, $00 ; 0E7E
.byte $FE, $FE, $00, $00, $FE, $FE, $00, $00 ; 0E86
.byte $C6, $C6, $C6, $C6, $C6, $C6, $00, $00 ; 0E8E
L0E96:
.byte $04, $33, $2B, $57, $4A, $64, $4E ; 0E96
L0E9D:
.byte $15, $1A, $40, $18, $0D, $40, $35, $0A ; 0E9D
.byte $40, $50, $0D, $40, $12, $22, $41, $37 ; 0EA5
.byte $14, $41, $58, $22, $41, $37, $1D, $42 ; 0EAD
.byte $35, $36, $43, $34, $31, $84, $36, $30 ; 0EB5
.byte $45, $2F, $30, $C6 ; 0EBD
L0EC1:
.byte $10, $38, $38, $28, $28, $10, $38, $38 ; 0EC1
.byte $28, $E8, $A0, $F0, $70, $50, $50, $20 ; 0EC9
.byte $70, $70, $D8, $00, $80, $80, $80, $80 ; 0ED1
.byte $80, $E0, $E0, $00, $00, $00, $20, $78 ; 0ED9
.byte $70, $50, $50 ; 0EE1
L0EE4:
.byte $08, $25, $20, $8B, $8A, $9D, $8E, $8B ; 0EE4
.byte $8A, $96, $96 ; 0EEC
L0EEF:
.byte $F8, $88, $88, $88, $F8, $20, $60, $20 ; 0EEF
.byte $20, $70, $F8, $08, $F8, $80, $F8, $F8 ; 0EF7
.byte $08, $38, $08, $F8, $88, $88, $F8, $08 ; 0EFF
.byte $08, $F8, $80, $F8, $08, $F8, $80, $80 ; 0F07
.byte $F8, $88, $F8, $F8, $08, $10, $10, $10 ; 0F0F
.byte $F8, $88, $F8, $88, $F8, $F8, $88, $F8 ; 0F17
.byte $08, $08, $F8, $88, $F8, $88, $88, $F8 ; 0F1F
.byte $48, $78, $48, $F8, $F8, $80, $80, $80 ; 0F27
.byte $F8, $F8, $48, $48, $48, $F8, $F8, $80 ; 0F2F
.byte $E0, $80, $F8, $F8, $80, $E0, $80, $80 ; 0F37
.byte $F8, $80, $98, $88, $F8, $88, $88, $F8 ; 0F3F
.byte $88, $88, $F8, $20, $20, $20, $F8, $F8 ; 0F47
.byte $20, $20, $A0, $E0, $90, $A0, $C0, $A0 ; 0F4F
.byte $90 ; 0F57
L0F58:
.byte $00, $C8, $FF, $C8, $00, $80, $80, $80 ; 0F58
.byte $80, $F8, $88, $D8, $A8, $88, $88, $88 ; 0F60
.byte $C8, $A8, $98, $88, $F8, $88, $88, $88 ; 0F68
.byte $F8, $F8, $88, $F8, $80, $80, $F8, $88 ; 0F70
.byte $88, $90, $E8, $F8, $88, $F8, $90, $88 ; 0F78
.byte $F8, $80, $F8, $08, $F8, $F8, $20, $20 ; 0F80
.byte $20, $20, $88, $88, $88, $88, $F8, $88 ; 0F88
.byte $88, $88, $50, $20, $88, $88, $A8, $D8 ; 0F90
.byte $88, $88, $50, $20, $50, $88, $88, $88 ; 0F98
.byte $F8, $20, $20, $F8, $10, $20, $40, $F8 ; 0FA0
.byte $00, $00, $00, $00, $00, $F8, $08, $38 ; 0FA8
.byte $00, $20, $00, $00, $00, $00, $40, $20 ; 0FB0
.byte $20, $20, $00, $20, $20, $20, $F8, $20 ; 0FB8
.byte $20, $00, $00, $F8, $00, $00 ; 0FC0

; -----------------------------------------------------------------------------
; lr A,KU ; 0fc5 00
; bios_draw_a01fc_wrapper
; Wrapper for BIOS routine $01FC. Used for a repeated object/sprite style draw.
; -----------------------------------------------------------------------------
bios_draw_a01fc_wrapper:
lr K,P ; 0FC6 08
pi pushk ; 0FC7 28 01 07 - bios pushk - save return address on BIOS K-stack
jmp $01FC ; 0FCA 29 01 FC - unconditional jump

; -----------------------------------------------------------------------------
; b_drawchar_bmp_wrapper
; Wrapper for BIOS drawchar bitmap entry. Sets r4=8 before tail-jumping into
; BIOS drawchar internals.
; -----------------------------------------------------------------------------
b_drawchar_bmp_wrapper:
lr K,P ; 0FCD 08
pi pushk ; 0FCE 28 01 07 - bios pushk - save return address on BIOS K-stack
lis 8 ; 0FD1 78
lr 4,A ; 0FD2 54
jmp b_drawchar_bmp_entry ; 0FD3 29 06 8A - unconditional jump

; -----------------------------------------------------------------------------
; bios_score_prompt_wrapper
; Wrapper around BIOS score/prompt rendering helper. Initializes object bytes
; at O26/O27 before BIOS calls.
; -----------------------------------------------------------------------------
bios_score_prompt_wrapper:
lr K,P ; 0FD6 08
pi pushk ; 0FD7 28 01 07 - bios pushk - save return address on BIOS K-stack
lisu 2 ; 0FDA 62
lisl 6 ; 0FDB 6E
li $99 ; 0FDC 20 99
lr I,A ; 0FDE 5D - store A and increment ISAR
lr S,A ; 0FDF 5C - store A in selected scratchpad register
pi b_score_left ; 0FE0 28 02 AC
pi b_score_right ; 0FE3 28 02 B5
pi popk ; 0FE6 28 01 1E - restore return address from BIOS K-stack
pk ; 0FE9 0C - return via K/P after BIOS K-stack restore

; -----------------------------------------------------------------------------
; clear_screen_o37_0
; Clear-screen wrapper variant. Stores 0 in O37 before calling BIOS clearscrn.
; -----------------------------------------------------------------------------
clear_screen_o37_0:
clr ; 0FEA 70
br clear_screen_common ; 0FEB 90 02 - unconditional jump

; -----------------------------------------------------------------------------
; clear_screen_o37_1
; Clear-screen wrapper variant. Stores 1 in O37 before calling BIOS clearscrn.
; -----------------------------------------------------------------------------
clear_screen_o37_1:
lis 1 ; 0FED 71

; -----------------------------------------------------------------------------
; clear_screen_common
; Common clear-screen helper. Stores O37, builds r3=$D0+r3, then calls BIOS
; clearscrn.
; -----------------------------------------------------------------------------
clear_screen_common:
lisu 3 ; 0FEE 63
lisl 7 ; 0FEF 6F
lr S,A ; 0FF0 5C - store A in selected scratchpad register
lr K,P ; 0FF1 08
pi pushk ; 0FF2 28 01 07 - bios pushk - save return address on BIOS K-stack
li $D0 ; 0FF5 20 D0
as 3 ; 0FF7 C3
lr 3,A ; 0FF8 53
pi clrscrn ; 0FF9 28 00 D0 - bios clear screen routine
pi popk ; 0FFC 28 01 1E - restore return address from BIOS K-stack
pk ; 0FFF 0C - return via K/P after BIOS K-stack restore

IF 0
; Smart data report
; =================
; Mode: enabled by -s or /s
; Memory range: $0800-$0FFF
; Code bytes: 1070
; Data bytes: 978
;
; DCI data roots from reachable code:
; $0BC6 from $0809
; $0BCF from $0816
; $0BD8 from $0845
; $0BE6 from $086B
; $0C98 from $0878
; $0CC8 from $0899
; $0CC8 from $08A8
; $0CC8 from $08B7
; $0CC8 from $08C3
; $0CD0 from $08C9
; $0C00 from $08FD
; $0C1B from $0907
; $0BF9 from $0914
; $0EEF from $0BB0
; $0E9D from $0B57
; $0EC1 from $0B63
; $0EE4 from $0B6D
; $0C76 from $099D
; $0C34 from $09B3
; $0C67 from $09B7
; $0C5C from $09CA
; $0CDE from $09DA
; $0CF9 from $09E4
; $0D08 from $09EE
; $0D14 from $0A18
; $0D44 from $0A32
; $0D56 from $0A43
; $0D61 from $0A53
; $0D79 from $0A6F
; $0D8B from $0A7B
; $0D99 from $0A85
; $0DA8 from $0A89
; $0D93 from $0A9C
; $0DB1 from $0AA7
; $0F58 from $0AB3
; $0DC3 from $0AD8
; $0DC9 from $0AE0
; $0DCE from $0AF5
; $0DCE from $0B01
; $0DB7 from $0B0A
; $0DD6 from $0B15
; $0E26 from $0B2A
; $0E26 from $0B33
; $0E96 from $0B4C
;
; Data intervals emitted as .byte:
; $0BF4-$0FC5 (978 bytes)
ENDIF

Disassembly:Bios

2026-08-04T20:58:06Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

; all pixels are written to background, palette is set in r3
; clears screen using the drawchar routine, one character at the time
; it covers the entire VRAM area (0,0) to (127,63), writes line 0 twice
;
; NOTES:
; Needs r31 (O37) to have data in either b0 and/or b7 or you'll get a black bar from row 50
; Uses r52 (O64) for ISAR values
; Has to have a valid stack pointer in r59 (O73)

; registers used:
; r0-r8,r31,r40-r43,r52,r53,r54,r59

; USE:
; load register 3 (lr 3,A) with color value
; lt.grey: $D4, $D6, $DC or $DE
; lt.green: $C0, $C2, $C8 or $CA
; lt.blue: $91, $93, $99 or $9B
; black/w: $21, $23, $29 or $2B

; Code to use the routine (check r31 as well):
; Prevent color bug:
; li $1F
; lr IS,A
; lis 1
; lr S,A
; actual code:
; li {color code}
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc clrscrn.loop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Democart 2

2026-08-04T20:27:43Z

E5frog:

This is a disassembly of the [[Channel F]] [[Democart 2]]. Original code is copyright © 1977 Fairchild Semiconductor.

<pre>
; -----------------------------------------------------------------------------
; Annotated and formatted Democart 2 disassembly.
; -----------------------------------------------------------------------------

reset equ $0000 ; BIOS reset vector
delay equ $008F ; BIOS delay routine
clearscrn equ $00D0 ; BIOS clear screen routine
pushk equ $0107 ; BIOS K-stack push
popk equ $011E ; BIOS K-stack pop
drawchar equ $0679 ; BIOS draw character entry
drawchar_entry equ $067C ; BIOS draw character internal entry

; Auto labels for branch targets inside mixed code/data bytes.
L0B6E equ $0B6E
L0B7B equ $0B7B
L0B80 equ $0B80
L0B85 equ $0B85
L0B8B equ $0B8B
L0BB1 equ $0BB1
L0C1D equ $0C1D
L0C1F equ $0C1F
L0C64 equ $0C64
L0CD7 equ $0CD7
L0D04 equ $0D04
L0EE0 equ $0EE0
L0EF5 equ $0EF5
L0F58 equ $0F58
L0F7A equ $0F7A

processor f8
org $0800

; -----------------------------------------------------------------------------
; Cartridge signature/start vector. First byte is $55 for a valid Channel F
; cartridge.
; -----------------------------------------------------------------------------
cartridge_start:
lr 5,A ; 0800 55
nop ; 0801 2b

; -----------------------------------------------------------------------------
; cartridge_entry
; Main Democart 2 script. Shows multiple demo screens, uses BIOS text and
; graphics routines, then returns to BIOS reset.
; -----------------------------------------------------------------------------

cartridge_entry:
lisu 3 ; 0802 63
lisl 7 ; 0803 6f
lis 1 ; 0804 71
lr S,A ; 0805 5c - store A in selected scratchpad register
pi $0135 ; 0806 28 01 35
dci L0BC6 ; 0809 2a 0b c6 - load DC with data/code pointer
pi draw_compressed_text ; 080c 28 0b a3
lisu 3 ; 080f 63
lisl 7 ; 0810 6f
lis 3 ; 0811 73
lr S,A ; 0812 5c - store A in selected scratchpad register
pi $0135 ; 0813 28 01 35
dci L0BCF ; 0816 2a 0b cf - load DC with data/code pointer
pi draw_compressed_text ; 0819 28 0b a3
lis 6 ; 081c 76
lr 3,A ; 081d 53
pi clear_screen_o37_0 ; 081e 28 0f ea
li $26 ; 0821 20 26
lr 1,A ; 0823 51
li $14 ; 0824 20 14
lr 2,A ; 0826 52
li $28 ; 0827 20 28
lr 3,A ; 0829 53
pi bios_drawchar_0215_wrapper ; 082a 28 0b 76
li $26 ; 082d 20 26
lr 1,A ; 082f 51
li $21 ; 0830 20 21
lr 2,A ; 0832 52
li $28 ; 0833 20 28
lr 3,A ; 0835 53
pi bios_drawchar_0215_wrapper ; 0836 28 0b 76
li $33 ; 0839 20 33
lr 1,A ; 083b 51
pi draw_three_prompt_markers ; 083c 28 0b 7d
li $41 ; 083f 20 41
lr 1,A ; 0841 51
pi draw_three_prompt_markers ; 0842 28 0b 7d
dci L0BD8 ; 0845 2a 0b d8 - load DC with data/code pointer
pi draw_compressed_text ; 0848 28 0b a3
clr ; 084b 70
lr 3,A ; 084c 53
pi clear_screen_o37_1 ; 084d 28 0f ed
li $14 ; 0850 20 14
lr 1,A ; 0852 51
lis 6 ; 0853 76
lr 2,A ; 0854 52
pi bios_player_draw ; 0855 28 02 0e
li $14 ; 0858 20 14
lr 1,A ; 085a 51
li $2E ; 085b 20 2e
lr 2,A ; 085d 52
pi bios_player_draw ; 085e 28 02 0e
li $12 ; 0861 20 12
lr 1,A ; 0863 51
lr 2,A ; 0864 52
li $58 ; 0865 20 58
lr 0,A ; 0867 50
pi drawchar ; 0868 28 06 79 - BIOS draw character routine
dci L0BE6 ; 086b 2a 0b e6 - load DC with data/code pointer
pi draw_compressed_text ; 086e 28 0b a3
lis 6 ; 0871 76
lr 3,A ; 0872 53
pi clear_screen_o37_0 ; 0873 28 0f ea
lis 6 ; 0876 76
lr HU,A ; 0877 5a
dci L0C98 ; 0878 2a 0c 98 - load DC with data/code pointer
li $20 ; 087b 20 20
lr 1,A ; 087d 51
lr 2,A ; 087e 52
L087F:
li $80 ; 087f 20 80
lr 0,A ; 0881 50
pi bios_drawchar_bitmap_wrapper ; 0882 28 0f cd
lis 2 ; 0885 72
as 1 ; 0886 c1
lr 1,A ; 0887 51
ds HU ; 0888 3a
bf 4,L087F ; 0889 94 f5
pi short_delay ; 088b 28 0b 96
lis 6 ; 088e 76
lr 3,A ; 088f 53
pi clear_screen_o37_0 ; 0890 28 0f ea
li $18 ; 0893 20 18
lr 2,A ; 0895 52
li $30 ; 0896 20 30
lr 1,A ; 0898 51
dci L0CC8 ; 0899 2a 0c c8 - load DC with data/code pointer
li $80 ; 089c 20 80
lr 0,A ; 089e 50
pi bios_drawchar_bitmap_wrapper ; 089f 28 0f cd
lis 2 ; 08a2 72
as 1 ; 08a3 c1
lr 1,A ; 08a4 51
li $80 ; 08a5 20 80
lr 0,A ; 08a7 50
dci L0CC8 ; 08a8 2a 0c c8 - load DC with data/code pointer
pi bios_drawchar_bitmap_wrapper ; 08ab 28 0f cd
li $30 ; 08ae 20 30
lr 1,A ; 08b0 51
li $20 ; 08b1 20 20
lr 2,A ; 08b3 52
li $80 ; 08b4 20 80
lr 0,A ; 08b6 50
dci L0CC8 ; 08b7 2a 0c c8 - load DC with data/code pointer
pi bios_drawchar_bitmap_wrapper ; 08ba 28 0f cd
lis 2 ; 08bd 72
as 1 ; 08be c1
lr 1,A ; 08bf 51
li $80 ; 08c0 20 80
lr 0,A ; 08c2 50
dci L0CC8 ; 08c3 2a 0c c8 - load DC with data/code pointer
pi bios_drawchar_bitmap_wrapper ; 08c6 28 0f cd
dci L0CD0 ; 08c9 2a 0c d0 - load DC with data/code pointer
pi draw_compressed_text ; 08cc 28 0b a3
lis 6 ; 08cf 76
lr 3,A ; 08d0 53
pi clear_screen_o37_1 ; 08d1 28 0f ed
li $13 ; 08d4 20 13
lr 1,A ; 08d6 51
lis 6 ; 08d7 76
lr 2,A ; 08d8 52
pi bios_player_draw ; 08d9 28 02 0e
li $13 ; 08dc 20 13
lr 1,A ; 08de 51
li $2F ; 08df 20 2f
lr 2,A ; 08e1 52
pi bios_player_draw ; 08e2 28 02 0e
li $11 ; 08e5 20 11
lr 1,A ; 08e7 51
lis 9 ; 08e8 79
lr 2,A ; 08e9 52
li $24 ; 08ea 20 24
lr 3,A ; 08ec 53
pi bios_draw_a01fc_wrapper ; 08ed 28 0f c6
li $5A ; 08f0 20 5a
lr 1,A ; 08f2 51
lis 9 ; 08f3 79
lr 2,A ; 08f4 52
li $24 ; 08f5 20 24
lr 3,A ; 08f7 53
pi bios_draw_a01fc_wrapper ; 08f8 28 0f c6
lis 9 ; 08fb 79
lr 4,A ; 08fc 54
dci L0C00 ; 08fd 2a 0c 00 - load DC with data/code pointer
L0900:
lm ; 0900 16 - load byte from DC and increment DC
lr 1,A ; 0901 51
lm ; 0902 16 - load byte from DC and increment DC
lr 2,A ; 0903 52
lm ; 0904 16 - load byte from DC and increment DC
lr 0,A ; 0905 50
xdc ; 0906 2c - exchange DC and H pointers
dci $0C1B ; 0907 2a 0c 1b
pi drawchar_entry ; 090a 28 06 7c
xdc ; 090d 2c - exchange DC and H pointers
ds 4 ; 090e 34
bf 4,L0900 ; 090f 94 f0
pi bios_score_prompt_wrapper ; 0911 28 0f d6
dci L0BF9 ; 0914 2a 0b f9 - load DC with data/code pointer
pi draw_compressed_text ; 0917 28 0b a3
lis 6 ; 091a 76
lr 3,A ; 091b 53
pi clear_screen_o37_0 ; 091c 28 0f ea
clr ; 091f 70
lr 2,A ; 0920 52
lr 0,A ; 0921 50
lis $D ; 0922 7d
lr HU,A ; 0923 5a
L0924:
li $7E ; 0924 20 7e
lr 1,A ; 0926 51
pi drawchar ; 0927 28 06 79 - BIOS draw character routine
lr A,2 ; 092a 42
inc ; 092b 1f
lr 2,A ; 092c 52
ds HU ; 092d 3a
bf 4,L0924 ; 092e 94 f5
L0930:
lis 4 ; 0930 74
as 2 ; 0931 c2
lr 2,A ; 0932 52
lis 3 ; 0933 73
lr 1,A ; 0934 51
L0935:
li $C0 ; 0935 20 c0
lr 0,A ; 0937 50
dci $4000 ; 0938 2a 40 00
; Points data counter to unused area.
; Pullups on data bus holds D7-D3 high in the real cartridge
; and turns "Black Jack" table green.
; Replace with $0d8b if it's going to work 100% on Multi-Cart and emulation.

pi drawchar_entry ; 093b 28 06 7c
ds 1 ; 093e 31
lr A,1 ; 093f 41
ci $77 ; 0940 25 77
bt 2,L0935 ; 0942 82 f2
lr A,2 ; 0944 42
ci $28 ; 0945 25 28
bt 2,L0930 ; 0947 82 e8
lis 3 ; 0949 73
lr HU,A ; 094a 5a
li $26 ; 094b 20 26
lr 2,A ; 094d 52
L094E:
lis 8 ; 094e 78
lr 1,A ; 094f 51
clr ; 0950 70
lr 0,A ; 0951 50
L0952:
pi drawchar ; 0952 28 06 79 - BIOS draw character routine
lis 2 ; 0955 72
as 2 ; 0956 c2
lr 2,A ; 0957 52
ds 1 ; 0958 31
ds HU ; 0959 3a
bf 4,L0952 ; 095a 94 f7
pi drawchar ; 095c 28 06 79 - BIOS draw character routine
lr A,2 ; 095f 42
inc ; 0960 1f
lr 2,A ; 0961 52
ds 1 ; 0962 31
pi drawchar ; 0963 28 06 79 - BIOS draw character routine
lr A,2 ; 0966 42
ci $31 ; 0967 25 31
bf 2,L0973 ; 0969 92 09
li $2B ; 096b 20 2b
lr 2,A ; 096d 52
lis 3 ; 096e 73
lr HU,A ; 096f 5a
jmp L094E ; 0970 29 09 4e - unconditional jump

L0973:
nop ; 0973 2b
clr ; 0974 70
lr 0,A ; 0975 50
li $2D ; 0976 20 2d
lr 2,A ; 0978 52
L0979:
li $53 ; 0979 20 53
lr 1,A ; 097b 51
pi drawchar ; 097c 28 06 79 - BIOS draw character routine
ds 1 ; 097f 31
ds 2 ; 0980 32
pi drawchar ; 0981 28 06 79 - BIOS draw character routine
lis 3 ; 0984 73
lr HU,A ; 0985 5a
L0986:
ds 2 ; 0986 32
ds 2 ; 0987 32
ds 1 ; 0988 31
pi drawchar ; 0989 28 06 79 - BIOS draw character routine
ds HU ; 098c 3a
bf 4,L0986 ; 098d 94 f8
lr A,2 ; 098f 42
ci $27 ; 0990 25 27
bf 2,L099A ; 0992 92 07
li $30 ; 0994 20 30
lr 2,A ; 0996 52
jmp L0979 ; 0997 29 09 79 - unconditional jump

L099A:
pi bios_score_prompt_wrapper ; 099a 28 0f d6
dci L0C76 ; 099d 2a 0c 76 - load DC with data/code pointer
li $69 ; 09a0 20 69
lr HU,A ; 09a2 5a
pi draw_compressed_text ; 09a3 28 0b a3
pi draw_compressed_text ; 09a6 28 0b a3
clr ; 09a9 70
lr HU,A ; 09aa 5a
pi draw_compressed_text ; 09ab 28 0b a3
lis 3 ; 09ae 73
lr 3,A ; 09af 53
pi clear_screen_o37_0 ; 09b0 28 0f ea
dci L0C34 ; 09b3 2a 0c 34 - load DC with data/code pointer
xdc ; 09b6 2c - exchange DC and H pointers
dci L0C67 ; 09b7 2a 0c 67 - load DC with data/code pointer
lis 5 ; 09ba 75
lr HU,A ; 09bb 5a
L09BC:
lm ; 09bc 16 - load byte from DC and increment DC
lr 1,A ; 09bd 51
lm ; 09be 16 - load byte from DC and increment DC
lr 2,A ; 09bf 52
lm ; 09c0 16 - load byte from DC and increment DC
lr 0,A ; 09c1 50
xdc ; 09c2 2c - exchange DC and H pointers
pi bios_drawchar_bitmap_wrapper ; 09c3 28 0f cd
xdc ; 09c6 2c - exchange DC and H pointers
ds HU ; 09c7 3a
bf 4,L09BC ; 09c8 94 f3
dci L0C5C ; 09ca 2a 0c 5c - load DC with data/code pointer
pi draw_compressed_text ; 09cd 28 0b a3
lis 3 ; 09d0 73
lr 3,A ; 09d1 53
pi clear_screen_o37_1 ; 09d2 28 0f ed
pi bios_score_prompt_wrapper ; 09d5 28 0f d6
lis 9 ; 09d8 79
lr HU,A ; 09d9 5a
dci L0CDE ; 09da 2a 0c de - load DC with data/code pointer
L09DD:
lm ; 09dd 16 - load byte from DC and increment DC
lr 1,A ; 09de 51
lm ; 09df 16 - load byte from DC and increment DC
lr 2,A ; 09e0 52
lm ; 09e1 16 - load byte from DC and increment DC
lr 0,A ; 09e2 50
xdc ; 09e3 2c - exchange DC and H pointers
dci $0CF9 ; 09e4 2a 0c f9
pi drawchar_entry ; 09e7 28 06 7c
xdc ; 09ea 2c - exchange DC and H pointers
ds HU ; 09eb 3a
bf 4,L09DD ; 09ec 94 f0
dci $0D08 ; 09ee 2a 0d 08
pi draw_compressed_text ; 09f1 28 0b a3
lis 3 ; 09f4 73
lr 3,A ; 09f5 53
pi clear_screen_o37_1 ; 09f6 28 0f ed
pi bios_score_prompt_wrapper ; 09f9 28 0f d6
li $10 ; 09fc 20 10
lr 1,A ; 09fe 51
li $1A ; 09ff 20 1a
lr 2,A ; 0a01 52
li $10 ; 0a02 20 10
lr 3,A ; 0a04 53
pi bios_drawchar_0215_wrapper ; 0a05 28 0b 76
lis 2 ; 0a08 72
lr HU,A ; 0a09 5a
L0A0A:
lis $F ; 0a0a 7f
lr 3,A ; 0a0b 53
lis $F ; 0a0c 7f
as 1 ; 0a0d c1
lr 1,A ; 0a0e 51
pi bios_drawchar_0215_wrapper ; 0a0f 28 0b 76
ds HU ; 0a12 3a
bf 4,L0A0A ; 0a13 94 f6
li $69 ; 0a15 20 69
lr HU,A ; 0a17 5a
dci L0D14 ; 0a18 2a 0d 14 - load DC with data/code pointer
pi draw_compressed_text ; 0a1b 28 0b a3
pi draw_compressed_text ; 0a1e 28 0b a3
pi draw_compressed_text ; 0a21 28 0b a3
li $30 ; 0a24 20 30
lr 1,A ; 0a26 51
li $28 ; 0a27 20 28
lr 2,A ; 0a29 52
li $10 ; 0a2a 20 10
lr 3,A ; 0a2c 53
pi bios_drawchar_0215_wrapper ; 0a2d 28 0b 76
lis 6 ; 0a30 76
lr HU,A ; 0a31 5a
dci L0D44 ; 0a32 2a 0d 44 - load DC with data/code pointer
L0A35:
lm ; 0a35 16 - load byte from DC and increment DC
lr 1,A ; 0a36 51
lm ; 0a37 16 - load byte from DC and increment DC
lr 2,A ; 0a38 52
lm ; 0a39 16 - load byte from DC and increment DC
lr 0,A ; 0a3a 50
xdc ; 0a3b 2c - exchange DC and H pointers
pi drawchar ; 0a3c 28 06 79 - BIOS draw character routine
xdc ; 0a3f 2c - exchange DC and H pointers
ds HU ; 0a40 3a
bf 4,L0A35 ; 0a41 94 f3
dci L0D56 ; 0a43 2a 0d 56 - load DC with data/code pointer
clr ; 0a46 70
lr HU,A ; 0a47 5a
pi draw_compressed_text ; 0a48 28 0b a3
lis 6 ; 0a4b 76
lr 3,A ; 0a4c 53
pi clear_screen_o37_1 ; 0a4d 28 0f ed
pi bios_score_prompt_wrapper ; 0a50 28 0f d6
dci L0D61 ; 0a53 2a 0d 61 - load DC with data/code pointer
li $69 ; 0a56 20 69
lr HU,A ; 0a58 5a
pi draw_compressed_text ; 0a59 28 0b a3
pi draw_compressed_text ; 0a5c 28 0b a3
pi draw_compressed_text ; 0a5f 28 0b a3
clr ; 0a62 70
lr HU,A ; 0a63 5a
pi draw_compressed_text ; 0a64 28 0b a3
lis 6 ; 0a67 76
lr 3,A ; 0a68 53
pi clear_screen_o37_1 ; 0a69 28 0f ed
pi bios_score_prompt_wrapper ; 0a6c 28 0f d6
dci L0D79 ; 0a6f 2a 0d 79 - load DC with data/code pointer
lis 6 ; 0a72 76
lr HU,A ; 0a73 5a
L0A74:
lm ; 0a74 16 - load byte from DC and increment DC
lr 1,A ; 0a75 51
lm ; 0a76 16 - load byte from DC and increment DC
lr 2,A ; 0a77 52
lm ; 0a78 16 - load byte from DC and increment DC
lr 0,A ; 0a79 50
xdc ; 0a7a 2c - exchange DC and H pointers
dci L0D8B ; 0a7b 2a 0d 8b - load DC with data/code pointer
pi bios_drawchar_bitmap_wrapper ; 0a7e 28 0f cd
xdc ; 0a81 2c - exchange DC and H pointers
ds HU ; 0a82 3a
bf 4,L0A74 ; 0a83 94 f0
dci $0D99 ; 0a85 2a 0d 99
xdc ; 0a88 2c - exchange DC and H pointers
dci L0DA8 ; 0a89 2a 0d a8 - load DC with data/code pointer
lis 3 ; 0a8c 73
lr HU,A ; 0a8d 5a
L0A8E:
lm ; 0a8e 16 - load byte from DC and increment DC
lr 1,A ; 0a8f 51
lm ; 0a90 16 - load byte from DC and increment DC
lr 2,A ; 0a91 52
lm ; 0a92 16 - load byte from DC and increment DC
lr 0,A ; 0a93 50
xdc ; 0a94 2c - exchange DC and H pointers
pi drawchar_entry ; 0a95 28 06 7c
xdc ; 0a98 2c - exchange DC and H pointers
ds HU ; 0a99 3a
bf 4,L0A8E ; 0a9a 94 f3
dci L0D93 ; 0a9c 2a 0d 93 - load DC with data/code pointer
pi draw_compressed_text ; 0a9f 28 0b a3
lis 6 ; 0aa2 76
lr 3,A ; 0aa3 53
pi clear_screen_o37_0 ; 0aa4 28 0f ea
dci L0DB1 ; 0aa7 2a 0d b1 - load DC with data/code pointer
lis 2 ; 0aaa 72
lr HU,A ; 0aab 5a
L0AAC:
lm ; 0aac 16 - load byte from DC and increment DC
lr 1,A ; 0aad 51
lm ; 0aae 16 - load byte from DC and increment DC
lr 2,A ; 0aaf 52
lm ; 0ab0 16 - load byte from DC and increment DC
lr 0,A ; 0ab1 50
xdc ; 0ab2 2c - exchange DC and H pointers
dci $0F58 ; 0ab3 2a 0f 58
pi drawchar_entry ; 0ab6 28 06 7c
xdc ; 0ab9 2c - exchange DC and H pointers
ds HU ; 0aba 3a
bf 4,L0AAC ; 0abb 94 f0
lis 4 ; 0abd 74
lr HU,A ; 0abe 5a
li $10 ; 0abf 20 10
lr 2,A ; 0ac1 52
L0AC2:
li $17 ; 0ac2 20 17
lr 1,A ; 0ac4 51
li $81 ; 0ac5 20 81
lr 0,A ; 0ac7 50
pi drawchar ; 0ac8 28 06 79 - BIOS draw character routine
lis 5 ; 0acb 75
as 2 ; 0acc c2
lr 2,A ; 0acd 52
ci $27 ; 0ace 25 27
bt 2,L0AC2 ; 0ad0 82 f1
li $1A ; 0ad2 20 1a
lr 1,A ; 0ad4 51
li $1A ; 0ad5 20 1a
lr 2,A ; 0ad7 52
dci L0DC3 ; 0ad8 2a 0d c3 - load DC with data/code pointer
lis 6 ; 0adb 76
lr HU,A ; 0adc 5a
L0ADD:
lm ; 0add 16 - load byte from DC and increment DC
lr 0,A ; 0ade 50
xdc ; 0adf 2c - exchange DC and H pointers
dci L0DC9 ; 0ae0 2a 0d c9 - load DC with data/code pointer
pi drawchar_entry ; 0ae3 28 06 7c
ds 1 ; 0ae6 31
ds 1 ; 0ae7 31
xdc ; 0ae8 2c - exchange DC and H pointers
ds HU ; 0ae9 3a
bf 4,L0ADD ; 0aea 94 f2
li $2C ; 0aec 20 2c
lr 2,A ; 0aee 52
li $12 ; 0aef 20 12
lr 1,A ; 0af1 51
li $80 ; 0af2 20 80
lr 0,A ; 0af4 50
dci L0DCE ; 0af5 2a 0d ce - load DC with data/code pointer
pi bios_drawchar_bitmap_wrapper ; 0af8 28 0f cd
li $43 ; 0afb 20 43
lr 1,A ; 0afd 51
li $40 ; 0afe 20 40
lr 0,A ; 0b00 50
dci L0DCE ; 0b01 2a 0d ce - load DC with data/code pointer
pi bios_drawchar_bitmap_wrapper ; 0b04 28 0f cd
pi bios_score_prompt_wrapper ; 0b07 28 0f d6
dci L0DB7 ; 0b0a 2a 0d b7 - load DC with data/code pointer
pi draw_compressed_text ; 0b0d 28 0b a3
lis 6 ; 0b10 76
lr 3,A ; 0b11 53
pi clear_screen_o37_0 ; 0b12 28 0f ea
dci L0DD6 ; 0b15 2a 0d d6 - load DC with data/code pointer
lis 8 ; 0b18 78
lr 2,A ; 0b19 52
L0B1A:
lis $F ; 0b1a 7f
L0B1B:
lr 1,A ; 0b1b 51
li $C0 ; 0b1c 20 c0
lr 0,A ; 0b1e 50
lm ; 0b1f 16 - load byte from DC and increment DC
xdc ; 0b20 2c - exchange DC and H pointers
lr HU,A ; 0b21 5a
sr 4 ; 0b22 14
sl 4 ; 0b23 15
sr 1 ; 0b24 12
lr HL,A ; 0b25 5b
lr A,HU ; 0b26 4a
sl 4 ; 0b27 15
sr 1 ; 0b28 12
lr HU,A ; 0b29 5a
dci L0E26 ; 0b2a 2a 0e 26 - load DC with data/code pointer
lr A,HL ; 0b2d 4b
adc ; 0b2e 8e
pi bios_drawchar_bitmap_wrapper ; 0b2f 28 0f cd
ds 1 ; 0b32 31
dci L0E26 ; 0b33 2a 0e 26 - load DC with data/code pointer
lr A,HU ; 0b36 4a
adc ; 0b37 8e
li $C0 ; 0b38 20 c0
lr 0,A ; 0b3a 50
pi bios_drawchar_bitmap_wrapper ; 0b3b 28 0f cd
xdc ; 0b3e 2c - exchange DC and H pointers
ds 1 ; 0b3f 31
lr A,1 ; 0b40 41
ci $5A ; 0b41 25 5a
bt 2,L0B1B ; 0b43 82 d7
lis 4 ; 0b45 74
as 2 ; 0b46 c2
lr 2,A ; 0b47 52
ci $2F ; 0b48 25 2f
bt 2,L0B1A ; 0b4a 82 cf
dci L0E96 ; 0b4c 2a 0e 96 - load DC with data/code pointer
pi draw_compressed_text ; 0b4f 28 0b a3
lis 6 ; 0b52 76
lr 3,A ; 0b53 53
pi clear_screen_o37_0 ; 0b54 28 0f ea
L0B57:
dci L0E9D ; 0b57 2a 0e 9d - load DC with data/code pointer
lis $C ; 0b5a 7c
L0B5B:
lr HU,A ; 0b5b 5a
L0B5C:
lm ; 0b5c 16 - load byte from DC and increment DC
lr 1,A ; 0b5d 51
lm ; 0b5e 16 - load byte from DC and increment DC
lr 2,A ; 0b5f 52
lm ; 0b60 16 - load byte from DC and increment DC
lr 0,A ; 0b61 50
xdc ; 0b62 2c - exchange DC and H pointers
dci L0EC1 ; 0b63 2a 0e c1 - load DC with data/code pointer
pi drawchar_entry ; 0b66 28 06 7c
xdc ; 0b69 2c - exchange DC and H pointers
ds HU ; 0b6a 3a
bf 4,L0B5C ; 0b6b 94 f0
dci L0EE4 ; 0b6d 2a 0e e4 - load DC with data/code pointer
pi draw_compressed_text ; 0b70 28 0b a3
jmp reset ; 0b73 29 00 00 - unconditional jump

; -----------------------------------------------------------------------------
; bios_drawchar_0215_wrapper
; Wrapper around BIOS draw routine at $0215. Saves K, then tail-jumps into BIOS
; code.
; -----------------------------------------------------------------------------
bios_drawchar_0215_wrapper:
lr K,P ; 0b76 08
pi pushk ; 0b77 28 01 07 - bios pushk - save return address on BIOS K-stack
jmp bios_draw_entity ; 0b7a 29 02 15 - bios, calls draw char - unconditional jump

; -----------------------------------------------------------------------------
; draw_three_prompt_markers
; Draws three repeated BIOS objects at fixed Y positions $0A, $17 and $24 using
; BIOS routine $01F6.
; -----------------------------------------------------------------------------
draw_three_prompt_markers:
lr K,P ; 0b7d 08
pi pushk ; 0b7e 28 01 07 - bios pushk - save return address on BIOS K-stack
lis $A ; 0b81 7a
lr 2,A ; 0b82 52
pi bios_draw_lives ; 0b83 28 01 f6
li $17 ; 0b86 20 17
lr 2,A ; 0b88 52
pi bios_draw_lives ; 0b89 28 01 f6
li $24 ; 0b8c 20 24
lr 2,A ; 0b8e 52
pi bios_draw_lives ; 0b8f 28 01 f6
pi popk ; 0b92 28 01 1e - restore return address from BIOS K-stack
pk ; 0b95 0c - return via K/P after BIOS K-stack restore

; -----------------------------------------------------------------------------
; short_delay
; Short delay helper. Uses r0 as outer counter and r5 as BIOS delay parameter.
; -----------------------------------------------------------------------------
short_delay:
lr K,P ; 0b96 08
lis 3 ; 0b97 73
lr 0,A ; 0b98 50
lis $F ; 0b99 7f
lr 5,A ; 0b9a 55
short_delay_loop:
pi delay ; 0b9b 28 00 8f
ds 0 ; 0b9e 30
bf 4,short_delay_loop ; 0b9f 94 fb
lr P,K ; 0ba1 09
pop ; 0ba2 1c - return from subroutine

; -----------------------------------------------------------------------------
; draw_compressed_text
; Draws a compressed or data-driven text/object stream. DC points at stream
; header: count, Y, X, then character/object bytes.
; -----------------------------------------------------------------------------
draw_compressed_text:
lr K,P ; 0ba3 08
pi pushk ; 0ba4 28 01 07 - bios pushk - save return address on BIOS K-stack
lm ; 0ba7 16 - load byte from DC and increment DC
lr 3,A ; 0ba8 53
lm ; 0ba9 16 - load byte from DC and increment DC
lr 2,A ; 0baa 52
lm ; 0bab 16 - load byte from DC and increment DC
lr 1,A ; 0bac 51

; -----------------------------------------------------------------------------
; draw_compressed_text_next_char
; Inner stream loop. Loads one stream item from DC and draws through BIOS
; drawchar entry with alternate glyph/data pointer.
; -----------------------------------------------------------------------------
draw_compressed_text_next_char:
lm ; 0bad 16 - load byte from DC and increment DC
lr 0,A ; 0bae 50
xdc ; 0baf 2c - exchange DC and H pointers
dci L0EEF ; 0bb0 2a 0e ef - load DC with data/code pointer

; -----------------------------------------------------------------------------
; draw_compressed_text_write_char
; Calls BIOS drawchar entry for one stream item, advances, and repeats until
; count expires.
; -----------------------------------------------------------------------------
draw_compressed_text_write_char:
pi drawchar_entry ; 0bb3 28 06 7c
xdc ; 0bb6 2c - exchange DC and H pointers
ds 3 ; 0bb7 33
bf 4,draw_compressed_text_next_char ; 0bb8 94 f4
lr A,HU ; 0bba 4a
ci $69 ; 0bbb 25 69
bt 4,draw_compressed_text_done ; 0bbd 84 04
pi short_delay ; 0bbf 28 0b 96

; -----------------------------------------------------------------------------
; draw_compressed_text_done
; Restores return address from BIOS K-stack and returns from stream drawing
; routine.
; -----------------------------------------------------------------------------
draw_compressed_text_done:
pi popk ; 0bc2 28 01 1e - restore return address from BIOS K-stack
pk ; 0bc5 0c - return via K/P after BIOS K-stack restore

L0BC6:
lr QU,A ; 0bc6 06
sl 1 ; 0bc7 13
out $91 ; 0bc8 27 91
bf 9,L0B57 ; 0bca 99 8c
bf 4,L0B5B ; 0bcc 94 8e
.byte $A3
L0BCF:
lr QU,A ; 0bcf 06
oi $26 ; 0bd0 22 26
lr D,A ; 0bd2 5e - store A and decrement ISAR
lr A,D ; 0bd3 4e - read selected scratchpad register and decrement ISAR
lr 8,A ; 0bd4 58
lr 8,A ; 0bd5 58
lr 2,A ; 0bd6 52
lr I,A ; 0bd7 5d - store A and increment ISAR
L0BD8:
lr IS,A ; 0bd8 0b
ds 1 ; 0bd9 31
di ; 0bda 1a
bf $E,L0B6E ; 0bdb 9e 92
xm ; 0bdd 8c
lr A,KU ; 0bde 00
lr D,A ; 0bdf 5e - store A and decrement ISAR
lr A,HU ; 0be0 4a
lr A,S ; 0be1 4c - read selected scratchpad register
lr A,KU ; 0be2 00
asd D ; 0be3 de
asd J ; 0be4 d9
as D ; 0be5 ce
L0BE6:
lr DC,H ; 0be6 10
li $0A ; 0be7 20 0a
bf $D,L0B7B ; 0be9 9d 91
bf 9,L0B85 ; 0beb 99 99
bf $E,L0B80 ; 0bed 9e 92
bf 8,L0B80 ; 0bef 98 90
lr A,KU ; 0bf1 00
bf 0,draw_three_prompt_markers ; 0bf2 90 8a
L0BF4:
bf 6,L0B8B ; 0bf4 96 96
L0BF6:
adc ; 0bf6 8e
bf $C,short_delay_loop ; 0bf7 9c a3
L0BF9:
lr KU,A ; 0bf9 04
L0BFA:
nop ; 0bfa 2b
.byte $2D
lr D,A ; 0bfc 5e - store A and decrement ISAR
lr A,HU ; 0bfd 4a
lr 8,A ; 0bfe 58
lr 4,A ; 0bff 54
L0C00:
dci $10C0 ; 0c00 2a 10 c0
lr A,2 ; 0c03 42
lr DC,H ; 0c04 10
as 0 ; 0c05 c0
ds 6 ; 0c06 36
ei ; 0c07 1b
as 0 ; 0c08 c0
dci $25C0 ; 0c09 2a 25 c0
lr A,2 ; 0c0c 42
ci $C0 ; 0c0d 25 c0
lnk ; 0c0f 19
lr P0,Q ; 0c10 0d
bt 3,L0C64 ; 0c11 83 52
pi $8417 ; 0c13 28 84 17
lr IS,A ; 0c16 0b
as 1 ; 0c17 c1
lr 4,A ; 0c18 54
dci $4200 ; 0c19 2a 42 00
L0C1C:
li $70 ; 0c1c 20 70
li $00 ; 0c1e 20 00
li $70 ; 0c20 20 70
xs 0 ; 0c22 e0
lr 0,A ; 0c23 50
lr K,P ; 0c24 08
bt 0,L0C76 ; 0c25 80 50
ds 8 ; 0c27 38
clr ; 0c28 70
li $08 ; 0c29 20 08
lr K,P ; 0c2b 08
lr K,P ; 0c2c 08
lr K,P ; 0c2d 08
ns 8 ; 0c2e f8
ns 8 ; 0c2f f8
bt 0,L0BB1 ; 0c30 80 80
bt 0,draw_compressed_text_write_char ; 0c32 80 80
L0C34:
lr Q,DC ; 0c34 0e
.byte $FF
.byte $FF
.byte $3F
dci $2E2A ; 0c38 2a 2e 2a
.byte $2E
clr ; 0c3c 70
.byte $FF
.byte $FF
ns S ; 0c3f fc
lr 4,A ; 0c40 54
lis 4 ; 0c41 74
lr 4,A ; 0c42 54
lis 4 ; 0c43 74
lr I,A ; 0c44 5d - store A and increment ISAR
lr 5,A ; 0c45 55
lr I,A ; 0c46 5d - store A and increment ISAR
lr 5,A ; 0c47 55
lr I,A ; 0c48 5d - store A and increment ISAR
lr 5,A ; 0c49 55
lr I,A ; 0c4a 5d - store A and increment ISAR
lr 5,A ; 0c4b 55
lr A,KU ; 0c4c 00
lr A,0 ; 0c4d 40
lisu 0 ; 0c4e 60
lis $D ; 0c4f 7d
lis $F ; 0c50 7f
lis $D ; 0c51 7d
lr A,KU ; 0c52 00
lr A,KU ; 0c53 00
lr A,KU ; 0c54 00
lr A,QU ; 0c55 02
lr QU,A ; 0c56 06
outs 14 ; 0c57 be
ns D ; 0c58 fe
outs 14 ; 0c59 be
lr A,KU ; 0c5a 00
lr A,KU ; 0c5b 00
L0C5C:
lr K,P ; 0c5c 08
sl 1 ; 0c5d 13
inc ; 0c5e 1f
bf $D,L0BFA ; 0c5f 9d 9a
bf 2,L0C00 ; 0c61 92 9e
br7 L0BF6 ; 0c63 8f 92
L0C65:
bf $C,L0BF4 ; 0c65 9c 8e
L0C67:
ds 0 ; 0c67 30
.byte $2E
as 0 ; 0c69 c0
ds 3 ; 0c6a 33
.byte $2E
as 0 ; 0c6c c0
ds 1 ; 0c6d 31
ds 3 ; 0c6e 33
as 0 ; 0c6f c0
lr IS,A ; 0c70 0b
ds 2 ; 0c71 32
bt 0,L0CCF ; 0c72 80 5c
ds 2 ; 0c74 32
lr A,0 ; 0c75 40
L0C76:
pk ; 0c76 0c - return via K/P after BIOS K-stack restore

lr IS,A ; 0c77 0b
st ; 0c78 17
lr A,0 ; 0c79 40
lr A,5 ; 0c7a 45
lr A,0 ; 0c7b 40
lr A,0 ; 0c7c 40
lr A,KU ; 0c7d 00
lr A,KU ; 0c7e 00
lr A,KU ; 0c7f 00
lr A,KU ; 0c80 00
lr A,0 ; 0c81 40
lr A,5 ; 0c82 45
lr A,0 ; 0c83 40
lr A,0 ; 0c84 40
lr KU,A ; 0c85 04
ds 3 ; 0c86 33
.byte $2E
lr A,HL ; 0c88 4b
lr A,D ; 0c89 4e - read selected scratchpad register and decrement ISAR
lr D,A ; 0c8a 5e - store A and decrement ISAR
lisu 6 ; 0c8b 66
lr P,K ; 0c8c 09
pop ; 0c8d 1c - return from subroutine

li $4B ; 0c8e 20 4b
lr 6,A ; 0c90 56
lr A,HU ; 0c91 4a
lr A,S ; 0c92 4c - read selected scratchpad register
lr 4,A ; 0c93 54
lr 3,A ; 0c94 53
lr A,HU ; 0c95 4a
lr A,S ; 0c96 4c - read selected scratchpad register
lr 4,A ; 0c97 54
L0C98:
ns 8 ; 0c98 f8
bt 4,L0C1C ; 0c99 84 82
bt 1,L0C1D ; 0c9b 81 81
bt 1,L0C1F ; 0c9d 81 81
.byte $FF
lr A,KU ; 0ca0 00
lr A,KU ; 0ca1 00
lr A,KU ; 0ca2 00
pop ; 0ca3 1c - return from subroutine

xi $22 ; 0ca4 23 22
oi $DC ; 0ca6 22 dc
lr A,KU ; 0ca8 00
lr A,KU ; 0ca9 00
lr A,KU ; 0caa 00
lis 8 ; 0cab 78
as 7 ; 0cac c7
lr A,4 ; 0cad 44
lr A,4 ; 0cae 44
ds 8 ; 0caf 38
lr KU,A ; 0cb0 04
lr KU,A ; 0cb1 04
lr KU,A ; 0cb2 04
lr KU,A ; 0cb3 04
ns S ; 0cb4 fc
lr A,4 ; 0cb5 44
lr A,4 ; 0cb6 44
lis $F ; 0cb7 7f
lr DC,H ; 0cb8 10
pi $2828 ; 0cb9 28 28 28
pi $2810 ; 0cbc 28 28 10
.byte $EF
lr A,KU ; 0cc0 00
lr A,KU ; 0cc1 00
lr A,KU ; 0cc2 00
lr K,P ; 0cc3 08
sr 4 ; 0cc4 14
sr 4 ; 0cc5 14
lr K,P ; 0cc6 08
ns 6 ; 0cc7 f6
L0CC8:
.byte $FF
as 3 ; 0cc9 c3
ins 5 ; 0cca a5
bf 9,L0C65 ; 0ccb 99 99
ins 5 ; 0ccd a5
as 3 ; 0cce c3
L0CCF:
.byte $FF
L0CD0:
lr IS,A ; 0cd0 0b
ds 0 ; 0cd1 30
lnk ; 0cd2 19
nm ; 0cd3 8a
.byte $DF
lr D,A ; 0cd5 5e - store A and decrement ISAR
bf 9,L0CD7 ; 0cd6 99 00
lr A,I ; 0cd8 4d - read selected scratchpad register and increment ISAR
lr J,A ; 0cd9 59
asd J ; 0cda d9
as I ; 0cdb cd
lr 6,A ; 0cdc 56
adc ; 0cdd 8e
L0CDE:
ei ; 0cde 1b
lr DC,H ; 0cdf 10
bt 2,L0D31 ; 0ce0 82 50
out $82 ; 0ce2 27 82
ci $0D ; 0ce4 25 0d
as 1 ; 0ce6 c1
ds I ; 0ce7 3d
lr DC,H ; 0ce8 10
as 1 ; 0ce9 c1
ds 6 ; 0cea 36
ei ; 0ceb 1b
as 1 ; 0cec c1
L0CED:
.byte $2F
ci $C1 ; 0cee 25 c1
lr A,7 ; 0cf0 47
pi $C117 ; 0cf1 28 c1 17
lr IS,A ; 0cf4 0b
as 0 ; 0cf5 c0
lr 4,A ; 0cf6 54
dci $4000 ; 0cf7 2a 40 00
li $F8 ; 0cfa 20 f8
clr ; 0cfc 70
L0CFD:
lr A,KU ; 0cfd 00
lr A,KU ; 0cfe 00
lr 0,A ; 0cff 50
li $50 ; 0d00 20 50
lr A,KU ; 0d02 00
li $70 ; 0d03 20 70
asd 8 ; 0d05 d8
clr ; 0d06 70
li $09 ; 0d07 20 09
lm ; 0d09 16 - load byte from DC and increment DC
lr W,J ; 0d0a 1d
lr I,A ; 0d0b 5d - store A and increment ISAR
lr HU,A ; 0d0c 5a
lr A,HU ; 0d0d 4a
lr A,S ; 0d0e 4c - read selected scratchpad register
lr A,D ; 0d0f 4e - read selected scratchpad register and decrement ISAR
lr A,KU ; 0d10 00
lisu 1 ; 0d11 61
lr A,HU ; 0d12 4a
lr S,A ; 0d13 5c - store A in selected scratchpad register
L0D14:
lr P0,Q ; 0d14 0d
lr DC,H ; 0d15 10
sl 1 ; 0d16 13
lr A,KU ; 0d17 00
lr A,2 ; 0d18 42
lr A,3 ; 0d19 43
lr A,KU ; 0d1a 00
lr A,KU ; 0d1b 00
lr A,KU ; 0d1c 00
lr A,7 ; 0d1d 47
lr A,2 ; 0d1e 42
lr A,KU ; 0d1f 00
lr A,KU ; 0d20 00
lr A,KU ; 0d21 00
lr A,1 ; 0d22 41
lr A,3 ; 0d23 43
lr P0,Q ; 0d24 0d
lm ; 0d25 16 - load byte from DC and increment DC
sl 1 ; 0d26 13
xs J ; 0d27 e9
lr A,4 ; 0d28 44
L0D29:
lr A,2 ; 0d29 42
lr A,KU ; 0d2a 00
lr A,KU ; 0d2b 00
xs HU ; 0d2c ea
lr A,1 ; 0d2d 41
lr A,3 ; 0d2e 43
lr A,KU ; 0d2f 00
lr A,KU ; 0d30 00
L0D31:
xs 2 ; 0d31 e2
lr A,KU ; 0d32 00
lr A,3 ; 0d33 43
lr P0,Q ; 0d34 0d
lr J,W ; 0d35 1e
sl 1 ; 0d36 13
lr A,KU ; 0d37 00
lr A,6 ; 0d38 46
lr A,5 ; 0d39 45
lr A,KU ; 0d3a 00
lr A,KU ; 0d3b 00
lr A,KU ; 0d3c 00
lr A,5 ; 0d3d 45
lr A,J ; 0d3e 49
lr A,KU ; 0d3f 00
lr A,KU ; 0d40 00
lr A,KU ; 0d41 00
lr A,3 ; 0d42 43
lr A,J ; 0d43 49
L0D44:
.byte $2E
nop ; 0d45 2b
bt 1,L0D6F ; 0d46 81 28
xdc ; 0d48 2c - exchange DC and H pointers
lr A,3 ; 0d49 43
ds 5 ; 0d4a 35
xdc ; 0d4b 2c - exchange DC and H pointers
lr A,6 ; 0d4c 46
ds HL ; 0d4d 3b
xdc ; 0d4e 2c - exchange DC and H pointers
lr A,J ; 0d4f 49
ds 5 ; 0d50 35
ai $42 ; 0d51 24 42
ds HL ; 0d53 3b
ai $43 ; 0d54 24 43
L0D56:
lr K,P ; 0d56 08
lr P,K ; 0d57 09
li $97 ; 0d58 20 97
nm ; 0d5a 8a
bf $E,L0CED ; 0d5b 9e 91
bf $B,L0CFD ; 0d5d 9b 9f
bf 2,L0D04 ; 0d5f 92 a4
L0D61:
lr A,QL ; 0d61 03
out $14 ; 0d62 27 14
lr A,0 ; 0d64 40
lr A,0 ; 0d65 40
lr A,0 ; 0d66 40
lr A,KL ; 0d67 01
.byte $2D
sr 4 ; 0d69 14
lisl 2 ; 0d6a 6a
lr A,QU ; 0d6b 02
ds 3 ; 0d6c 33
ds 3 ; 0d6d 33
lr A,2 ; 0d6e 42
L0D6F:
lr A,0 ; 0d6f 40
lr QU,A ; 0d70 06
L0D71:
lr H,DC ; 0d71 11
out $CB ; 0d72 27 cb
as HU ; 0d74 ca
asd 0 ; 0d75 d0
as D ; 0d76 ce
asd 6 ; 0d77 d6
asd I ; 0d78 dd
L0D79:
sr 4 ; 0d79 14
lnk ; 0d7a 19
bt 0,L0D96 ; 0d7b 80 1a
lnk ; 0d7d 19
bt 0,L0DAF ; 0d7e 80 30
lnk ; 0d80 19
lr A,0 ; 0d81 40
ds 6 ; 0d82 36
lnk ; 0d83 19
lr A,0 ; 0d84 40
lr A,I ; 0d85 4d - read selected scratchpad register and increment ISAR
lnk ; 0d86 19
lr A,0 ; 0d87 40
lr 3,A ; 0d88 53
lnk ; 0d89 19
lr A,0 ; 0d8a 40
L0D8B:
ns D ; 0d8b fe
ns D ; 0d8c fe
ns D ; 0d8d fe
ns D ; 0d8e fe
ns D ; 0d8f fe
ns D ; 0d90 fe
ns D ; 0d91 fe
lr A,KU ; 0d92 00
L0D93:
lr A,QL ; 0d93 03
lr H,DC ; 0d94 11
.byte $2E
L0D96:
bf 8,L0D29 ; 0d96 98 92
bf 7,L0D71 ; 0d98 97 d8
asd 8 ; 0d9a d8
asd 8 ; 0d9b d8
asd 8 ; 0d9c d8
asd 8 ; 0d9d d8
lr A,KU ; 0d9e 00
clr ; 0d9f 70
lr A,KU ; 0da0 00
clr ; 0da1 70
lr A,KU ; 0da2 00
lr A,KU ; 0da3 00
ns 0 ; 0da4 f0
lr A,KU ; 0da5 00
lis $F ; 0da6 7f
lr A,KU ; 0da7 00
L0DA8:
com ; 0da8 18
di ; 0da9 1a
bt 0,L0DDF ; 0daa 80 34
di ; 0dac 1a
lr A,0 ; 0dad 40
lr 1,A ; 0dae 51
L0DAF:
di ; 0daf 1a
lr A,0 ; 0db0 40
L0DB1:
lr DC,H ; 0db1 10
lr DC,H ; 0db2 10
bt 0,L0DC4 ; 0db3 80 10
xi $40 ; 0db5 23 40
L0DB7:
lr P,K ; 0db7 09
lr K,P ; 0db8 08
st ; 0db9 17
as I ; 0dba cd
asd S ; 0dbb dc
as HU ; 0dbc ca
asd 0 ; 0dbd d0
lr A,KU ; 0dbe 00
asd S ; 0dbf dc
as HU ; 0dc0 ca
as S ; 0dc1 cc
as D ; 0dc2 ce
L0DC3:
as 0 ; 0dc3 c0
L0DC4:
bt 0,L0E05 ; 0dc4 80 40
as 0 ; 0dc6 c0
bt 0,L0E08 ; 0dc7 80 40
L0DC9:
ns 0 ; 0dc9 f0
ns 0 ; 0dca f0
ns 0 ; 0dcb f0
ns 0 ; 0dcc f0
lr A,KU ; 0dcd 00
L0DCE:
.byte $FF
.byte $FF
lr A,KU ; 0dd0 00
lr A,KU ; 0dd1 00
lr A,KU ; 0dd2 00
lr A,KU ; 0dd3 00
lr A,KU ; 0dd4 00
lr A,KU ; 0dd5 00
L0DD6:
lr A,5 ; 0dd6 45
lr A,5 ; 0dd7 45
lr A,5 ; 0dd8 45
lr A,J ; 0dd9 49
as 5 ; 0dda c5
lr A,S ; 0ddb 4c - read selected scratchpad register
lr 4,A ; 0ddc 54
as 5 ; 0ddd c5
as 7 ; 0dde c7
L0DDF:
lisu 3 ; 0ddf 63
asd I ; 0de0 dd
asd 7 ; 0de1 d7
lr I,A ; 0de2 5d - store A and increment ISAR
asd 1 ; 0de3 d1
asd I ; 0de4 dd
lr A,6 ; 0de5 46
asd 4 ; 0de6 d4
lisu 4 ; 0de7 64
lisu 7 ; 0de8 67
lisu 1 ; 0de9 61
asd I ; 0dea dd
asd I ; 0deb dd
asd I ; 0dec dd
asd 1 ; 0ded d1
bt 7,L0E46 ; 0dee 87 57
as S ; 0df0 cc
lr I,A ; 0df1 5d - store A and increment ISAR
asd 7 ; 0df2 d7
lisl 5 ; 0df3 6d
bt 6,L0E6B ; 0df4 86 76
asd 4 ; 0df6 d4
lisl 4 ; 0df7 6c
as S ; 0df8 cc
lisu 7 ; 0df9 67
lisu 1 ; 0dfa 61
lr A,HL ; 0dfb 4b
lisu 4 ; 0dfc 64
bf 2,L0E74 ; 0dfd 92 76
pk ; 0dff 0c - return via K/P after BIOS K-stack restore

as 5 ; 0e00 c5
sr 4 ; 0e01 14
as HL ; 0e02 cb
lisu 0 ; 0e03 60
as 6 ; 0e04 c6
L0E05:
lis 5 ; 0e05 75
lr KL,A ; 0e06 05
lr A,S ; 0e07 4c - read selected scratchpad register
L0E08:
as HL ; 0e08 cb
lisl 5 ; 0e09 6d
lr A,2 ; 0e0a 42
lr 4,A ; 0e0b 54
lr 4,A ; 0e0c 54
lr I,A ; 0e0d 5d - store A and increment ISAR
lr A,6 ; 0e0e 46
lis 5 ; 0e0f 75
lr A,S ; 0e10 4c - read selected scratchpad register
as 6 ; 0e11 c6
asd 4 ; 0e12 d4
lis 6 ; 0e13 76
lis 6 ; 0e14 76
lis $B ; 0e15 7b
xm ; 0e16 8c
as 6 ; 0e17 c6
ins 4 ; 0e18 a4
lr 4,A ; 0e19 54
lisu 7 ; 0e1a 67
lr 4,A ; 0e1b 54
lr 4,A ; 0e1c 54
lr 1,A ; 0e1d 51
lis $C ; 0e1e 7c
as 2 ; 0e1f c2
lis 6 ; 0e20 76
lis $B ; 0e21 7b
as S ; 0e22 cc
outs 6 ; 0e23 b6
lis 6 ; 0e24 76
lis 6 ; 0e25 76
L0E26:
ns D ; 0e26 fe
ns D ; 0e27 fe
as 0 ; 0e28 c0
as 0 ; 0e29 c0
ns D ; 0e2a fe
ns D ; 0e2b fe
lr A,KU ; 0e2c 00
lr A,KU ; 0e2d 00
ns D ; 0e2e fe
ns D ; 0e2f fe
as 6 ; 0e30 c6
as 6 ; 0e31 c6
as 6 ; 0e32 c6
as 6 ; 0e33 c6
lr A,KU ; 0e34 00
lr A,KU ; 0e35 00
ns D ; 0e36 fe
ns D ; 0e37 fe
lr QU,A ; 0e38 06
lr QU,A ; 0e39 06
ns D ; 0e3a fe
ns D ; 0e3b fe
lr A,KU ; 0e3c 00
lr A,KU ; 0e3d 00
as 6 ; 0e3e c6
as 6 ; 0e3f c6
as 6 ; 0e40 c6
as 6 ; 0e41 c6
ns D ; 0e42 fe
ns D ; 0e43 fe
lr A,KU ; 0e44 00
lr A,KU ; 0e45 00
L0E46:
ns D ; 0e46 fe
ns D ; 0e47 fe
as 0 ; 0e48 c0
as 0 ; 0e49 c0
as 6 ; 0e4a c6
as 6 ; 0e4b c6
lr A,KU ; 0e4c 00
lr A,KU ; 0e4d 00
ns D ; 0e4e fe
ns D ; 0e4f fe
lr QU,A ; 0e50 06
lr QU,A ; 0e51 06
as 6 ; 0e52 c6
as 6 ; 0e53 c6
lr A,KU ; 0e54 00
lr A,KU ; 0e55 00
L0E56:
as 6 ; 0e56 c6
as 6 ; 0e57 c6
L0E58:
lr QU,A ; 0e58 06
lr QU,A ; 0e59 06
ns D ; 0e5a fe
ns D ; 0e5b fe
lr A,KU ; 0e5c 00
lr A,KU ; 0e5d 00
as 6 ; 0e5e c6
as 6 ; 0e5f c6
as 0 ; 0e60 c0
as 0 ; 0e61 c0
ns D ; 0e62 fe
ns D ; 0e63 fe
lr A,KU ; 0e64 00
lr A,KU ; 0e65 00
as 6 ; 0e66 c6
as 6 ; 0e67 c6
as 0 ; 0e68 c0
as 0 ; 0e69 c0
as 6 ; 0e6a c6
L0E6B:
as 6 ; 0e6b c6
lr A,KU ; 0e6c 00
lr A,KU ; 0e6d 00
ns D ; 0e6e fe
ns D ; 0e6f fe
lr A,KU ; 0e70 00
lr A,KU ; 0e71 00
as 6 ; 0e72 c6
as 6 ; 0e73 c6
L0E74:
lr A,KU ; 0e74 00
lr A,KU ; 0e75 00
as 6 ; 0e76 c6
as 6 ; 0e77 c6
L0E78:
lr QU,A ; 0e78 06
lr QU,A ; 0e79 06
as 6 ; 0e7a c6
as 6 ; 0e7b c6
lr A,KU ; 0e7c 00
lr A,KU ; 0e7d 00
as 6 ; 0e7e c6
as 6 ; 0e7f c6
lr A,KU ; 0e80 00
lr A,KU ; 0e81 00
ns D ; 0e82 fe
ns D ; 0e83 fe
L0E84:
lr A,KU ; 0e84 00
lr A,KU ; 0e85 00
ns D ; 0e86 fe
ns D ; 0e87 fe
lr A,KU ; 0e88 00
lr A,KU ; 0e89 00
ns D ; 0e8a fe
ns D ; 0e8b fe
lr A,KU ; 0e8c 00
lr A,KU ; 0e8d 00
L0E8E:
as 6 ; 0e8e c6
as 6 ; 0e8f c6
as 6 ; 0e90 c6
as 6 ; 0e91 c6
as 6 ; 0e92 c6
as 6 ; 0e93 c6
lr A,KU ; 0e94 00
lr A,KU ; 0e95 00
L0E96:
lr KU,A ; 0e96 04
ds 3 ; 0e97 33
nop ; 0e98 2b
lr 7,A ; 0e99 57
lr A,HU ; 0e9a 4a
lisu 4 ; 0e9b 64
lr A,D ; 0e9c 4e - read selected scratchpad register and decrement ISAR
L0E9D:
sl 4 ; 0e9d 15
di ; 0e9e 1a
lr A,0 ; 0e9f 40
com ; 0ea0 18
lr P0,Q ; 0ea1 0d
lr A,0 ; 0ea2 40
ds 5 ; 0ea3 35
lr A,IS ; 0ea4 0a
lr A,0 ; 0ea5 40
lr 0,A ; 0ea6 50
lr P0,Q ; 0ea7 0d
lr A,0 ; 0ea8 40
sr 1 ; 0ea9 12
oi $41 ; 0eaa 22 41
ds 7 ; 0eac 37
L0EAD:
sr 4 ; 0ead 14
lr A,1 ; 0eae 41
lr 8,A ; 0eaf 58
oi $41 ; 0eb0 22 41
ds 7 ; 0eb2 37
lr W,J ; 0eb3 1d
lr A,2 ; 0eb4 42
ds 5 ; 0eb5 35
ds 6 ; 0eb6 36
lr A,3 ; 0eb7 43
ds 4 ; 0eb8 34
ds 1 ; 0eb9 31
L0EBA:
bt 4,L0EF1 ; 0eba 84 36
ds 0 ; 0ebc 30
lr A,5 ; 0ebd 45
L0EBE:
.byte $2F
ds 0 ; 0ebf 30
as 6 ; 0ec0 c6
L0EC1:
lr DC,H ; 0ec1 10
ds 8 ; 0ec2 38
ds 8 ; 0ec3 38
pi $2810 ; 0ec4 28 28 10
ds 8 ; 0ec7 38
ds 8 ; 0ec8 38
pi $E8A0 ; 0ec9 28 e8 a0
ns 0 ; 0ecc f0
clr ; 0ecd 70
lr 0,A ; 0ece 50
lr 0,A ; 0ecf 50
li $70 ; 0ed0 20 70
clr ; 0ed2 70
asd 8 ; 0ed3 d8
lr A,KU ; 0ed4 00
bt 0,L0E56 ; 0ed5 80 80
bt 0,L0E58 ; 0ed7 80 80
L0ED9:
bt 0,L0EBA ; 0ed9 80 e0
xs 0 ; 0edb e0
lr A,KU ; 0edc 00
lr A,KU ; 0edd 00
L0EDE:
lr A,KU ; 0ede 00
li $78 ; 0edf 20 78
clr ; 0ee1 70
lr 0,A ; 0ee2 50
lr 0,A ; 0ee3 50
L0EE4:
lr K,P ; 0ee4 08
ci $20 ; 0ee5 25 20
om ; 0ee7 8b
nm ; 0ee8 8a
bf $D,L0E78 ; 0ee9 9d 8e
om ; 0eeb 8b
nm ; 0eec 8a
bf 6,L0E84 ; 0eed 96 96
L0EEF:
ns 8 ; 0eef f8
am ; 0ef0 88
L0EF1:
am ; 0ef1 88
am ; 0ef2 88
L0EF3:
ns 8 ; 0ef3 f8
L0EF4:
li $60 ; 0ef4 20 60
li $20 ; 0ef6 20 20
clr ; 0ef8 70
ns 8 ; 0ef9 f8
lr K,P ; 0efa 08
ns 8 ; 0efb f8
bt 0,L0EF5 ; 0efc 80 f8
ns 8 ; 0efe f8
lr K,P ; 0eff 08
ds 8 ; 0f00 38
lr K,P ; 0f01 08
L0F02:
ns 8 ; 0f02 f8
am ; 0f03 88
am ; 0f04 88
ns 8 ; 0f05 f8
lr K,P ; 0f06 08
L0F07:
lr K,P ; 0f07 08
ns 8 ; 0f08 f8
bt 0,L0F02 ; 0f09 80 f8
lr K,P ; 0f0b 08
ns 8 ; 0f0c f8
bt 0,L0E8E ; 0f0d 80 80
ns 8 ; 0f0f f8
am ; 0f10 88
ns 8 ; 0f11 f8
ns 8 ; 0f12 f8
lr K,P ; 0f13 08
lr DC,H ; 0f14 10
lr DC,H ; 0f15 10
lr DC,H ; 0f16 10
L0F17:
ns 8 ; 0f17 f8
am ; 0f18 88
ns 8 ; 0f19 f8
am ; 0f1a 88
ns 8 ; 0f1b f8
L0F1C:
ns 8 ; 0f1c f8
am ; 0f1d 88
ns 8 ; 0f1e f8
lr K,P ; 0f1f 08
lr K,P ; 0f20 08
ns 8 ; 0f21 f8
am ; 0f22 88
ns 8 ; 0f23 f8
am ; 0f24 88
am ; 0f25 88
ns 8 ; 0f26 f8
L0F27:
lr A,8 ; 0f27 48
lis 8 ; 0f28 78
lr A,8 ; 0f29 48
ns 8 ; 0f2a f8
ns 8 ; 0f2b f8
bt 0,L0EAD ; 0f2c 80 80
bt 0,L0F27 ; 0f2e 80 f8
ns 8 ; 0f30 f8
L0F31:
lr A,8 ; 0f31 48
lr A,8 ; 0f32 48
lr A,8 ; 0f33 48
ns 8 ; 0f34 f8
ns 8 ; 0f35 f8
bt 0,L0F17 ; 0f36 80 e0
bt 0,L0F31 ; 0f38 80 f8
ns 8 ; 0f3a f8
bt 0,L0F1C ; 0f3b 80 e0
bt 0,L0EBE ; 0f3d 80 80
ns 8 ; 0f3f f8
bt 0,L0ED9 ; 0f40 80 98
am ; 0f42 88
ns 8 ; 0f43 f8
am ; 0f44 88
am ; 0f45 88
ns 8 ; 0f46 f8
am ; 0f47 88
am ; 0f48 88
ns 8 ; 0f49 f8
li $20 ; 0f4a 20 20
li $F8 ; 0f4c 20 f8
ns 8 ; 0f4e f8
li $20 ; 0f4f 20 20
ins 0 ; 0f51 a0
xs 0 ; 0f52 e0
bf 0,L0EF4 ; 0f53 90 a0
as 0 ; 0f55 c0
ins 0 ; 0f56 a0
bf 0,L0F58 ; 0f57 90 00
as 8 ; 0f59 c8
.byte $FF
as 8 ; 0f5b c8
lr A,KU ; 0f5c 00
bt 0,L0EDE ; 0f5d 80 80
bt 0,L0EE0 ; 0f5f 80 80
ns 8 ; 0f61 f8
L0F62:
am ; 0f62 88
asd 8 ; 0f63 d8
ins 8 ; 0f64 a8
am ; 0f65 88
am ; 0f66 88
am ; 0f67 88
as 8 ; 0f68 c8
ins 8 ; 0f69 a8
bf 8,L0EF3 ; 0f6a 98 88
ns 8 ; 0f6c f8
am ; 0f6d 88
am ; 0f6e 88
am ; 0f6f 88
ns 8 ; 0f70 f8
ns 8 ; 0f71 f8
am ; 0f72 88
ns 8 ; 0f73 f8
bt 0,L0EF5 ; 0f74 80 80
ns 8 ; 0f76 f8
am ; 0f77 88
am ; 0f78 88
bf 0,L0F62 ; 0f79 90 e8
ns 8 ; 0f7b f8
am ; 0f7c 88
ns 8 ; 0f7d f8
bf 0,L0F07 ; 0f7e 90 88
ns 8 ; 0f80 f8
bt 0,L0F7A ; 0f81 80 f8
lr K,P ; 0f83 08
ns 8 ; 0f84 f8
ns 8 ; 0f85 f8
li $20 ; 0f86 20 20
li $20 ; 0f88 20 20
am ; 0f8a 88
am ; 0f8b 88
am ; 0f8c 88
am ; 0f8d 88
ns 8 ; 0f8e f8
am ; 0f8f 88
am ; 0f90 88
am ; 0f91 88
lr 0,A ; 0f92 50
li $88 ; 0f93 20 88
am ; 0f95 88
ins 8 ; 0f96 a8
asd 8 ; 0f97 d8
am ; 0f98 88
am ; 0f99 88
lr 0,A ; 0f9a 50
li $50 ; 0f9b 20 50
am ; 0f9d 88
am ; 0f9e 88
am ; 0f9f 88
ns 8 ; 0fa0 f8
li $20 ; 0fa1 20 20
ns 8 ; 0fa3 f8
lr DC,H ; 0fa4 10
li $40 ; 0fa5 20 40
ns 8 ; 0fa7 f8
lr A,KU ; 0fa8 00
lr A,KU ; 0fa9 00
lr A,KU ; 0faa 00
lr A,KU ; 0fab 00
lr A,KU ; 0fac 00
ns 8 ; 0fad f8
lr K,P ; 0fae 08
ds 8 ; 0faf 38
lr A,KU ; 0fb0 00
li $00 ; 0fb1 20 00
lr A,KU ; 0fb3 00
lr A,KU ; 0fb4 00
lr A,KU ; 0fb5 00
lr A,0 ; 0fb6 40
li $20 ; 0fb7 20 20
li $00 ; 0fb9 20 00
li $20 ; 0fbb 20 20
li $F8 ; 0fbd 20 f8
li $20 ; 0fbf 20 20
lr A,KU ; 0fc1 00
lr A,KU ; 0fc2 00
ns 8 ; 0fc3 f8
lr A,KU ; 0fc4 00
lr A,KU ; 0fc5 00

; -----------------------------------------------------------------------------
; bios_draw_a01fc_wrapper
; Wrapper for BIOS routine $01FC. Used for a repeated object/sprite style draw.
; -----------------------------------------------------------------------------
bios_draw_a01fc_wrapper:
lr K,P ; 0fc6 08
pi pushk ; 0fc7 28 01 07 - bios pushk - save return address on BIOS K-stack
jmp $01FC ; 0fca 29 01 fc - unconditional jump

; -----------------------------------------------------------------------------
; bios_drawchar_bitmap_wrapper
; Wrapper for BIOS drawchar bitmap entry. Sets r4=8 before tail-jumping into
; BIOS drawchar internals.
; -----------------------------------------------------------------------------
bios_drawchar_bitmap_wrapper:
lr K,P ; 0fcd 08
pi pushk ; 0fce 28 01 07 - bios pushk - save return address on BIOS K-stack
lis 8 ; 0fd1 78
lr 4,A ; 0fd2 54
jmp bios_drawchar_bitmap_entry ; 0fd3 29 06 8a - unconditional jump

; -----------------------------------------------------------------------------
; bios_score_prompt_wrapper
; Wrapper around BIOS score/prompt rendering helper. Initializes object bytes
; at O26/O27 before BIOS calls.
; -----------------------------------------------------------------------------
bios_score_prompt_wrapper:
lr K,P ; 0fd6 08
pi pushk ; 0fd7 28 01 07 - bios pushk - save return address on BIOS K-stack
lisu 2 ; 0fda 62
lisl 6 ; 0fdb 6e
li $99 ; 0fdc 20 99
lr I,A ; 0fde 5d - store A and increment ISAR
lr S,A ; 0fdf 5c - store A in selected scratchpad register
pi bios_score_left ; 0fe0 28 02 ac
pi bios_score_right ; 0fe3 28 02 b5
pi popk ; 0fe6 28 01 1e - restore return address from BIOS K-stack
pk ; 0fe9 0c - return via K/P after BIOS K-stack restore

; -----------------------------------------------------------------------------
; clear_screen_o37_0
; Clear-screen wrapper variant. Stores 0 in O37 before calling BIOS clearscrn.
; -----------------------------------------------------------------------------
clear_screen_o37_0:
clr ; 0fea 70
bf 0,clear_screen_common ; 0feb 90 02

; -----------------------------------------------------------------------------
; clear_screen_o37_1
; Clear-screen wrapper variant. Stores 1 in O37 before calling BIOS clearscrn.
; -----------------------------------------------------------------------------
clear_screen_o37_1:
lis 1 ; 0fed 71

; -----------------------------------------------------------------------------
; clear_screen_common
; Common clear-screen helper. Stores O37, builds r3=$D0+r3, then calls BIOS
; clearscrn.
; -----------------------------------------------------------------------------
clear_screen_common:
lisu 3 ; 0fee 63
lisl 7 ; 0fef 6f
lr S,A ; 0ff0 5c - store A in selected scratchpad register
lr K,P ; 0ff1 08
pi pushk ; 0ff2 28 01 07 - bios pushk - save return address on BIOS K-stack
li $D0 ; 0ff5 20 d0
as 3 ; 0ff7 c3
lr 3,A ; 0ff8 53
pi clearscrn ; 0ff9 28 00 d0 - bios clear screen routine
pi popk ; 0ffc 28 01 1e - restore return address from BIOS K-stack
pk ; 0fff 0c - return via K/P after BIOS K-stack restore

</pre>

Disassembly:Bios

2026-08-03T20:45:49Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

; all pixels are written to background, palette is set in r3
; clears screen using the drawchar routine, one character at the time
; it covers the entire VRAM area (0,0) to (127,63), writes line 0 twice
;
; NOTES:
; Needs r31 (O37) to have b0 and b7 clear or you'll get a black bar from row 50
; Uses r52 (O64) for ISAR values
; Has to have a valid stack pointer in r59 (O73)

; registers used:
; r0-r8,r31,r40-r43,r52,r53,r54,r59

; USE:
; load register 3 (lr 3,A) with color value
; lt.grey: $D4, $D6, $DC or $DE
; lt.green: $C0, $C2, $C8 or $CA
; lt.blue: $91, $93, $99 or $9B
; black/w: $21, $23, $29 or $2B

; Code to use the routine (check r31 as well):
; li {color code}
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc clrscrn.loop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Bios

2026-08-03T20:33:13Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

; all pixels are written to background, palette is set in r3
; clears screen using the drawchar routine, one character at the time
; it covers the entire VRAM area (0,0) to (127,63), writes line 0 twice
; NOTE:
; it also uses r31 (O37), b0 and b7 needs to be 0 or you'll get a black bar

; load register 3 (lr 3,A) with color value
; lt.grey: $D4, $D6, $DC or $DE
; lt.green: $C0, $C2, $C8 or $CA
; lt.blue: $91, $93, $99 or $9B
; black/w: $21, $23, $29 or $2B

; Code to use the routine (check r31 as well):
; li {color code}
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc clrscrn.loop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Bios

2026-08-03T19:56:30Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

;
; clears the screen to a color and palette specified in r3
; it clears screen using the drawchar routine, one character at the time
; it covers the area from (0,0) to (127,63)
; it uses r31 (O37), b0 and b7 needs to be 0 or you'll get a black bar

; clear screen to gray
; li $d6
; clear screen to green
; li $c0
; clear screen to b/w
; li $21
; clear screen to blue
; li $93
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc clrscrn.loop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Bios

2026-08-03T19:32:33Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

;
; clears the screen to a color and palette specified in r3
; it clears screen using the drawchar routine, one character at the time
; it covers the area from (0,0) to (127,63)
; it uses r31 (O37)

; clear screen to gray
; li $d6
; clear screen to green
; li $c0
; clear screen to b/w
; li $21
; clear screen to blue
; li $93
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc clrscrn.loop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Bios

2026-08-03T18:35:28Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

; clears the screen to a color and palette specified in r3

; clear screen to gray
; li $d6
; clear screen to green
; li $c0
; clear screen to b/w
; li $21
; clear screen to blue
; li $93
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc clrscrn.loop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Bios

2026-08-03T17:59:05Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

; clears the screen to a color and palette specified in r3

; clear screen to gray
; li $d6
; clear screen to green
; li $c0
; clear screen to b/w
; li $21
; clear screen to blue
; li $93
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc csloop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51

LIS $4 ; 074b 74 after pixel delay
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe

DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Disassembly:Bios

2026-08-03T17:36:15Z

E5frog:

This is the disassembly of the [[Channel F]] [[bios]] made and partially annotated by Sean Riddle. This code is copyright © 1976 Fairchild Semiconductor.

<pre>
cartridgeStart = $0800
cartridgeEntry = $0802

;=======;
; Reset ;
;=======;

; this is the code executed when the system first
; starts up. it clears the registers, sets the K stack
; pointer, and checks to see if a cartridge is inserted

reset:
clr
reset.clrRegs: ; clear all the registers to 0
lr IS, A ; set the ISAR
clr
lr S, A ; clear the current register
lr A, IS
inc ; increase the ISAR
ci $40
bnz reset.clrRegs ; if we're not finished, loop

; set K stack pointer (see pushk/popk)
lisu 7 ; K stack pointer (r59)
lisl 3
li $28
lr S, A ; pointer is set to r40

; check to see if a cartridge is inserted
dci cartridgeStart
lm
ci $55 ; compare the first cartridge byte to $55
bnz noCart ; if it's false, there's no valid cartridge inserted
jmp cartridgeEntry ; otherwise, play the cartridge

;==============;
; No Cartridge ;
;==============;

; no cartridge is inserted, so play the internal games

noCart:
; clear screen to gray
li $d6
lr 3, A
pi clrscrn

A0020: LI $4a ; blue G
LR $0,A ;
PI prompt ;
LISU 3 ; 0026 63
LISL 4 ; 0027 6c
LIS $4 ; 0028 74
LR S,A ; 0029 5c
LR A,$4 ; 002a 44
LISL 7 ; 002b 6f
LR S,A ; 002c 5c
CI $03 ; 002d 25 03
BF $1,A0020 ; 002f 91 f0
PI A0135 ; 0031 28 01 35
PI prompts ; 0034 28 02 24
A0037: PI A0088 ; 0037 28 00 88
PI A02da ; 003a 28 02 da
PI A0088 ; 003d 28 00 88
PI A02e8 ; 0040 28 02 e8
PI A0088 ; 0043 28 00 88
NI $04 ; 0046 21 04
BT 4,A0050 ; 0048 84 07
PI A038c ; 004a 28 03 8c
PI A0399 ; 004d 28 03 99
A0050: PI A0658 ; 0050 28 06 58
PI A0467 ; 0053 28 04 67
PI A03d3 ; 0056 28 03 d3
LISU 3 ; 0059 63
LISL 7 ; 005a 6f
LR A,S ; 005b 4c
CI $02 ; 005c 25 02
BNZ A0063 ; 005e 94 04
PI A0447 ; 0060 28 04 47
A0063: LISU 4 ; 0063 64
LISL 7 ; 0064 6f
LR A,S ; 0065 4c
INC ; 0066 1f
LR S,A ; 0067 5c
LIS $0 ; 0068 70
OUTS 0 ; 0069 b0
INS 0 ; read buttons
NI $04 ; hold button hit?
BNZ A0072 ; nope
PI prompts ; yes, print S? and wait
A0072: LISU 3 ; 0072 63
LISL 4 ; 0073 6c
DCI speeds ; 0074 2a 00 83
LR A,S ; 0077 4c
SR 1 ; 0078 12
ADC ; 0079 8e
LM ; 007a 16
LR $5,A ; 007b 55
PI delay ; 007c 28 00 8f
LIS $0 ; turn off sound
OUTS 5 ; 0080 b5
BF $0,A0037 ; 0081 90 b5

speeds: db $22,$13,$07,$03,$03 ; mode speeds

A0088: LISU 4 ;
LISL 6 ;
LR A,D ;
LR $1,A ; r1=r38
LR A,S ;
LR $0,A ; r0=r37
POP ;

delay: LI $ff ;$008f - parameter in r5, uses r6
LR $6,A ;
dlyloop: DS $6 ;
BNZ dlyloop ;
DS $5 ;
BNZ delay ;
POP ;

prompt: LR K,P ; $0099 - prints char r0 at row r1, col r2, waits for button
PI pushk ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
PI drawchar ;

LI $8b ; r0=8b red ?
LR $0,A ;
PI drawchar ;

PI readbuts ;
LI $33 ; r1=$33
LR $1,A ;
LI $13 ; r2=$13
LR $2,A ;
LIS $d ; r0=$d
LR $0,A ;
PI drawchar ;
PI drawchar ;
PI popk ;
PK ;

readbuts: INS 0 ; $00c1 - read buttons
COM ;
NI $0f ;
BT 4,readbuts ;
LR $4,A ;
LI $ff ;
LR $5,A ;
debounce: DS $5 ;
BNZ debounce ;
BF $0,delay ;

;==============;
; Clear Screen ;
;==============;

; clears the screen to a color and palette specified in r3

; clear screen to gray
; li $d6
; clear screen to green
; li $c0
; clear screen to b/w
; li $21
; clear screen to blue
; li $93
; lr 3, A
; pi clrscrn

clrscrn: ; $00D0
; save return address
lr K, P
pi pushk

lis 0
lr 2, A
clrscrn.loop2:
li $7e
lr 1, A
lr A, 3
oi 10
lr 0, A
pi drawchar
lis 5 ; this is LIS 4 in other BIOS!!!
lr 1, A
clrscrn.loop1:
lis 13
lr 0, A
pi drawchar
ds 1
lr A, 1
ci $70
bc clrscrn.loop1
lr A, 2
ai 5
lr 2, A
lisu 3
lisl 7
lis 3
ns S
bz A00fe
lr A, 2
ci $30
bc csloop2
lis 0
lr 3, A
A00fe:
lr A, 2
ci $40
bc clrscrn.loop2

; return from the subroutine
pi popk
pk

;==================;
; Register K Stack ;
;==================;

; the K stack is an emulated stack using the register r59
; as a stack pointer, which holds the register number for
; the top of the stack, which first points at r40. when
; pushk is called, K is pushed to the first two registers
; on the stack, and the pointer is increased.
;
; the K stack can hold 9 copies of K (r40-58) before
; the stack pointer itself is overwritten (r59)

;--------;
; Push K ;
;--------;

; pushes register K (r12-13) onto a stack using r59 as
; the stack pointer
;
; modifies: r7

pushk:
; backup the ISAR
lr A, IS
lr 7, A

; get the top of the stack
lisu 7
lisl 3 ; r59, stack pointer
lr A, S
lr IS, A ; load the referenced register
; push K onto the stack
lr A, Ku
lr S, A ; push high byte of K
lr A, IS
inc
lr IS, A ; increase ISAR (they could've used lr I, A)
lr A, Kl
lr S, A ; push low byte of K
; adjust pointer to the top of the stack
lr A, IS
inc
lr IS, A ; increase ISAR to the top of the stack
lr A, IS ; redundantly, get back the register number
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;--------;
; Pop K ;
;--------;

; retrieves a 16-bit value from the K stack and
; stores it in K, using r59 as the stack pointer
;
; modifies: r7

popk:
; backup the ISAR
lr A, IS
lr 7, A

; retrieve K from the stack
lisu 7
lisl 3
lr A, S ; load the stack pointer
ai $ff ; "subtract" 1 to get the first register on the stack
lr IS, A ; set the ISAR to this register
lr A, S
lr Kl, A ; load lower byte of K
lr A, IS
ai $ff ; get previous register (they could've used lr A, D)
lr IS, A
lr A, S
lr Ku, A ; load upper byte of K
; adjust pointer to the top of the stack
lr A, IS
lisu 7
lisl 3
lr S, A ; save the register number to the stack pointer

; restore the ISAR
lr A, 7
lr IS, A

; return from the subroutine
pop

;===================;

A0135: LR K,P ; 0135 08
PI pushk ; 0136 28 01 07
LISU 3 ; 0139 63
LISL 7 ; 013a 6f
LR A,S ; 013b 4c
LISU 4 ; 013c 64
LISL 5 ; 013d 6d
CI $01 ; 013e 25 01
BT 4,A014f ; 0140 84 0e
LI $53 ; 0142 20 53
LR I,A ; 0144 5d
LIS $c ; 0145 7c !!! this is 7F in other BIOS
LR D,A ; 0146 5e
LI $d0 ; 0147 20 d0
LR $3,A ; 0149 53
PI clrscrn ; 014a 28 00 d0
BF $0,A017d ; 014d 90 2f

A014f: LI $17 ; 014f 20 17
LR I,A ; 0151 5d
LI $ff ; 0152 20 ff
LR S,A ; 0154 5c
LI $d6 ; 0155 20 d6
LR $3,A ; 0157 53
PI clrscrn ; 0158 28 00 d0
LI $11 ; 015b 20 11
LR $1,A ; 015d 51
LIS $8 ; 015e 78
LR $2,A ; 015f 52
PI A01f6 ; 0160 28 01 f6
LI $11 ; 0163 20 11
LR $1,A ; 0165 51
LI $25 ; 0166 20 25
LR $2,A ; 0168 52
PI A01f6 ; 0169 28 01 f6
LI $5c ; 016c 20 5c
LR $1,A ; 016e 51
LIS $8 ; 016f 78
LR $2,A ; 0170 52
PI A01f6 ; 0171 28 01 f6
LI $5c ; 0174 20 5c
LR $1,A ; 0176 51
LI $25 ; 0177 20 25
LR $2,A ; 0179 52
PI A01f6 ; 017a 28 01 f6
A017d: LI $14 ; 017d 20 14
LR $1,A ; 017f 51
LIS $6 ; 0180 76
LR $2,A ; 0181 52
PI A020e ; 0182 28 02 0e
LI $14 ; 0185 20 14
LR $1,A ; 0187 51
LI $2e ; 0188 20 2e
LR $2,A ; 018a 52
PI A020e ; 018b 28 02 0e
LI $99 ; 018e 20 99
LISU 2 ; 0190 62
LISL 6 ; 0191 6e
LR I,A ; 0192 5d
LR S,A ; 0193 5c
PI A02ac ; 0194 28 02 ac
PI A02b5 ; 0197 28 02 b5
LISU 4 ; 019a 64
LISL 2 ; 019b 6a
LIS $2 ; 019c 72
LR S,A ; 019d 5c
BF $0,A01a4 ; 019e 90 05

A01a0: LR K,P ; 01a0 08
PI pushk ; 01a1 28 01 07
A01a4: LISU 2 ; 01a4 62
LISL 0 ; 01a5 68
LI $17 ; 01a6 20 17
LR S,A ; 01a8 5c
LISL 3 ; 01a9 6b
LR S,A ; 01aa 5c
LI $1c ; 01ab 20 1c
LR $1,A ; 01ad 51
LI $1a ; 01ae 20 1a
LR $2,A ; 01b0 52
LI $b0 ; 01b1 20 b0
LR $0,A ; 01b3 50
PI drawchar ; 01b4 28 06 79
LI $38 ; 01b7 20 38
LR $1,A ; 01b9 51
LI $1b ; 01ba 20 1b
LR $2,A ; 01bc 52
LI $55 ; 01bd 20 55
LR $0,A ; 01bf 50
PI drawchar ; 01c0 28 06 79
LI $52 ; 01c3 20 52
LR $1,A ; 01c5 51
LI $1a ; 01c6 20 1a
LR $2,A ; 01c8 52
LI $71 ; 01c9 20 71
LR $0,A ; 01cb 50
PI drawchar ; 01cc 28 06 79
LISU 4 ; 01cf 64
LISL 5 ; 01d0 6d
LR A,S ; 01d1 4c
SL 1 ; 01d2 13
BT 1,A01da ; 01d3 81 06
PI A0447 ; 01d5 28 04 47
BF $0,A01f2 ; 01d8 90 19

A01da: LI $11 ; 01da 20 11
LR $1,A ; 01dc 51
LI $1a ; 01dd 20 1a
LR $2,A ; 01df 52
LI $b2 ; 01e0 20 b2
LR $0,A ; 01e2 50
PI drawchar ; 01e3 28 06 79
LI $5e ; 01e6 20 5e
LR $1,A ; 01e8 51
LI $1a ; 01e9 20 1a
LR $2,A ; 01eb 52
LI $73 ; 01ec 20 73
LR $0,A ; 01ee 50
PI drawchar ; 01ef 28 06 79
A01f2: PI popk ; 01f2 28 01 1e
PK ; 01f5 0c

A01f6: LR K,P ; 01f6 08
PI pushk ; 01f7 28 01 07
LIS $8 ; 01fa 78
LR $3,A ; 01fb 53
A01fc: LI $81 ; 01fc 20 81
LR $0,A ; 01fe 50
PI drawchar ; 01ff 28 06 79
LR A,$1 ; 0202 41
AI $fa ; 0203 24 fa
LR $1,A ; 0205 51
LR A,$2 ; 0206 42
INC ; 0207 1f
LR $2,A ; 0208 52
DS $3 ; 0209 33
BNZ A01fc ; 020a 94 f1
BF $0,A01f2 ; 020c 90 e5

A020e: LR K,P ; 020e 08
PI pushk ; 020f 28 01 07
LI $46 ; 0212 20 46
LR $3,A ; 0214 53
A0215: LI $92 ; 0215 20 92
LR $0,A ; 0217 50
PI drawchar ; 0218 28 06 79
LR A,$1 ; 021b 41
AI $fb ; 021c 24 fb
LR $1,A ; 021e 51
DS $3 ; 021f 33
BNZ A0215 ; 0220 94 f4
BF $0,A01f2 ; 0222 90 cf

prompts: LR K,P ;
PI pushk ;
prompts2: LI $85 ; red 5 (S)
LR $0,A ;
PI prompt ;
LR A,$4 ;
CI $08 ; is it button 4, Start?
BNZ notbut4 ; no, check others
PI popk ; yes, return
PK ;

notbut4: CI $02 ; is it button 2, Mode?
BNZ notbut2 ;
LI $8e ; red M
LR $0,A ;
PI prompt ;
LISU 3 ;
LISL 4 ;
LR A,$4 ;
LR S,A ;
BF $0,prompts2 ;

notbut2: CI $01 ; is it button 1, Time?
BNZ prompts2 ;
LI $8c ; red T
LR $0,A ;
PI prompt ;
DCI minutes ;
LR A,$4 ;
SR 1 ;
ADC ;
LM ;
LISU 7 ;
LISL 1 ;
LR I,A ;
LIS $0 ;
LR S,A ;
LISU 6 ;
LISL 7 ;
LIS $f ;
LR S,A ;
PI A0271 ;
LISU 4 ;
LISL 5 ;
LR A,S ;
OI $20 ;
LR S,A ;
BF $0,prompts2 ;

minutes: db $02,$05,$10,$10,$20 ; minutes of play

A0271: LR K,P ; 0271 08
PI pushk ; 0272 28 01 07
LISU 7 ; 0275 67
LISL 2 ; 0276 6a
LR A,D ; 0277 4e
LR $4,A ; 0278 54
LR A,S ; 0279 4c
LR $3,A ; 027a 53
SR 4 ; 027b 14
OI $80 ; 027c 22 80
LR $0,A ; 027e 50
LI $2a ; 027f 20 2a
LR $1,A ; 0281 51
LI $33 ; 0282 20 33
LR $2,A ; 0284 52
PI drawchar ; 0285 28 06 79
LR A,$3 ; 0288 43
NI $0f ; 0289 21 0f
OI $80 ; 028b 22 80
LR $0,A ; 028d 50
PI drawchar ; 028e 28 06 79
LI $91 ; 0291 20 91
LR $0,A ; 0293 50
PI drawchar ; 0294 28 06 79
LR A,$4 ; 0297 44
SR 4 ; 0298 14
OI $80 ; 0299 22 80
LR $0,A ; 029b 50
PI drawchar ; 029c 28 06 79
LR A,$4 ; 029f 44
NI $0f ; 02a0 21 0f
OI $80 ; 02a2 22 80
LR $0,A ; 02a4 50
PI drawchar ; 02a5 28 06 79
PI popk ; 02a8 28 01 1e
PK ; 02ab 0c

A02ac: LR K,P ; 02ac 08
PI pushk ; 02ad 28 01 07
LISL 6 ; 02b0 6e
LI $17 ; 02b1 20 17
BF $0,A02bc ; 02b3 90 08

A02b5: LR K,P ; 02b5 08
PI pushk ; 02b6 28 01 07
LISL 7 ; 02b9 6f
LI $50 ; 02ba 20 50
A02bc: LISU 2 ; 02bc 62
LR $1,A ; 02bd 51
LI $33 ; 02be 20 33
LR $2,A ; 02c0 52
LIS $1 ; 02c1 71
AI $66 ; 02c2 24 66
ASD S ; 02c4 dc
LR S,A ; 02c5 5c
SR 4 ; 02c6 14
OI $40 ; 02c7 22 40
LR $0,A ; 02c9 50
PI drawchar ; 02ca 28 06 79
LR A,S ; 02cd 4c
NI $0f ; 02ce 21 0f
OI $40 ; 02d0 22 40
LR $0,A ; 02d2 50
PI drawchar ; 02d3 28 06 79
PI popk ; 02d6 28 01 1e
PK ; 02d9 0c

A02da: LR K,P ; 02da 08
PI pushk ; 02db 28 01 07
LI $b0 ; 02de 20 b0
LR $4,A ; 02e0 54
LISU 2 ; 02e1 62
LISL 1 ; 02e2 69

LIS $0 ; 02e3 70
OUTS 4 ; 02e4 b4
INS 4 ; read hand controller
BF $0,A02f4 ; 02e6 90 0d

A02e8: LR K,P ; 02e8 08
PI pushk ; 02e9 28 01 07
LI $71 ; 02ec 20 71
LR $4,A ; 02ee 54
LISU 2 ; 02ef 62
LISL 4 ; 02f0 6c

LIS $0 ; 02f1 70
OUTS 1 ; 02f2 b1
INS 1 ; read hand controller
A02f4: COM ; 02f4 18
NS $1 ; 02f5 f1
LR $0,A ; 02f6 50
LR A,I ; 02f7 4d
LR $1,A ; 02f8 51
LR A,S ; 02f9 4c
LR $2,A ; 02fa 52
LIS $1 ; 02fb 71
NS $0 ; 02fc f0
BT 4,A0303 ; 02fd 84 05
LR A,$1 ; 02ff 41
AI $02 ; 0300 24 02
LR $1,A ; 0302 51
A0303: LIS $2 ; 0303 72
NS $0 ; 0304 f0
BT 4,A030b ; 0305 84 05
LR A,$1 ; 0307 41
AI $fe ; 0308 24 fe
LR $1,A ; 030a 51
A030b: LIS $4 ; 030b 74
NS $0 ; 030c f0
BT 4,A0313 ; 030d 84 05
LR A,$2 ; 030f 42
AI $02 ; 0310 24 02
LR $2,A ; 0312 52
A0313: LIS $8 ; 0313 78
NS $0 ; 0314 f0
BT 4,A031b ; 0315 84 05
LR A,$2 ; 0317 42
AI $fe ; 0318 24 fe
LR $2,A ; 031a 52
A031b: LISU 3 ; 031b 63
LISL 7 ; 031c 6f
LR A,S ; 031d 4c
CI $02 ; 031e 25 02
BF $1,A0357 ; 0320 91 36
BNZ A033a ; 0322 94 17
LIS $1 ; 0324 71
NS $4 ; 0325 f4
BNZ A0332 ; 0326 94 0b
LR A,$1 ; 0328 41
CI $2d ; 0329 25 2d
BT 1,A0330 ; 032b 81 04
LI $2d ; 032d 20 2d
LR $1,A ; 032f 51
A0330: BF $0,A033a ; 0330 90 09

A0332: LR A,$1 ; 0332 41
CI $3d ; 0333 25 3d
BF $1,A033a ; 0335 91 04
LI $3d ; 0337 20 3d
LR $1,A ; 0339 51
A033a: LR A,$1 ; 033a 41
CI $52 ; 033b 25 52
BT 1,A0342 ; 033d 81 04
LI $52 ; 033f 20 52
LR $1,A ; 0341 51
A0342: CI $1a ; 0342 25 1a
BF $1,A0349 ; 0344 91 04
LI $1a ; 0346 20 1a
LR $1,A ; 0348 51
A0349: LR A,$2 ; 0349 42
CI $2b ; 034a 25 2b
BT 1,A0351 ; 034c 81 04
LI $2b ; 034e 20 2b
LR $2,A ; 0350 52
A0351: CI $09 ; 0351 25 09
BF $1,A0357 ; 0353 91 03
LIS $9 ; 0355 79
LR $2,A ; 0356 52
A0357: LISU 4 ; 0357 64
LISL 7 ; 0358 6f
LR A,S ; 0359 4c
NI $03 ; 035a 21 03
CI $03 ; 035c 25 03
BNZ A0383 ; 035e 94 24
LISU 2 ; 0360 62
LISL 0 ; 0361 68
LIS $1 ; 0362 71
NS $4 ; 0363 f4
BT 4,A0367 ; 0364 84 02
LISL 3 ; 0366 6b
A0367: LI $10 ; 0367 20 10
NS $0 ; 0369 f0
BT 4,A036d ; 036a 84 02
DS S ; 036c 3c
A036d: LI $20 ; 036d 20 20
NS $0 ; 036f f0
BT 4,A0375 ; 0370 84 04
LR A,S ; 0372 4c
INC ; 0373 1f
LR S,A ; 0374 5c
A0375: LR A,S ; 0375 4c
CI $16 ; 0376 25 16
BNZ A037c ; 0378 94 03
LI $1d ; 037a 20 1d
A037c: CI $1e ; 037c 25 1e
BNZ A0382 ; 037e 94 03
LI $17 ; 0380 20 17
A0382: LR S,A ; 0382 5c
A0383: LR A,$4 ; 0383 44
LR $0,A ; 0384 50
PI drawchar ; 0385 28 06 79
PI popk ; 0388 28 01 1e
PK ; 038b 0c

A038c: LR K,P ; 038c 08
PI pushk ; 038d 28 01 07
LISL 0 ; 0390 68
LI $b2 ; 0391 20 b2
LR $3,A ; 0393 53
LIS $0 ; 0394 70
OUTS 4 ; 0395 b4
INS 4 ; read hand controller
BF $0,A03a4 ; 0397 90 0c

A0399: LR K,P ; 0399 08
PI pushk ; 039a 28 01 07
LISL 2 ; 039d 6a
LI $73 ; 039e 20 73
LR $3,A ; 03a0 53

LIS $0 ; 03a1 70
OUTS 1 ; 03a2 b1
INS 1 ; read hand controller
A03a4: COM ; 03a4 18
LR $0,A ; 03a5 50
LISU 3 ; 03a6 63
LR A,I ; 03a7 4d
LR $1,A ; 03a8 51
LR A,S ; 03a9 4c
LR $2,A ; 03aa 52
LR A,$0 ; 03ab 40
NI $80 ; 03ac 21 80
BT 4,A03b4 ; 03ae 84 05
LR A,$2 ; 03b0 42
AI $02 ; 03b1 24 02
LR $2,A ; 03b3 52
A03b4: LR A,$0 ; 03b4 40
NI $40 ; 03b5 21 40
BT 4,A03bb ; 03b7 84 03
DS $2 ; 03b9 32
DS $2 ; 03ba 32
A03bb: LR A,$2 ; 03bb 42
CI $14 ; 03bc 25 14
BF $1,A03c3 ; 03be 91 04
LI $14 ; 03c0 20 14
LR $2,A ; 03c2 52
A03c3: CI $20 ; 03c3 25 20
BT 1,A03ca ; 03c5 81 04
LI $20 ; 03c7 20 20
LR $2,A ; 03c9 52
A03ca: LR A,$3 ; 03ca 43
LR $0,A ; 03cb 50
PI drawchar ; 03cc 28 06 79
PI popk ; 03cf 28 01 1e
PK ; 03d2 0c

A03d3: LR K,P ; 03d3 08
PI pushk ; 03d4 28 01 07
LISU 4 ; 03d7 64
LISL 0 ; 03d8 68
LR A,I ; 03d9 4d
LR $1,A ; 03da 51
LR A,I ; 03db 4d
LR $2,A ; 03dc 52
LR A,I ; 03dd 4d
LR $3,A ; 03de 53
LR A,I ; 03df 4d
LR $4,A ; 03e0 54
LR A,S ; 03e1 4c
CI $00 ; 03e2 25 00
BT 4,A03f2 ; 03e4 84 0d
LIS $0 ; 03e6 70
LR S,A ; 03e7 5c
LR A,$3 ; 03e8 43
SL 1 ; 03e9 13
AS $3 ; 03ea c3
AS $3 ; 03eb c3
LR $3,A ; 03ec 53
LR A,$4 ; 03ed 44
SL 1 ; 03ee 13
AS $4 ; 03ef c4
AS $4 ; 03f0 c4
LR $4,A ; 03f1 54
A03f2: LR A,$1 ; 03f2 41
AS $3 ; 03f3 c3
LR $1,A ; 03f4 51
LR A,$2 ; 03f5 42
AS $4 ; 03f6 c4
LR $2,A ; 03f7 52
LISU 4 ; 03f8 64
LISL 5 ; 03f9 6d
LI $44 ; 03fa 20 44
NS S ; 03fc fc
BT 4,A043b ; 03fd 84 3d
PI A049c ; 03ff 28 04 9c
LISU 4 ; 0402 64
LISL 2 ; 0403 6a
LR A,$1 ; 0404 41
LR $0,A ; 0405 50
CI $5c ; 0406 25 5c
BT 1,A0410 ; 0408 81 07
PI A043f ; 040a 28 04 3f
LI $5c ; 040d 20 5c
LR $1,A ; 040f 51
A0410: LR A,$1 ; 0410 41
LR $0,A ; 0411 50
CI $14 ; 0412 25 14
BF $1,A041c ; 0414 91 07
PI A043f ; 0416 28 04 3f
LI $14 ; 0419 20 14
LR $1,A ; 041b 51
A041c: LISL 3 ; 041c 6b
LR A,$2 ; 041d 42
LR $0,A ; 041e 50
CI $08 ; 041f 25 08
BF $1,A0429 ; 0421 91 07
PI A043f ; 0423 28 04 3f
LI $09 ; 0426 20 09
LR $2,A ; 0428 52
A0429: LR A,$2 ; 0429 42
LR $0,A ; 042a 50
CI $2e ; 042b 25 2e
BT 1,A0435 ; 042d 81 07
PI A043f ; 042f 28 04 3f
LI $2e ; 0432 20 2e
LR $2,A ; 0434 52
A0435: LI $55 ; 0435 20 55
LR $0,A ; 0437 50
PI drawchar ; 0438 28 06 79
A043b: PI popk ; 043b 28 01 1e
PK ; 043e 0c

A043f: LR A,S ; 043f 4c
COM ; 0440 18
INC ; 0441 1f
LR S,A ; 0442 5c
LI $40 ; beep
OUTS 5 ; 0445 b5
POP ; 0446 1c

A0447: LR K,P ; 0447 08
PI pushk ; 0448 28 01 07
LI $36 ; 044b 20 36
LR $1,A ; 044d 51
LIS $a ; 044e 7a
LR $2,A ; 044f 52
LIS $5 ; 0450 75
LR $4,A ; 0451 54
A0452: LI $81 ; 0452 20 81
LR $0,A ; 0454 50
PI drawchar ; 0455 28 06 79
LR A,$1 ; 0458 41
AI $fa ; 0459 24 fa
LR $1,A ; 045b 51
LR A,$2 ; 045c 42
AI $08 ; 045d 24 08
LR $2,A ; 045f 52
DS $4 ; 0460 34
BNZ A0452 ; 0461 94 f0
PI popk ; 0463 28 01 1e
PK ; 0466 0c

A0467: LR K,P ; 0467 08
PI pushk ; 0468 28 01 07
LISU 7 ; 046b 67
LISL 0 ; 046c 68
LR A,S ; 046d 4c
OI $00 ; 046e 22 00
BT 4,A0498 ; 0470 84 27
LIS $0 ; 0472 70
LR S,A ; 0473 5c
LISL 2 ; 0474 6a
LIS $1 ; 0475 71
LR $0,A ; 0476 50
COM ; 0477 18
ASD S ; 0478 dc
AI $66 ; 0479 24 66
ASD $0 ; 047b d0
LR S,A ; 047c 5c
CI $99 ; 047d 25 99
BNZ A0495 ; 047f 94 15
LI $59 ; 0481 20 59
LR D,A ; 0483 5e
LIS $1 ; 0484 71
LR $0,A ; 0485 50
COM ; 0486 18
ASD S ; 0487 dc
AI $66 ; 0488 24 66
ASD $0 ; 048a d0
CI $99 ; 048b 25 99
BNZ A0494 ; 048d 94 06
PI prompts ; time expired, print S?
BF $0,A0498 ; 0492 90 05

A0494: LR S,A ; 0494 5c
A0495: PI $0271 ; 0495 28 02 71
A0498: PI popk ; 0498 28 01 1e
PK ; 049b 0c

A049c: LR K,P ; 049c 08
PI pushk ; 049d 28 01 07
LISU 4 ; 04a0 64
LISL 7 ; 04a1 6f
LIS $1 ; 04a2 71
NS S ; 04a3 fc
BT 4,A04b8 ; 04a4 84 13
LISU 2 ; 04a6 62
LISL 4 ; 04a7 6c
PI A05fc ; 04a8 28 05 fc
DS $0 ; 04ab 30
BT 4,A04e8 ; 04ac 84 3b
LISU 2 ; 04ae 62
LISL 1 ; 04af 69
PI A05fc ; 04b0 28 05 fc
DS $0 ; 04b3 30
BT 4,A04e5 ; 04b4 84 30
BF $0,A04c8 ; 04b6 90 11

A04b8: LISU 2 ; 04b8 62
LISL 1 ; 04b9 69
PI A05fc ; 04ba 28 05 fc
DS $0 ; 04bd 30
BT 4,A04e5 ; 04be 84 26
LISU 2 ; 04c0 62
LISL 4 ; 04c1 6c
PI A05fc ; 04c2 28 05 fc
DS $0 ; 04c5 30
BT 4,A04e8 ; 04c6 84 21
A04c8: LISU 4 ; 04c8 64
LISL 5 ; 04c9 6d
LR A,S ; 04ca 4c
NI $04 ; 04cb 21 04
BNZ A04d2 ; 04cd 94 04
JMP A059d ; 04cf 29 05 9d

A04d2: LISU 3 ; 04d2 63
LISL 0 ; 04d3 68
PI A05fc ; 04d4 28 05 fc
DS $0 ; 04d7 30
BT 4,A0555 ; 04d8 84 7c
LISU 3 ; 04da 63
LISL 2 ; 04db 6a
PI A05fc ; 04dc 28 05 fc
DS $0 ; 04df 30
BT 4,A0559 ; 04e0 84 78
JMP A0588 ; 04e2 29 05 88

A04e5: LISL 0 ; 04e5 68
BF $0,A04e9 ; 04e6 90 02

A04e8: LISL 3 ; 04e8 6b
A04e9: LISU 2 ; 04e9 62
LR A,I ; 04ea 4d
LR $4,A ; 04eb 54
LR A,I ; 04ec 4d
LR A,S ; 04ed 4c
LR $7,A ; 04ee 57
LISU 4 ; 04ef 64
LISL 5 ; 04f0 6d
LR A,S ; 04f1 4c
SL 1 ; 04f2 13
LR A,$4 ; 04f3 44
BT 1,A0516 ; 04f4 81 21
DCI A050e ; 04f6 2a 05 0e
LIS $7 ; 04f9 77
LR $4,A ; 04fa 54
DS $7 ; 04fb 37
DS $7 ; 04fc 37
A04fd: LR A,$4 ; 04fd 44
AS $7 ; 04fe c7
LR $3,A ; 04ff 53
LR A,$2 ; 0500 42
COM ; 0501 18
INC ; 0502 1f
AS $3 ; 0503 c3
BT 4,A0509 ; 0504 84 04
DS $4 ; 0506 34
BT 1,A04fd ; 0507 81 f5
A0509: LR A,$4 ; 0509 44
ADC ; 050a 8e
LM ; 050b 16
BF $0,A0518 ; 050c 90 0b

A050e: db $04,$04,$05,$06,$00,$01,$02,$03

A0516: AI $e9 ; 0516 24 e9
A0518: DCI A0547 ; 0518 2a 05 47
SL 1 ; 051b 13
ADC ; 051c 8e
LM ; 051d 16
LR $5,A ; 051e 55
LM ; 051f 16
LR $6,A ; 0520 56
LISU 4 ; 0521 64
LISL 2 ; 0522 6a
LR A,S ; 0523 4c
OI $00 ; 0524 22 00
BF $1,A053a ; 0526 91 13
LR A,$5 ; 0528 45
COM ; 0529 18
INC ; 052a 1f
LR $5,A ; 052b 55
LISL 5 ; 052c 6d
LR A,S ; 052d 4c
SL 1 ; 052e 13
LISL 2 ; 052f 6a
BF $1,A0536 ; 0530 91 05
LR A,$6 ; 0532 46
COM ; 0533 18
INC ; 0534 1f
LR $6,A ; 0535 56
A0536: LR A,$1 ; 0536 41
AI $02 ; 0537 24 02
LR $1,A ; 0539 51
A053a: LR A,$5 ; 053a 45
LR I,A ; 053b 5d
LR A,$6 ; 053c 46
LR I,A ; 053d 5d
LIS $2 ; 053e 72
LR S,A ; 053f 5c
LI $80 ; beep
OUTS 5 ; 0542 b5
A0543: PI popk ; 0543 28 01 1e
PK ; 0546 0c

A0547: db $02,$00,$02,$01,$02,$02,$01,$02,$01,$FE,$02,$FE,$02,$FF

A0555: LIS $1 ; 0555 71
LR $3,A ; 0556 53
BF $0,A055b ; 0557 90 03

A0559: LIS $2 ; 0559 72
LR $3,A ; 055a 53
A055b: LISU 4 ; 055b 64
LISL 2 ; 055c 6a
LR A,S ; 055d 4c
DS $3 ; 055e 33
BT 4,A0567 ; 055f 84 07
OI $00 ; 0561 22 00
BT 1,A056b ; 0563 81 07
BF $0,A056e ; 0565 90 08

A0567: OI $00 ; 0567 22 00
BT 1,A056e ; 0569 81 04
A056b: COM ; 056b 18
INC ; 056c 1f
LR S,A ; 056d 5c
A056e: LI $80 ; beep
OUTS 5 ; 0570 b5
LISL 3 ; 0571 6b
LR A,S ; 0572 4c
OI $00 ; 0573 22 00
BNZ A0586 ; 0575 94 10
LISU 2 ; 0577 62
LISL 1 ; 0578 69
LR A,S ; 0579 4c
NI $01 ; 057a 21 01
BT 4,A0581 ; 057c 84 04
LIS $2 ; 057e 72
BF $0,A0583 ; 057f 90 03

A0581: LI $fe ; 0581 20 fe
A0583: LISU 4 ; 0583 64
LISL 3 ; 0584 6b
LR S,A ; 0585 5c
A0586: BF $0,A05f3 ; 0586 90 6c

A0588: LR A,$2 ; 0588 42
CI $14 ; 0589 25 14
BT 1,A059a ; 058b 81 0e
CI $24 ; 058d 25 24
BF $1,A059a ; 058f 91 0a
LR A,$1 ; 0591 41
CI $14 ; 0592 25 14
BT 1,A05a9 ; 0594 81 14
CI $5c ; 0596 25 5c
BF $1,A05a9 ; 0598 91 10
A059a: JMP A0543 ; 059a 29 05 43

A059d: LR A,$1 ; 059d 41
CI $14 ; 059e 25 14
BT 1,A05a9 ; 05a0 81 08
CI $5c ; 05a2 25 5c
BF $1,A05a9 ; 05a4 91 04
JMP A0543 ; 05a6 29 05 43

A05a9: LISU 4 ; 05a9 64
LISL 2 ; 05aa 6a
LR A,I ; 05ab 4d
SL 1 ; 05ac 13
BF $1,A05b3 ; 05ad 91 05
AI $02 ; 05af 24 02
BF $0,A05b5 ; 05b1 90 03

A05b3: AI $fe ; 05b3 24 fe
A05b5: AS $1 ; 05b5 c1
LR $1,A ; 05b6 51
LISL 3 ; 05b7 6b
LR A,S ; 05b8 4c
AS $2 ; 05b9 c2
LR $2,A ; 05ba 52
LI $55 ; 05bb 20 55
LR $0,A ; 05bd 50
PI drawchar ; 05be 28 06 79
LISU 4 ; 05c1 64
LISL 3 ; 05c2 6b
LIS $0 ; 05c3 70
LR S,A ; 05c4 5c
LISU 4 ; 05c5 64
LISL 0 ; 05c6 68
LR A,S ; 05c7 4c
CI $30 ; 05c8 25 30
BF $1,A05d1 ; 05ca 91 06
PI A02b5 ; 05cc 28 02 b5
BF $0,A05d4 ; 05cf 90 04

A05d1: PI A02ac ; 05d1 28 02 ac
A05d4: LI $ff ; 05d4 20 ff
LR $5,A ; 05d6 55
PI delay ; 05d7 28 00 8f
LISU 3 ; 05da 63
LISL 7 ; 05db 6f
LR A,S ; 05dc 4c
CI $02 ; 05dd 25 02
BNZ A05f0 ; 05df 94 10
LISU 2 ; 05e1 62
LISL 6 ; 05e2 6e
LR A,I ; 05e3 4d
CI $15 ; 05e4 25 15
BT 4,A05ed ; 05e6 84 06
LR A,S ; 05e8 4c
CI $15 ; 05e9 25 15
BNZ A05f0 ; 05eb 94 04
A05ed: PI prompts ; 05ed 28 02 24
A05f0: PI A01a0 ; 05f0 28 01 a0
A05f3: PI popk ; 05f3 28 01 1e
PI popk ; 05f6 28 01 1e
JMP A0037 ; 05f9 29 00 37

A05fc: LR K,P ; 05fc 08
PI pushk ; 05fd 28 01 07
LR A,S ; 0600 4c
COM ; 0601 18
INC ; 0602 1f
AS $1 ; 0603 c1
BF $1,A0610 ; 0604 91 0b
LR A,S ; 0606 4c
AI $05 ; 0607 24 05
LR $6,A ; 0609 56
LR A,$1 ; 060a 41
COM ; 060b 18
INC ; 060c 1f
AS S ; 060d cc
BT 1,A0626 ; 060e 81 17
A0610: LR A,S ; 0610 4c
COM ; 0611 18
INC ; 0612 1f
LR $6,A ; 0613 56
LR A,$1 ; 0614 41
AI $02 ; 0615 24 02
AS $6 ; 0617 c6
BF $1,A064f ; 0618 91 36
LR A,$1 ; 061a 41
AI $02 ; 061b 24 02
COM ; 061d 18
INC ; 061e 1f
LR $6,A ; 061f 56
LR A,S ; 0620 4c
AI $05 ; 0621 24 05
AS $6 ; 0623 c6
BF $1,A064f ; 0624 91 2a
A0626: LR A,I ; 0626 4d
LR A,S ; 0627 4c
COM ; 0628 18
INC ; 0629 1f
LR $6,A ; 062a 56
LR A,$2 ; 062b 42
AS $6 ; 062c c6
BF $1,A0639 ; 062d 91 0b
LR A,$2 ; 062f 42
COM ; 0630 18
INC ; 0631 1f
LR $6,A ; 0632 56
LR A,S ; 0633 4c
AI $05 ; 0634 24 05
AS $6 ; 0636 c6
BT 1,A0655 ; 0637 81 1d
A0639: LR A,S ; 0639 4c
COM ; 063a 18
INC ; 063b 1f
LR $6,A ; 063c 56
LR A,$2 ; 063d 42
AI $02 ; 063e 24 02
AS $6 ; 0640 c6
BF $1,A064f ; 0641 91 0d
LR A,$2 ; 0643 42
AI $02 ; 0644 24 02
COM ; 0646 18
INC ; 0647 1f
LR $6,A ; 0648 56
LR A,S ; 0649 4c
AI $05 ; 064a 24 05
AS $6 ; 064c c6
BT 1,A0655 ; 064d 81 07
A064f: LIS $0 ; 064f 70
A0650: LR $0,A ; 0650 50
PI popk ; 0651 28 01 1e
PK ; 0654 0c

A0655: LIS $1 ; 0655 71
BF $0,A0650 ; 0656 90 f9

A0658: DCI A0674 ; 0658 2a 06 74
LISU 4 ; 065b 64
LISL 5 ; 065c 6d
LR A,S ; 065d 4c
NI $20 ; 065e 21 20
BT 4,A0673 ; 0660 84 12
LISU 6 ; 0662 66
LISL 7 ; 0663 6f
DS S ; 0664 3c
BNZ A0673 ; 0665 94 0d
LISU 3 ; 0667 63
LISL 4 ; 0668 6c
LR A,S ; 0669 4c
SR 1 ; 066a 12
ADC ; 066b 8e
LM ; 066c 16
LISU 6 ; 066d 66
LISL 7 ; 066e 6f
LR I,A ; 066f 5d
LISU 7 ; 0670 67
LIS $1 ; 0671 71
LR S,A ; 0672 5c
A0673: POP ; 0673 1c

A0674: db $09,$0d,$15,$1c,$1c

drawchar: DCI bitmaps ; $679
LR K,P ; 067c 08
PI pushk ; 067d 28 01 07
LR A,IS ; 0680 0a
LISU 6 ; 0681 66
LISL 4 ; 0682 6c
LR I,A ; 0683 5d
LR A,$3 ; 0684 43
LR I,A ; 0685 5d
LR A,$4 ; 0686 44
LR S,A ; 0687 5c
LIS $5 ; 0688 75
LR $4,A ; 0689 54
LI $c0 ; 068a 20 c0
NS $0 ; 068c f0
LR $3,A ; 068d 53
LI $3f ; 068e 20 3f
NS $0 ; 0690 f0
LR $0,A ; 0691 50
CI $15 ; 0692 25 15
BNZ A06b4 ; 0694 94 1f
LISU 4 ; 0696 64
LISL 0 ; 0697 68
LIS $2 ; 0698 72
LR $4,A ; 0699 54
PI A06ec ; 069a 28 06 ec
LI $15 ; 069d 20 15
LR $0,A ; 069f 50
A06a0: PI A0718 ; 06a0 28 07 18
LR A,$1 ; 06a3 41
AI $06 ; 06a4 24 06
LR $1,A ; 06a6 51
LISU 6 ; 06a7 66
LISL 5 ; 06a8 6d
LR A,I ; 06a9 4d
LR $3,A ; 06aa 53
LR A,S ; 06ab 4c
LR $4,A ; 06ac 54
LISL 4 ; 06ad 6c
LR A,S ; 06ae 4c
LR IS,A ; 06af 0b
PI popk ; 06b0 28 01 1e
PK ; 06b3 0c

A06b4: CI $30 ; 06b4 25 30
BNZ A06c2 ; 06b6 94 0b
LISU 2 ; 06b8 62
LISL 1 ; 06b9 69
PI A06ec ; 06ba 28 06 ec
LISL 0 ; 06bd 68
LR A,I ; 06be 4d
LR $0,A ; 06bf 50
BF $0,A06a0 ; 06c0 90 df

A06c2: CI $31 ; 06c2 25 31
BNZ A06d0 ; 06c4 94 0b
LISU 2 ; 06c6 62
LISL 4 ; 06c7 6c
PI A06ec ; 06c8 28 06 ec
LISL 3 ; 06cb 6b
LR A,I ; 06cc 4d
LR $0,A ; 06cd 50
BF $0,A06a0 ; 06ce 90 d1

A06d0: CI $32 ; 06d0 25 32
BNZ A06de ; 06d2 94 0b
LISU 3 ; 06d4 63
LISL 0 ; 06d5 68
PI A06ec ; 06d6 28 06 ec
LI $14 ; 06d9 20 14
LR $0,A ; 06db 50
BF $0,A06a0 ; 06dc 90 c3

A06de: CI $33 ; 06de 25 33
BNZ A06a0 ; 06e0 94 bf
LISU 3 ; 06e2 63
LISL 2 ; 06e3 6a
PI A06ec ; 06e4 28 06 ec
LI $14 ; 06e7 20 14
LR $0,A ; 06e9 50
BF $0,A06a0 ; 06ea 90 b5

A06ec: LR K,P ; 06ec 08
PI pushk ; 06ed 28 01 07
LR A,S ; 06f0 4c
XS $1 ; 06f1 e1
BNZ A06f9 ; 06f2 94 06
LR A,I ; 06f4 4d
LR A,D ; 06f5 4e
XS $2 ; 06f6 e2
BT 4,A0714 ; 06f7 84 1c
A06f9: LR A,$1 ; 06f9 41
LR $5,A ; 06fa 55
LR A,$2 ; 06fb 42
LR $6,A ; 06fc 56
LR A,S ; 06fd 4c
LR $1,A ; 06fe 51
LR A,$5 ; 06ff 45
LR I,A ; 0700 5d
LR A,S ; 0701 4c
LR $2,A ; 0702 52
LR A,$6 ; 0703 46
LR D,A ; 0704 5e
LIS $d ; 0705 7d
LR $0,A ; 0706 50
DCI bitmaps ; 0707 2a 07 67
PI A0718 ; 070a 28 07 18
DCI bitmaps ; 070d 2a 07 67
LR A,I ; 0710 4d
LR $1,A ; 0711 51
LR A,D ; 0712 4e
LR $2,A ; 0713 52
A0714: PI popk ; 0714 28 01 1e
PK ; 0717 0c

A0718: LR A,$0 ; 0718 40
SL 1 ; 0719 13
ADC ; 071a 8e
AS $0 ; 071b c0
ADC ; 071c 8e
LI $40 ; 071d 20 40
OUTS 0 ; 071f b0
LR A,$4 ; 0720 44
LR $6,A ; 0721 56
A0722: LR $5,A ; 0722 55
LM ; 0723 16
LR $7,A ; 0724 57
LR A,$2 ; 0725 42
AI $00 ; 0726 24 00
COM ; 0728 18
NI $3f ; 0729 21 3f
LR $8,A ; 072b 58
INS 5 ; 072c a5
NI $c0 ; 072d 21 c0
AS $8 ; 072f c8
OUTS 5 ; 0730 b5
A0731: LR A,$1 ; 0731 41
AI $fc ; 0732 24 fc
COM ; 0734 18
OUTS 4 ; 0735 b4
LR A,$7 ; 0736 47
OI $00 ; 0737 22 00
LR A,$3 ; 0739 43
BF $1,A073d ; 073a 91 02
LIS $0 ; 073c 70
A073d: COM ; 073d 18
OUTS 1 ; 073e b1
LR A,$7 ; 073f 47
SL 1 ; 0740 13
LR $7,A ; 0741 57
LI $60 ; 0742 20 60
OUTS 0 ; 0744 b0
LI $50 ; 0745 20 50 - bit 4 is however n/c, so $40 can be used
OUTS 0 ; 0747 b0
LR A,$1 ; 0748 41
INC ; 0749 1f
LR $1,A ; 074a 51
LIS $4 ; 074b 74
LR $8,A ; 074c 58
A074d: DS $8 ; 074d 38
BNZ A074d ; 074e 94 fe
DS $5 ; 0750 35
BNZ A0731 ; 0751 94 df
LR A,$2 ; 0753 42
INC ; 0754 1f
LR $2,A ; 0755 52
LR A,$4 ; 0756 44
COM ; 0757 18
INC ; 0758 1f
AS $1 ; 0759 c1
LR $1,A ; 075a 51
LR A,$4 ; 075b 44
DS $6 ; 075c 36
BNZ A0722 ; 075d 94 c4
LR A,$4 ; 075f 44
COM ; 0760 18
INC ; 0761 1f
AS $2 ; 0762 c2
LR $2,A ; 0763 52
LIS $0 ; 0764 70
OUTS 0 ; 0765 b0
POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:

POP ; 0766 1c

;=========;
; Bitmaps ;
;=========;

; a series of 5x8 bitmaps used by the internal games,
; the prompt routine, and several cartridges

bitmaps:
; 0 $0767
.byte %11111000
.byte %10001000
.byte %10001000
.byte %10001000
.byte %11111000

; 1 $076C
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; 2 $0771
.byte %11111000
.byte %00001000
.byte %11111000
.byte %10000000
.byte %11111000

; 3 $0776
.byte %11111000
.byte %00001000
.byte %11111000
.byte %00001000
.byte %11111000

; 4 $077B
.byte %10001000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %00001000

; 5 $0780
.byte %11111000
.byte %10000000
.byte %11111000
.byte %00001000
.byte %11111000

; 6 $0785
.byte %11111000
.byte %10000000
.byte %11111000
.byte %10001000
.byte %11111000

; 7 $078A
.byte %11111000
.byte %00001000
.byte %00010000
.byte %00010000
.byte %00010000

; 8 $078F
.byte %11111000
.byte %10001000
.byte %11111000
.byte %10001000
.byte %11111000

; 9 $0794
.byte %11111000
.byte %10001000
.byte %11111000
.byte %00001000
.byte %11111000

; G $0799
.byte %11111000
.byte %10000000
.byte %10011000
.byte %10001000
.byte %11111000

; ? $079E
.byte %11111000
.byte %00001000
.byte %00111000
.byte %00000000
.byte %00100000

; T $07A3
.byte %11111000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; (space) $07A8
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000
.byte %00000000

; M $07AD
.byte %11111000
.byte %10101000
.byte %10101000
.byte %10101000
.byte %10101000

; X $07B2
.byte %10001000
.byte %01010000
.byte %00100000
.byte %01010000
.byte %10001000

; (block) $07B7
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111
.byte %11111111

; : $07BC
.byte %00000000
.byte %00100000
.byte %00000000
.byte %00100000
.byte %00000000

; - $07C1
.byte %00000000
.byte %00000000
.byte %11111000
.byte %00000000
.byte %00000000

; || (center) $07C6
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000
.byte %01010000

; || (left) $07CB
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000
.byte %10100000

; ' $07D0
.byte %11000000
.byte %11000000
.byte %00000000
.byte %00000000
.byte %00000000

; Hockey (Tennis) players $07D5
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000
.byte %00001000

; Hockey (Tennis) players 1 $07DA
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000
.byte %00100000

; Hockey (Tennis) players 2 $07DF
.byte %00010000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %01000000

; Hockey (Tennis) players 3 $07E4
.byte %00001000
.byte %00010000
.byte %00100000
.byte %01000000
.byte %10000000

; Hockey (Tennis) players 4 $07E9
.byte %00000000
.byte %00011000
.byte %00100000
.byte %11000000
.byte %00000000

; Hockey (Tennis) players 5 $07EE
.byte %00000000
.byte %11000000
.byte %00100000
.byte %00011000
.byte %00000000

; Hockey (Tennis) players 6 $07F3
.byte %10000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00001000

; Hockey (Tennis) players 7 $07F8
.byte %01000000
.byte %01000000
.byte %00100000
.byte %00010000
.byte %00010000

; $07FD
.byte 0,0,0
</pre>

Main Page

2026-08-01T05:51:13Z

E5frog: /* Getting Started */

Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__

<div id="col1" style="width: 30%; float: right">
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">
== Channel F Information ==
'''Hardware'''
* [[Schematics]]
* [[Pinouts]]
* [[Resolution]]
* [[Register]]s
* [[F8]]
* [[ROMC|ROMC explained]]
* [[RAM]]
* [[VRAM]]
* [[Port|Ports]]
* [[Modding]]
'''Programming:'''
* [[Opcode]]s
* [[DASM|DASM compiler]]
* [[Accessing VRAM|Draw graphics]]
* [[Reading Controllers|Reading Controller and Buttons]]
* [[Outputting Sound]]
* [[Subtraction]]
* [[Binary coded decimal]]
* [[Subroutines]]
* [[Ves.h]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Snippets ==
* [[Snippet:Blit|Draw in two colors]]
* [[Snippet:Multiblit|Draw in all colors]]
* [[Snippet:Plot|Draw just one dot]]
* [[Snippet:Score|Keep track of score]]
* [[Snippet:Playsong|Make sweet monophonic music]]
** [[Snippet:Music_60.h|Music_60.h]]
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Homebrews ==
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner
* [[Homebrew:Music|Homebrew Music]]
* [[Homebrew:CCtro|256 Byte intro]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Tools ==
* [[DASM]]
* [[f8tool|F8tool]]
* [[Graphics converter]]
** [[For full screen]]
* [[Videocart dumper]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Disassemblies ==
* [[Disassembly:Bios|Channel F Bios]]
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - Mühle, usw]]
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]
* [[Disassembly:Democart|Democart]]
* [[Disassembly:Democart 2|Democart 2]]
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]

</div>
</div>

<div id="col2" style="width: 69%; float: left">

== Contribute! ==

The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).

== Getting Started ==

If you'd like to get started programming games for the Channel F, try downloading the [https://channelf.se/veswiki/images/a/ac/Devel_MESSUI0235.7z Development Pack (.7z, 18.9 MiB)]. It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. It has been tested (and is working) on Windows XP Home SP3. 
Here's a tutorial that might be helpful:
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]
 Read up on the guides and have fun! 

== Useful external links ==
(all links working June 21st 2020)

* [http://www.freelists.org/list/channelf Channel F Programming List]
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]

== Information in pdf:s ==

Here are complete Guides in pdf format on how to program a F8 processor system: 
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)] 
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)] 

[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]

These are a few shorter pdf:s with information on the F8 system and its circuits: 
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]
 
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] 

[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)] 
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)] 
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)] 
 
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]

File:Devel MESSUI0235.7z

2026-08-01T05:50:04Z

E5frog: DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game.

DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game.

Snippet:Multiblit

2026-07-26T17:47:10Z

E5frog:

The '''multiblit''' subroutine is a derivative of the '''[[Snippet:Blit|blit]]''' subroutine, but draws the image to the screen in four colors (2 bits per pixel). The two-bit combination for green is %00, for red is %01, for blue is %10, and for the background color it's %11. Four pixels can be stored in a single byte of graphics data.

The parameters and instructions for the routines are almost the same, using '''multiblit''' instead of '''blit''' and '''MultiBlitGfx''' instead of '''blitGraphic'''. All you need to do is to skip the two color bytes in the parameter data.

To call the functions, you should use this for '''MultiBlitGfx''':

<pre>
dci gfx.parameters ; address of parameters
pi MultiBlitGfx
</pre>

Parameters can be stored where you like, it has the address for the actual gfx data, that can also be placed where convenient.
<pre>
gfx.parameters:
.byte 4 ; x position
.byte 18 ; y position
.byte 8 ; width
.byte 5 ; height
.word gfx.data ; address for the graphics

gfx.data:
.byte %00001010, %11000010, %11000010, %11000011, %00001010
</pre>

If you want to use '''multiblit''' directly, make sure you have setup these data:
<pre>
r1 = x position
r2 = y position
r3 = width
r4 = height
DC = pointer to graphics
</pre>

<pre>
;================;
; Multiblit Code ;
;================;
;
; green: %00 (Port color code %00000000 / $00)
; red : %01 (Port color code %01000000 / $40)
; blue : %10 (Port color code %10000000 / $80)
; background: %11. (Port color code %11000000 / $C0)
;
;-------------------;
; MultiBlitGfx ;
;-------------------;

; takes graphic parameters from ROM, stores them in r1-r4, changes
; the DC and calls the multiblit function with the parameters
;
; modifies: r1-r4, Q, DC

MultiBlitGfx:
; set ISAR
lisu 0
lisl 1
; load four bytes from the parameters into r1-r4
lm
lr I, A ; store byte and increase ISAR
lm
lr I, A
lm
lr I, A
lm
lr S, A

; load the graphics address
lm
lr Qu, A ; into Q
lm
lr Ql, A
lr DC, Q ; load it into the DC

; call the blit function
; jmp multiblit ; Not needed, it's the next piece of code

;--------------------;
; Multiblit Function ;
;--------------------;
;
; This function blits a 4-color graphic based on parameters set
; in r1-r4 and the graphic data pointed to by DC0, onto the
; screen
; Origin from cart 26, modified for color and annotated
;
; modifies: r0-r7, DC

; register reference:
; -------------------
; r0 = quick adder
; r1 = x position
; r2 = y position
; r3 = width
; r4 = height (and vertical counter)
;
; r5 = horizontal counter
; r6 = graphics byte
; r7 = pixel counter
;
; DC = pointer to graphics

multiblit:
clr
com
lr 0, A ; $FF, for adding 1

lis 1
lr 7, A ; load #1 into r7 so it'll be reset when we start
lr A, 2 ; load the y offset
com ; invert it
.multiblitRow:
outs 5 ; load accumulator into port 5 (row)

; check vertical counter
ds 4 ; decrease r4 (vertical counter)
bnc .multiblitExit ; if it rolls over exit

; load the width into the horizontal counter
lr A, 3
lr 5, A

lr A, 1 ; load the x position
com ; complement it
.multiblitColumn:
outs 4 ; use the accumulator as our initial column
; check to see if this byte is finished
ds 7 ; decrease r7 (pixel counter)
bnz .multiblitDrawPixel ; if we aren't done with this byte, branch

.multiblitGetByte:
; get the next graphics byte and set related registers
lis 4
lr 7, A ; load 4 into r7 (4 doublebit, pixel counter)
lm
lr 6, A ; load a graphics byte into r6

.multiblitDrawPixel:
; get new color
lr A, 6
ni %11000000 ; Just keep top two
outs 1 ; output A in p1 (color)

.multiblitTransferData:
; transfer the pixel data
lis 6
sl 4
outs 0
sl 1
outs 0

; GFX DELAY

; shift graphics byte
lr A, 6 ; load r6 (graphics byte)
sl 1
sl 1 ; shift left two, move up to b7, b6
lr 6, A ; save it

lis 2 ; Small delay
.multiblitSavePixelDelay:
ai $ff
bnz .multiblitSavePixelDelay ; loop if not 0 (small delay)

.multiblitCheckColumn:
ds 5 ; decrease r5 (horizontal counter)
bz .multiblitCheckRow ; if it's 0, branch

ins 4 ; get p4 (column)
as 0 ; add 1 (complemented)
br .multiblitColumn ; branch

.multiblitCheckRow:
ins 5 ; get p5 (row)
as 0 ; add 1 (complemented)
br .multiblitRow ; branch

.multiblitExit:
; return from the subroutine
pop
</pre>

You need to start at (4,4) for the upper left corner in MESS.

== See Also ==
* [[Snippet:Blit|Blit Subroutine]]

Snippet:Multiblit

2026-07-26T17:46:00Z

E5frog:

The '''multiblit''' subroutine is a derivative of the '''[[Snippet:Blit|blit]]''' subroutine, but draws the image to the screen in four colors (2 bits per pixel). The two-bit combination for green is %00, for red is %01, for blue is %10, and for the background color it's %11. Four pixels can be stored in a single byte of graphics data.

The parameters and instructions for the routines are almost the same, using '''multiblit''' instead of '''blit''' and '''MultiBlitGfx''' instead of '''blitGraphic'''. All you need to do is to skip the two color bytes in the parameter data.

To call the functions, you should use this for '''MultiBlitGfx''':

<pre>
dci gfx.parameters ; address of parameters
pi MultiBlitGfx
</pre>

Parameters can be stored where you like, it has the address for the actual gfx data, that can also be placed where convenient.
<pre>
gfx.parameters:
.byte 4 ; x position
.byte 18 ; y position
.byte 8 ; width
.byte 5 ; height
.word gfx.data ; address for the graphics

gfx.data:
.byte %00001010, %11000010, %11000010, %11000011, %00001010
</pre>

If you want to use '''multiblit''' directly, make sure you have setup these data:
<pre>
r1 = x position
r2 = y position
r3 = width
r4 = height
DC = pointer to graphics
</pre>

<pre>
;================;
; Multiblit Code ;
;================;
;
; green: %00 (Port color code %00000000 / $00)
; red : %01 (Port color code %01000000 / $40)
; blue : %10 (Port color code %10000000 / $80)
; background: %11. (Port color code %11000000 / $C0)
;
;-------------------;
; MultiBlitGfx ;
;-------------------;

; takes graphic parameters from ROM, stores them in r1-r4, changes
; the DC and calls the multiblit function with the parameters
;
; modifies: r1-r4, Q, DC

MultiBlitGfx:
; set ISAR
lisu 0
lisl 1
; load four bytes from the parameters into r1-r4
lm
lr I, A ; store byte and increase ISAR
lm
lr I, A
lm
lr I, A
lm
lr S, A

; load the graphics address
lm
lr Qu, A ; into Q
lm
lr Ql, A
lr DC, Q ; load it into the DC

; call the blit function
; jmp multiblit ; Not needed, it's the next piece of code

;--------------------;
; Multiblit Function ;
;--------------------;
;
; Adjusted so that (0,0) is the top left pixel in the MESS display.
; If you want to skip this adjustment, saving 6 cycles, use
; "multiblit_no" for real origo - and not (4,4).
;
; This function blits a 4-color graphic based on parameters set
; in r1-r4 and the graphic data pointed to by DC0, onto the
; screen
; Origin from cart 26, modified for color and annotated
;
; modifies: r0-r7, DC

; register reference:
; -------------------
; r0 = quick adder
; r1 = x position
; r2 = y position
; r3 = width
; r4 = height (and vertical counter)
;
; r5 = horizontal counter
; r6 = graphics byte
; r7 = pixel counter
;
; DC = pointer to graphics

multiblit:
clr
com
lr 0, A ; $FF, for adding 1

lis 1
lr 7, A ; load #1 into r7 so it'll be reset when we start
lr A, 2 ; load the y offset
com ; invert it
.multiblitRow:
outs 5 ; load accumulator into port 5 (row)

; check vertical counter
ds 4 ; decrease r4 (vertical counter)
bnc .multiblitExit ; if it rolls over exit

; load the width into the horizontal counter
lr A, 3
lr 5, A

lr A, 1 ; load the x position
com ; complement it
.multiblitColumn:
outs 4 ; use the accumulator as our initial column
; check to see if this byte is finished
ds 7 ; decrease r7 (pixel counter)
bnz .multiblitDrawPixel ; if we aren't done with this byte, branch

.multiblitGetByte:
; get the next graphics byte and set related registers
lis 4
lr 7, A ; load 4 into r7 (4 doublebit, pixel counter)
lm
lr 6, A ; load a graphics byte into r6

.multiblitDrawPixel:
; get new color
lr A, 6
ni %11000000 ; Just keep top two
outs 1 ; output A in p1 (color)

.multiblitTransferData:
; transfer the pixel data
lis 6
sl 4
outs 0
sl 1
outs 0

; GFX DELAY

; shift graphics byte
lr A, 6 ; load r6 (graphics byte)
sl 1
sl 1 ; shift left two, move up to b7, b6
lr 6, A ; save it

lis 2 ; Small delay
.multiblitSavePixelDelay:
ai $ff
bnz .multiblitSavePixelDelay ; loop if not 0 (small delay)

.multiblitCheckColumn:
ds 5 ; decrease r5 (horizontal counter)
bz .multiblitCheckRow ; if it's 0, branch

ins 4 ; get p4 (column)
as 0 ; add 1 (complemented)
br .multiblitColumn ; branch

.multiblitCheckRow:
ins 5 ; get p5 (row)
as 0 ; add 1 (complemented)
br .multiblitRow ; branch

.multiblitExit:
; return from the subroutine
pop
</pre>

You need to start at (4,4) for the upper left corner in MESS.

== See Also ==
* [[Snippet:Blit|Blit Subroutine]]

Snippet:Blit

2026-07-16T23:06:32Z

E5frog:

The '''blit''' subroutine reads a two-color (1 bit per pixel) block of graphics data from ROM and displays it on the screen, using several parameters. It works much in the same way as the BIOS drawchar routine except for arbitrarily sized data. The code was originally taken from [[Disassembly:Videocart_26|Videocart 26]] and adapted to be more flexible and reusable.

The routine is separated into two parts, '''blitGraphic''' and '''blit'''. '''blit''' takes parameters in registers r1-r6, and retrieves graphics data from the location DC0 points to. It can be called independently of '''blitGraphic'''. '''blitGraphic''' takes hard-coded parameters from ROM at the address pointed at by DC0 and then calls the '''blit''' routine. When the parameters do not need to be dynamic, storing the parameters in ROM and calling the '''blitGraphic''' routine directly can be more efficient than writing them to the registers and calling '''blit'''.

Note that coordinate (0,0) is usually outside the visible emulation area, in MESS/MESSUI/MAME visible area starts at (4,4).

Code works with the '''DASM''' compiler.

'''Tip:''' If you want a block in one color, set both colors the same and skip setting the data pointer (DC0).

<pre>
;===========;
; Blit Code ;
;===========;

;--------------;
; Blit Graphic ;
;--------------;

; takes graphic parameters from ROM, stores them in r1-r6,
; changes the DC and calls the blit function with the parameters
;
; modifies: r1-r6, Q, DC

blitGraphic:
; load six bytes from the parameters into r0-r5
lisu 0
lisl 1
.blitGraphicGetParms:
lm
lr I, A ; store byte and increase ISAR
br7 .blitGraphicGetParms ; not finished with the registers, loop

; load the graphics address
lm
lr QU, A ; storea data address in Q, one byte at the time
lm
lr QL, A
lr DC, Q ; copy Q into DC0

; continue with the blit function

;---------------;
; Blit Function ;
;---------------;

; this function blits a graphic based on parameters set in r1-r6,
; and the graphic data pointed to by DC0, onto the screen
; originally from cart 26, modified and annotated
;
; modifies: r1-r9, DC

; register reference:
; -------------------
; r1 = color 0 (off) (alias: clear/bkg/blue/red/green)
; r2 = color 1 (on) (alias: clear/bkg/blue/red/green)
; r3 = x position
; r4 = y position
; r5 = width
; r6 = height (and vertical counter)
;
; r7 = horizontal counter
; r8 = graphics byte
; r9 = bit counter
;
; DC = pointer to graphics
;------------------------
; Valid colors
;------------------------
; green = $00 (%00000000)
; red = $40 (%01000000)
; blue = $80 (%10000000)
; bkg = $C0 (%11000000)
;------------------------

blit:
lis 1
lr 9, A ; load #1 into r9 so it'll be reset when we start
lr A, 4 ; load the y offset
com ; invert it
.blitRow:
outs 5 ; load accumulator into port 5 (row)

; check vertical counter
ds 6 ; decrease r6 (vertical counter)
bnc .blitExit ; if it rolls over exit

; load the width into the horizontal counter
lr A, 5
lr 7, A

lr A, 3 ; load the x position
com ; complement it
.blitColumn:
outs 4 ; use the accumulator as our initial column
; check to see if this byte is finished
ds 9 ; decrease r9 (bit counter)
bnz .blitDrawBit ; if we aren't done with this byte, branch

.blitGetByte:
; get the next graphics byte and set related registers
lis 8
lr 9, A ; load #8 into r9 (bit counter)
lm
lr 8, A ; load a graphics byte into r8

.blitDrawBit:
; shift graphics byte
lr A, 8 ; load r8 (graphics byte)
as 8 ; shift left one (with carry)
lr 8, A ; save it

; check color to use
lr A, 2 ; load color 1
bc .blitSavePixel ; if this bit is on, draw the color
lr A, 1 ; load color 2
.blitSavePixel:
inc
bc .blitCheckColumn ; branch if the color is "clear"
outs 1 ; output A in p1 (color)

blit.transferData:
lis 6 ; transfer the pixel data
sl 4
outs 0
sl 1
outs 0

lis 4
blit.savePixelDelay:
ai $ff
bnz blit.savePixelDelay

.blitCheckColumn:
ds 7 ; decrease r7 (horizontal counter)
bz .blitCheckRow ; if it's 0, branch

ins 4 ; get p4 (column)
ai $ff ; add 1 (complemented)
br .blitColumn ; branch

.blitCheckRow:
ins 5 ; get p5 (row)
ai $ff ; add 1 (complemented)
br .blitRow ; branch

.blitExit:
; return from the subroutine
pop

</pre>

To call the above functions, you should use:

<pre>
dci graphic.parameters ; address of parameters
pi blitGraphic
</pre>

for '''blitGraphic''', and

<pre>
; when parameters have been loaded into r1-r6 beforehand
dci graphic.data ; address of graphic data
pi blit
</pre>

for '''blit'''. If you're using parameters stored in ROM, they should be in this order:

<pre>
graphic.parameters:
.byte bkg ; color 0
.byte blue ; color 1
.byte 4 ; x position
.byte 18 ; y position
.byte $60 ; width
.byte $13 ; height
.word graphic.data ; address for the graphics
</pre>

== See Also ==
* [[Snippet:Multiblit|Multiblit Subroutine]]

F8tool

2026-06-26T22:39:04Z

E5frog:

F8tool is an assembler AND disassembler to assemble your code into a binary file and to make binary files understandable by translating it into rudimentary assembler again.

The disassembly attempts to mask out data areas if using the -s argument.

Here are the instructions to run it: 

'''"f8tool asm file.asm file.bin" will compile file.asm and give you file.bin.'''

'''"f8tool dis file.bin 2048 > file.asm" will disassemble file.bin giving you
file.asm starting at address $0800.'''

'''"f8tool dis file.bin 2048 > file.asm -s" will disassemble file.bin and attempt
to mask out the data areas.'''

'''You can also use hex notation 0x0800 instead of 2048 - should you want to.'''

[https://channelf.se/veswiki/images/f/f7/F8TOOL_2.0.zip F8 Tool package including source code (.zip, 358KiB)]

F8tool was written by [[Peter Trauner]], who also wrote [[Homebrew:Tetris|Tetris]] for the Channel F.

F8tool

2026-06-26T22:35:54Z

E5frog:

F8tool is an assembler AND disassembler to assemble your code into a binary file and to make binary files understandable by translating it into rudimentary assembler again.

The disassembly does mask out data areas, maybe not all but some.

Here are the instructions to run it: 

"f8tool asm file.asm file.bin" will compile file.asm and give you file.bin.

"f8tool dis file.bin 2048 > file.asm" will disassemble file.bin giving you
file.asm starting at address $0800.

"f8tool dis file.bin 2048 > file.asm -s" will disassemble file.bin and attempt
to mask out the data areas.

You can also use hex notation 0x0800 instead of 2048 - should you want to.

[https://channelf.se/veswiki/images/f/f7/F8TOOL_2.0.zip F8 Tool package including source code (.zip, 358KiB)]

F8tool was written by [[Peter Trauner]], who also wrote [[Homebrew:Tetris|Tetris]] for the Channel F.

File:F8TOOL 2.0.zip

2026-06-26T22:34:53Z

E5frog: F8tool by Peter Trauner, disassemble and assemble Fairchild F8 assembly code.

F8tool by Peter Trauner, disassemble and assemble Fairchild F8 assembly code.

F8tool

2026-06-26T22:31:08Z

E5frog:

F8tool is an assembler AND disassembler to assemble your code into a binary file and to make binary files understandable by translating it into rudimentary assembler again.

The disassembly does mask out data areas, maybe not all but some.

Here are the instructions to run it: 

"f8tool asm file.asm file.bin" will compile file.asm and give you file.bin.

"f8tool dis file.bin 2048 > file.asm" will disassemble file.bin giving you
file.asm starting at address $0800.

"f8tool dis file.bin 2048 > file.asm -s" will disassemble file.bin and attempt
to mask out the data areas.

You can also use hex notation 0x0800 instead of 2048 - should you want to.

[https://channelf.se/files/channelf/f8tool.zip F8 Tool package including source code (.zip, 221kB)]

F8tool was written by [[Peter Trauner]], who also wrote [[Homebrew:Tetris|Tetris]] for the Channel F.

Main Page

2026-06-21T13:01:13Z

E5frog: /* Snippets */

Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__

<div id="col1" style="width: 30%; float: right">
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">
== Channel F Information ==
'''Hardware'''
* [[Schematics]]
* [[Pinouts]]
* [[Resolution]]
* [[Register]]s
* [[F8]]
* [[ROMC|ROMC explained]]
* [[RAM]]
* [[VRAM]]
* [[Port|Ports]]
* [[Modding]]
'''Programming:'''
* [[Opcode]]s
* [[DASM|DASM compiler]]
* [[Accessing VRAM|Draw graphics]]
* [[Reading Controllers|Reading Controller and Buttons]]
* [[Outputting Sound]]
* [[Subtraction]]
* [[Binary coded decimal]]
* [[Subroutines]]
* [[Ves.h]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Snippets ==
* [[Snippet:Blit|Draw in two colors]]
* [[Snippet:Multiblit|Draw in all colors]]
* [[Snippet:Plot|Draw just one dot]]
* [[Snippet:Score|Keep track of score]]
* [[Snippet:Playsong|Make sweet monophonic music]]
** [[Snippet:Music_60.h|Music_60.h]]
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Homebrews ==
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner
* [[Homebrew:Music|Homebrew Music]]
* [[Homebrew:CCtro|256 Byte intro]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Tools ==
* [[DASM]]
* [[f8tool|F8tool]]
* [[Graphics converter]]
** [[For full screen]]
* [[Videocart dumper]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Disassemblies ==
* [[Disassembly:Bios|Channel F Bios]]
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - Mühle, usw]]
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]
* [[Disassembly:Democart|Democart]]
* [[Disassembly:Democart 2|Democart 2]]
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]

</div>
</div>

<div id="col2" style="width: 69%; float: left">

== Contribute! ==

The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).

== Getting Started ==

If you'd like to get started programming games for the Channel F, try downloading the [https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. It has been tested (and is working) on Windows XP Home SP3. 
Here's a tutorial that might be helpful:
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]
 Read up on the guides and have fun! 

== Useful external links ==
(all links working June 21st 2020)

* [http://www.freelists.org/list/channelf Channel F Programming List]
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]

== Information in pdf:s ==

Here are complete Guides in pdf format on how to program a F8 processor system: 
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)] 
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)] 

[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]

These are a few shorter pdf:s with information on the F8 system and its circuits: 
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]
 
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] 

[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)] 
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)] 
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)] 
 
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]

Main Page

2026-06-21T12:58:17Z

E5frog: /* Snippets */

Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__

<div id="col1" style="width: 30%; float: right">
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">
== Channel F Information ==
'''Hardware'''
* [[Schematics]]
* [[Pinouts]]
* [[Resolution]]
* [[Register]]s
* [[F8]]
* [[ROMC|ROMC explained]]
* [[RAM]]
* [[VRAM]]
* [[Port|Ports]]
* [[Modding]]
'''Programming:'''
* [[Opcode]]s
* [[DASM|DASM compiler]]
* [[Accessing VRAM|Draw graphics]]
* [[Reading Controllers|Reading Controller and Buttons]]
* [[Outputting Sound]]
* [[Subtraction]]
* [[Binary coded decimal]]
* [[Subroutines]]
* [[Ves.h]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Snippets ==
* [[Snippet:Blit|Draw in two colors]]
* [[Snippet:Multiblit|Draw in all colors]]
* [[Snippet:Plot|Plot subroutine]]
* [[Snippet:Playsong|Playsong subroutine]]
* [[Snippet:Score|Score subroutine]]
** [[Snippet:Music_60.h|Music_60.h]]
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Homebrews ==
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner
* [[Homebrew:Music|Homebrew Music]]
* [[Homebrew:CCtro|256 Byte intro]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Tools ==
* [[DASM]]
* [[f8tool|F8tool]]
* [[Graphics converter]]
** [[For full screen]]
* [[Videocart dumper]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Disassemblies ==
* [[Disassembly:Bios|Channel F Bios]]
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - Mühle, usw]]
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]
* [[Disassembly:Democart|Democart]]
* [[Disassembly:Democart 2|Democart 2]]
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]

</div>
</div>

<div id="col2" style="width: 69%; float: left">

== Contribute! ==

The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).

== Getting Started ==

If you'd like to get started programming games for the Channel F, try downloading the [https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. It has been tested (and is working) on Windows XP Home SP3. 
Here's a tutorial that might be helpful:
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]
 Read up on the guides and have fun! 

== Useful external links ==
(all links working June 21st 2020)

* [http://www.freelists.org/list/channelf Channel F Programming List]
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]

== Information in pdf:s ==

Here are complete Guides in pdf format on how to program a F8 processor system: 
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)] 
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)] 

[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]

These are a few shorter pdf:s with information on the F8 system and its circuits: 
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]
 
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] 

[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)] 
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)] 
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)] 
 
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]

Snippet:Blit

2026-06-21T12:57:33Z

E5frog:

The '''blit''' subroutine reads a two-color (1 bit per pixel) block of graphics data from ROM and displays it on the screen, using several parameters. It works much in the same way as the BIOS drawchar routine except for arbitrarily sized data. The code was originally taken from [[Disassembly:Videocart_26|Videocart 26]] and adapted to be more flexible and reusable.

The routine is separated into two parts, '''blitGraphic''' and '''blit'''. '''blit''' takes parameters in registers r1-r6, and retrieves graphics data from the location DC0 points to. It can be called independently of '''blitGraphic'''. '''blitGraphic''' takes hard-coded parameters from ROM at the address pointed at by DC0 and then calls the '''blit''' routine. When the parameters do not need to be dynamic, storing the parameters in ROM and calling the '''blitGraphic''' routine directly can be more efficient than writing them to the registers and calling '''blit'''.

Note that coordinate (0,0) is usually outside the visible emulation area, in MESS/MESSUI/MAME visible area starts at (4,4).

Code works with the '''DASM''' compiler.

'''Tip:''' If you want a block in one color, set both colors the same and skip setting the data pointer (DC0).

<pre>
;===========;
; Blit Code ;
;===========;

;--------------;
; Blit Graphic ;
;--------------;

; takes graphic parameters from ROM, stores them in r1-r6,
; changes the DC and calls the blit function with the parameters
;
; modifies: r1-r6, Q, DC

blitGraphic:
; load six bytes from the parameters into r0-r5
lisu 0
lisl 1
.blitGraphicGetParms:
lm
lr I, A ; store byte and increase ISAR
br7 .blitGraphicGetParms ; not finished with the registers, loop

; load the graphics address
lm
lr QU, A ; storea data address in Q, one byte at the time
lm
lr QL, A
lr DC, Q ; copy Q into DC0

; continue with the blit function

;---------------;
; Blit Function ;
;---------------;

; this function blits a graphic based on parameters set in r1-r6,
; and the graphic data pointed to by DC0, onto the screen
; originally from cart 26, modified and annotated
;
; modifies: r1-r9, DC

; register reference:
; -------------------
; r1 = color 0 (off) (alias: clear/bkg/blue/red/green)
; r2 = color 1 (on) (alias: clear/bkg/blue/red/green)
; r3 = x position
; r4 = y position
; r5 = width
; r6 = height (and vertical counter)
;
; r7 = horizontal counter
; r8 = graphics byte
; r9 = bit counter
;
; DC = pointer to graphics

blit:
lis 1
lr 9, A ; load #1 into r9 so it'll be reset when we start
lr A, 4 ; load the y offset
com ; invert it
.blitRow:
outs 5 ; load accumulator into port 5 (row)

; check vertical counter
ds 6 ; decrease r6 (vertical counter)
bnc .blitExit ; if it rolls over exit

; load the width into the horizontal counter
lr A, 5
lr 7, A

lr A, 3 ; load the x position
com ; complement it
.blitColumn:
outs 4 ; use the accumulator as our initial column
; check to see if this byte is finished
ds 9 ; decrease r9 (bit counter)
bnz .blitDrawBit ; if we aren't done with this byte, branch

.blitGetByte:
; get the next graphics byte and set related registers
lis 8
lr 9, A ; load #8 into r9 (bit counter)
lm
lr 8, A ; load a graphics byte into r8

.blitDrawBit:
; shift graphics byte
lr A, 8 ; load r8 (graphics byte)
as 8 ; shift left one (with carry)
lr 8, A ; save it

; check color to use
lr A, 2 ; load color 1
bc .blitSavePixel ; if this bit is on, draw the color
lr A, 1 ; load color 2
.blitSavePixel:
inc
bc .blitCheckColumn ; branch if the color is "clear"
outs 1 ; output A in p1 (color)

blit.transferData:
lis 6 ; transfer the pixel data
sl 4
outs 0
sl 1
outs 0

lis 4
blit.savePixelDelay:
ai $ff
bnz blit.savePixelDelay

.blitCheckColumn:
ds 7 ; decrease r7 (horizontal counter)
bz .blitCheckRow ; if it's 0, branch

ins 4 ; get p4 (column)
ai $ff ; add 1 (complemented)
br .blitColumn ; branch

.blitCheckRow:
ins 5 ; get p5 (row)
ai $ff ; add 1 (complemented)
br .blitRow ; branch

.blitExit:
; return from the subroutine
pop

</pre>

To call the above functions, you should use:

<pre>
dci graphic.parameters ; address of parameters
pi blitGraphic
</pre>

for '''blitGraphic''', and

<pre>
; when parameters have been loaded into r1-r6 beforehand
dci graphic.data ; address of graphic data
pi blit
</pre>

for '''blit'''. If you're using parameters stored in ROM, they should be in this order:

<pre>
graphic.parameters:
.byte bkg ; color 0
.byte blue ; color 1
.byte 4 ; x position
.byte 18 ; y position
.byte $60 ; width
.byte $13 ; height
.word graphic.data ; address for the graphics
</pre>

== See Also ==
* [[Snippet:Multiblit|Multiblit Subroutine]]

Main Page

2026-06-21T12:55:20Z

E5frog: /* Channel F Information */

Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__

<div id="col1" style="width: 30%; float: right">
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">
== Channel F Information ==
'''Hardware'''
* [[Schematics]]
* [[Pinouts]]
* [[Resolution]]
* [[Register]]s
* [[F8]]
* [[ROMC|ROMC explained]]
* [[RAM]]
* [[VRAM]]
* [[Port|Ports]]
* [[Modding]]
'''Programming:'''
* [[Opcode]]s
* [[DASM|DASM compiler]]
* [[Accessing VRAM|Draw graphics]]
* [[Reading Controllers|Reading Controller and Buttons]]
* [[Outputting Sound]]
* [[Subtraction]]
* [[Binary coded decimal]]
* [[Subroutines]]
* [[Ves.h]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Snippets ==
* [[Snippet:Blit|Blit subroutine]]
* [[Snippet:Multiblit|Multiblit subroutine]]
* [[Snippet:Plot|Plot subroutine]]
* [[Snippet:Playsong|Playsong subroutine]]
* [[Snippet:Score|Score subroutine]]
** [[Snippet:Music_60.h|Music_60.h]]
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Homebrews ==
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner
* [[Homebrew:Music|Homebrew Music]]
* [[Homebrew:CCtro|256 Byte intro]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Tools ==
* [[DASM]]
* [[f8tool|F8tool]]
* [[Graphics converter]]
** [[For full screen]]
* [[Videocart dumper]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Disassemblies ==
* [[Disassembly:Bios|Channel F Bios]]
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - Mühle, usw]]
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]
* [[Disassembly:Democart|Democart]]
* [[Disassembly:Democart 2|Democart 2]]
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]

</div>
</div>

<div id="col2" style="width: 69%; float: left">

== Contribute! ==

The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).

== Getting Started ==

If you'd like to get started programming games for the Channel F, try downloading the [https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. It has been tested (and is working) on Windows XP Home SP3. 
Here's a tutorial that might be helpful:
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]
 Read up on the guides and have fun! 

== Useful external links ==
(all links working June 21st 2020)

* [http://www.freelists.org/list/channelf Channel F Programming List]
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]

== Information in pdf:s ==

Here are complete Guides in pdf format on how to program a F8 processor system: 
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)] 
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)] 

[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]

These are a few shorter pdf:s with information on the F8 system and its circuits: 
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]
 
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] 

[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)] 
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)] 
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)] 
 
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]

Main Page

2026-06-21T12:54:45Z

E5frog: /* Channel F Information */

Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__

<div id="col1" style="width: 30%; float: right">
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">
== Channel F Information ==
'''Hardware'''
* [[Schematics]]
* [[Pinouts]]
* [[Resolution]]
* [[Register]]s
* [[F8]]
* [[ROMC|ROMC explained]]
* [[RAM]]
* [[VRAM]]
* [[Port|Ports]]
* [[Modding]]
'''Programming:'''
* [[Opcode]]s
* [[DASM|DASM compiler]]
* [[Accessing VRAM]]
* [[Reading Controllers|Reading Controller and Buttons]]
* [[Outputting Sound]]
* [[Subtraction]]
* [[Binary coded decimal]]
* [[Subroutines]]
* [[Ves.h]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Snippets ==
* [[Snippet:Blit|Blit subroutine]]
* [[Snippet:Multiblit|Multiblit subroutine]]
* [[Snippet:Plot|Plot subroutine]]
* [[Snippet:Playsong|Playsong subroutine]]
* [[Snippet:Score|Score subroutine]]
** [[Snippet:Music_60.h|Music_60.h]]
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Homebrews ==
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner
* [[Homebrew:Music|Homebrew Music]]
* [[Homebrew:CCtro|256 Byte intro]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Tools ==
* [[DASM]]
* [[f8tool|F8tool]]
* [[Graphics converter]]
** [[For full screen]]
* [[Videocart dumper]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Disassemblies ==
* [[Disassembly:Bios|Channel F Bios]]
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - Mühle, usw]]
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]
* [[Disassembly:Democart|Democart]]
* [[Disassembly:Democart 2|Democart 2]]
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]

</div>
</div>

<div id="col2" style="width: 69%; float: left">

== Contribute! ==

The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).

== Getting Started ==

If you'd like to get started programming games for the Channel F, try downloading the [https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. It has been tested (and is working) on Windows XP Home SP3. 
Here's a tutorial that might be helpful:
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]
 Read up on the guides and have fun! 

== Useful external links ==
(all links working June 21st 2020)

* [http://www.freelists.org/list/channelf Channel F Programming List]
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]

== Information in pdf:s ==

Here are complete Guides in pdf format on how to program a F8 processor system: 
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)] 
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)] 

[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]

These are a few shorter pdf:s with information on the F8 system and its circuits: 
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]
 
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] 

[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)] 
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)] 
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)] 
 
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]

Main Page

2026-06-21T12:54:23Z

E5frog: /* Channel F Information */

Welcome to the [[Channel F|VES]] wiki! Here you can find out user-donated information on all sorts of programming info for the Channel F. __NOTOC__

<div id="col1" style="width: 30%; float: right">
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">
== Channel F Information ==
'''Hardware'''
* [[Schematics]]
* [[Pinouts]]
* [[Resolution]]
* [[Register]]s
* [[F8]]
* [[ROMC|ROMC explained]]
* [[RAM]]
* [[VRAM]]
* [[Port|Ports]]
* [[Modding]]
'''Programming:'''
* [[Opcode]]s
* [[Accessing VRAM]]
* [[Reading Controllers|Reading Controller and Buttons]]
* [[Outputting Sound]]
* [[Subtraction]]
* [[Binary coded decimal]]
* [[Subroutines]]
* [[Ves.h]]
* [[DASM|DASM compiler]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Snippets ==
* [[Snippet:Blit|Blit subroutine]]
* [[Snippet:Multiblit|Multiblit subroutine]]
* [[Snippet:Plot|Plot subroutine]]
* [[Snippet:Playsong|Playsong subroutine]]
* [[Snippet:Score|Score subroutine]]
** [[Snippet:Music_60.h|Music_60.h]]
* [[Snippet:Pseudorandom numbers|Pseudorandom numbers]]
</div>
<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Homebrews ==
* [[Homebrew:Cannibal Slug Battle|Cannibal Slug Battle]] by [[User:E5frog|e5frog]]
* [[Homebrew:F8 of Nations|F8 of Nations]] by Nycurt
* [[Homebrew:Fullscreenpicture|Full screen picture]] by [[User:E5frog|e5frog]]
* [[Homebrew:International Karate|International Karate]] by [[User:E5frog|e5frog]]
* [[Homebrew:Lights Out|Lights Out]] by Sean Riddle
* [[Homebrew:Multi-Cart Menu|Multi-Cart Menu]] by Sean Riddle and [[User:E5frog|e5frog]]
* [[Homebrew:Pac-Man|Pac-Man]] by Blackbird and [[User:E5frog|e5frog]]
* [[Homebrew:RAM test|RAM test]] by [[User:E5frog|e5frog]]
* [[Homebrew:Scrolling Mountains|Scrolling Mountains]] by Curtdawg
* [[Homebrew:Test Controls|Test Controls]] by [[User:E5frog|e5frog]]
* [[Homebrew:Tetris|Tetris for 1 or 2 players]] by Peter Trauner
* [[Homebrew:Music|Homebrew Music]]
* [[Homebrew:CCtro|256 Byte intro]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Tools ==
* [[DASM]]
* [[f8tool|F8tool]]
* [[Graphics converter]]
** [[For full screen]]
* [[Videocart dumper]]
</div>

<div style="border: 1px solid #666; padding: 5px; margin: 5px 0; background: #FFE;">

== Disassemblies ==
* [[Disassembly:Bios|Channel F Bios]]
* [[Disassembly:Videocart 1|Videocart 1 - Tic-Tac-Toe, etc]]
* [[Disassembly:Videocart 2|Videocart 2 - Desert Fox, etc]]
* [[Disassembly:Videocart 3|Videocart 3 - Video Blackjack]]
* [[Disassembly:Videocart 4|Videocart 4 - Spitfire]]
* [[Disassembly:Videocart 5|Videocart 5 - Space War]]
* [[Disassembly:Videocart 6|Videocart 6 - Math Quiz]]
* [[Disassembly:Videocart 7|Videocart 7 - Math Quiz II]]
* [[Disassembly:Videocart 8|Videocart 8 - Magic Numbers, etc]]
* [[Disassembly:Videocart 9|Videocart 9 - Drag Race]]
* [[Disassembly:Videocart 10|Videocart 10 - Maze]]
* [[Disassembly:Videocart 10b|Videocart 10b - Maze, code variation]]
* [[Disassembly:Videocart 11|Videocart 11 - Backgammon, etc]]
* [[Disassembly:Videocart 12|Videocart 12 - Baseball]]
* [[Disassembly:Videocart 13|Videocart 13 - Robot War, etc]]
* [[Disassembly:Videocart 14|Videocart 14 - Sonar Search]]
* [[Disassembly:Videocart 15|Videocart 15 - Memory Match]]
* [[Disassembly:Videocart 16|Videocart 16 - Dodge' It]]
* [[Disassembly:Videocart 17|Videocart 17 - Pinball Challenge]]
* [[Disassembly:Videocart 17b|Videocart 17b - Pinball code variation]]
* [[Disassembly:Videocart 18|Videocart 18 - Hangman]]
* [[Disassembly:Videocart 19|Videocart 19 - Checkers]]
* [[Disassembly:Videocart 20|Videocart 20 - Video Whizball]]
* [[Disassembly:Videocart 21|Videocart 21 - Bowling]]
* [[Disassembly:Videocart 22|Videocart 22 - Slot Machine]]
* [[Disassembly:Videocart 22b|Videocart 22b - Alt. Slot Machine]]
* [[Disassembly:Videocart 23|Videocart 23 - Galactic Space Wars]]
* [[Disassembly:Videocart 24|Videocart 24 - Pro Football]]
* [[Disassembly:Videocart 25|Videocart 25 - Casino Poker]]
* [[Disassembly:Videocart 26|Videocart 26 - Alien Invasion]]
* [[Disassembly:SABA Videoplay 1|SABA Videoplay 1 - Mühle, usw]]
* [[Disassembly:SABA Videoplay 16|SABA Videoplay 16 - Rat' mal]]
* [[Disassembly:SABA Videoplay 20|SABA Videoplay 20 - Schach]]
* [[Disassembly:Democart|Democart]]
* [[Disassembly:Democart 2|Democart 2]]
* [[Disassembly:Werbetextcassette electronic partner|Werbetextcassette electronic partner]]

</div>
</div>

<div id="col2" style="width: 69%; float: left">

== Contribute! ==

The VESWiki was set up as a repository for information related to the VES and VES programming. Some of the many things we'd like to make available are disassemblies, console or technical information, tutorials and guides for both software and hardware, code snippets, and complete games. We encourage you to add any information you have, or to make a page promoting your own game (which you can host here, if you like).

== Getting Started ==

If you'd like to get started programming games for the Channel F, try downloading the [https://channelf.se/veswiki/images/9/99/Devel.7z Development Pack (.7z, 2.8 MB)]. It includes the DASM assembler, the MESS emulator and an early version of Pac-Man as a sample game that you can edit, compile and test. Just unpack it, preferably directly on root of your hard drive and doubleclick '''..\devel\games\pacman\!compile+run.bat''' or the '''!run.bat''' in the same directory and it should start right up. Press Esc to leave the debugger. It has been tested (and is working) on Windows XP Home SP3. 
Here's a tutorial that might be helpful:
[[Tutorial:Beginner%27s_Guide_to_the_Channel_F | Beginner's guide to the Channel F]]
 Read up on the guides and have fun! 

== Useful external links ==
(all links working June 21st 2020)

* [http://www.freelists.org/list/channelf Channel F Programming List]
* [http://seanriddle.com/chanf.html Sean Riddle's Channel F Info]
* [http://seanriddle.com/chanfmulti.html Sean Riddle's Channel F Multicart]
* [http://seanriddle.com/chanfinfo.html Sean Riddle's Channel F Programming Info]
* [http://www.nyx.net/~lturner/public_html/Fairchild_F8.html Lowell O. Turner's Home Page- Fairchild F8 Info]
* [http://www.nyx.net/~lturner/public_html/F8_ins.html Lowell O. Turner's Home Page- Fairchild F8 Instruction Set]

== Information in pdf:s ==

Here are complete Guides in pdf format on how to program a F8 processor system: 
[https://channelf.se/files/channelf/F8_Guide_to_Programming.pdf F8 Guide to Programming (.pdf, 7.57 MB)] 
[https://channelf.se/files/channelf/F8_Guide_to_Programming_old.pdf F8 Guide to Programming b/w(.pdf, 3.42 MB)] 

[https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf F8 User's Guide (1976)(Fairchild) (.pdf, 13.8 MB)]

These are a few shorter pdf:s with information on the F8 system and its circuits: 
[https://channelf.se/files/channelf/f8_general_info.pdf F8 general info (.pdf, 146kB)]
 
[https://channelf.se/files/channelf/f3850.pdf F3850 the CPU (.pdf, 1.49MB)] 

[https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8 info by Terry Polhoff (.pdf, 698kB)] 
[https://channelf.se/files/channelf/f3851_56.pdf F3851+56 Program Storage Unit (.pdf, 1.5MB)] 
[https://channelf.se/files/channelf/f3852_53.pdf F3852+53 Dynamic and Static Memory Interface (.pdf, 720kB)] 
 
[https://channelf.se/veswiki/images/1/1d/Fairchild_Service_Manual.pdf Service manual, Repair information (.pdf, 409kB)]

DASM

2026-06-21T12:53:08Z

E5frog:

DASM is a versatile macro assembler with support for several 8-bit microprocessors including Fairchild F8, MOS 6502 & 6507, Motorola 6803, 68705 & 68HC11 and Hitachi HD6303. 
[https://dasm-assembler.github.io/ Check here for latest official version]

As DASM is an assembler for many processors you need to add the line "{tab}processor f8" as the first line to use it with the F8 System (don't write {tab} but insert a tab sign there, space/s will work as well).
DASM is run from a command line unless you make a .bat file to simplify assembly and reassembly during a programming project (recommended).
Easiest assembly of a F8-program called ''game.asm'' would be this:
<pre>
dasm game.asm -f3 -output.bin
</pre>
-f3 means it outputs raw data with no load address first.
If you have problems with assembly errors then the option -L can be useful in order to find the reason.
<pre>
dasm game.asm -f3 -output.bin -Lname-of-list.txt
</pre>
You can then check the ''name-of-list.txt'' for the exact problem.
 
 
Local copies: 
[https://channelf.se/veswiki/images/4/40/Dasm-2.20.11.7z DASM 2.20.11 (.7z, 116kB)] 
[https://channelf.se/veswiki/images/1/10/Dasm-2.20.14.1-win-x64.zip DASM 2.20.14.1-win-x64 with manual (zip, 552kB)]

Copy of the DASM documentation:
<pre>
Commandline for processor F8, f3 removes 2 byte header and -o sets the name of output:

>> dasm name_of_file.asm -f3 -oFile_out.bin

DOCUMENTATION FOR DASM, a high level macro cross assembler for:

-6502 (and 6507)
-68705
-6803
-HD6303 (extension of 6803)
-68HC11

DASM was created in 1988 by Matthew Dillon (dillon@apollo.backplane.com)
and modified in 1995 by Olaf 'Rhialto' Seibert (rhialto@polderland.nl), and
is now updated and maintained by Andrew Davie (atari2600@taswegian.com)

DASM's homepage is http://www.atari2600.org/dasm

DASM is freely re-distributable, and provided with full source-code to
allow recompilation for other target-platforms.

PREFACE FROM MATT:

Over the last year my work has included writing software to drive small
single-chip microcomputers for various things (remote telemetry units,
for instance). I have had need to program quite a few different
processors over that time.

At the beginning, I used an awful macro assembler running on an IBM-PC.
I *really* wanted to do it on my Amiga. Thus the writing of this
program.

Feel free to suggest other similar processors for me to add to the list!
The processor type is specified with a pseudo-op (see below). This
assembler produces only binary output in one of three formats described
below. In general, one has a master assembly file which INCLUDEs all
the modules.

Also provided is FTOHEX which converts an output file in one of the
three formats to an intel-hex format suitable for many intelligent
prom programmers (I have a GTEK).

YES it's packed with features!

FEATURES:

-fast assembly
-supports several common 8 bit processor models (NOT 8086, thank god!)
-takes as many passes as needed
-automatic checksum generation, special symbol '...'
-several binary output formats available. Format 2 allows reverse
indexed origins.
-multiple segments, BSS segments (no generation), relocatable origin.
-expressions, as in C but [] is used instead of () for parenthesis.
(all expressions are computed with 32 bit integers)
-no real limitation on label size, label values are 32 bits.
-complex pseudo ops, repeat loops, macros, etc....

PREFACE FROM ANDREW (APRIL/2003)

The documentation is lagging a bit behind the modifications. Essentially
the information contained herein is correct, but there have been minor
changes to the formatting of output data.

Please see the accompanying ‘README.TXT’ in the distributable root directory
for a list of recent changes to the package.

COMMAND LINE:

dasm srcfile [options]

options: -f# select output format 1-3 (default 1, see below)
-oname select output file name (else a.out)
-lname select list file name (else none generated)
-Lname list file, containing all passes
-sname select symbol dump file (else none generated)
-v# select verboseness 0-4 (default 0, see below)
-d debug mode
-DSYMBOL predefine a symbol, set to 0
-DSYMBOL=EXPRESSION predefine a symbol, set to exp
-MSYMBOL=EXPRESSION define label as in EQM (same as –D)

-Idir search directory for include and incbin
-p# max number of passes
-P# max number of passes, with less checks

-T# sort symbol table by (0 = alphabetic (default)
or (non-zero= address/value)

Example: dasm master.asm -f2 -oout -llist -v3 -DVER=4

Note: A slash (/) or dash (-) must prefix options.

Return Value:

The assembler will return 0 on successful compilation, 1 otherwise.

FORMAT OPTIONS:

1 (DEFAULT)

The output file contains a two byte origin in LSB,MSB order, then
data until the end of the file.

Restrictions: Any instructions which generate output (within an
initialized segment) must do so with an ascending PC. Initialized
segments must occur in ascending order.

2 RAS (Random Access Segment)

The output file contains one or more hunks. Each hunk consists
of a 2 byte origin (LSB,MSB), 2 byte length (LSB,MSB), and that
number of data bytes. The hunks occur in the same order as
initialized segments in the assembly. There are no restrictions
to segment ordering (i.e. reverse indexed ORG statements are
allowed). The next hunk begins after the previous hunk's data,
until the end of the file.

3 RAW (Raw)

The output file contains data only (format #1 without the 2 byte
header). Restrictions are the same as for format #1.

Format 3 RAW (Raw format)
Same as format 1, but NO header origin is generated. You get
nothing but data.

VERBOSE OPTIONS:

0 (default)

Only warnings and errors are generated

1
-Segment list information generated after each pass
-Include file names are displayed
-statistics on why the assembler is going to make another pass
R1,R2 reason code: R3
where R1 is the number of times the assembler encountered
something requiring another pass to resolve. R2 is the
number of references to unknown symbols which occured in the
pass (but only R1 determines the need for another pass). R3
is a BITMASK of the reasons why another pass is required.
See the end of this document for bit designations.

2
mismatches between program labels and equates are displayed
on every pass (usually none occur in the first pass unless you
have re-declared a symbol name).

displayed information for symbols:
???? = unknown value
str = symbol is a string
eqm = symbol is an eqm macro
(r) = symbol has been referenced
(s) = symbol created with SET or EQM pseudo-op

3
Unresolved and unreferenced symbols are displayed every pass
(unsorted, sorry)

4
An entire symbol list is displayed every pass to STDOUT.
(unsorted, sorry)

PROCESSOR MODEL:

The processor model is chosen with the PROCESSOR pseudo-op and should
be the first thing you do in your assembly file. Different processor
models use different integer formats (see below). The word order does
not effect the headers in the output files (-f1 and -f2), which are
always LSB,MSB. The word ordering effects all address, word, and
long generation.

Only one PROCESSOR pseudo-op may be declared in the entire assembly,
and should be the first thing encountered.

-6502 LSB,MSB
-68HC11 MSB,LSB
-68705 MSB,LSB
-6803 MSB,LSB
-HD6303 MSB,LSB
-F8 ?

SEGMENTS:
The SEG pseudo-op creates/sets the current segment. Each segment has
it's own origin and is optionally an 'uninitialized' segment.
Unitialized segments produce no output and have no restrictions. This
is useful for determining the size of a certain assembly sequence
without generating code, and for assigning RAM to labels.

'Initialized' segments produce output. The following should be
considered when generating roms:

(1) The default fill character when using ORG (and format 1 or 3) to
skip forward is 00. This is a GLOBAL default and effects all
segments. See ORG.

(2) The default fill character for DS is 00 and is independant of
the default fill character for ORG (see DS).

GENERAL:
Most everything is recursive. You cannot have a macro DEFINITION
within a macro definition, but can nest macro calls, repeat loops,
and include files.

The other major feature in this assembler is the SUBROUTINE pseudo-op,
which logically separates local labels (starting with a dot). This
allows you to reuse label names (for example, .1 .fail) rather than
think up crazy combinations of the current subroutine to keep it all
unique.

Almost nothing need be resolved in pass 1. The assembler will make
multiple passes in an attempt to resolve the assembly (including just
one pass if everything is resolved immediately).

PSEUDOPS:

INCLUDE "name"

Include another assembly file.

#if OlafIncbin

[label] INCBIN "name"

Include another file literally in the output.
#endif
#if OlafIncdir

INCDIR "directory name"

Add the given directory name to the list of places where
INCLUDE and INCBIN search their files. First, the names are
tried relative to the current directory, if that fails and
the name is not an absolute pathname, the list is tried.
You can optionally end the name with a /. AmigaDOS filename
conventions imply that two slashes at the
end of an INCDIR (dir//) indicates the parent directory, and
so does an INCLUDE /filename.

The command-line option -Idir is equivalent to an INCDIR
directive placed before the source file.

Currently the list is not cleared between passes, but each
exact directory name is added to the list only once.
This may change in subsequent releases.
#endif
[label] SEG[.U] name

This sets the current segment, creating it if neccessary. If
a .U extension is specified on segment creation, the segment
is an UNINITIALIZED segment. The .U is not needed when going
back to an already created uninitialized segment, though it
makes the code more readable.

[label] DC[.BWL] exp,exp,exp ...

Declare data in the current segment. No output is generated if
within a .U segment. Note that the byte ordering for the
selected processor is used for each entry.

The default size extension is a byte.
#if OlafByte
BYTE, WORD and LONG are synonyms for DC.B, DC.W and DC.L.
#endif

[label] DS[.BWL] exp[,filler]

declare space (default filler is 0). Data is not generated if
within an uninitialized segment. Note that the number of bytes
generated is exp * entrysize (1,2, or 4)

The default size extension is a byte.

Note that the default filler is always 0 (has nothing to do
with the ORG default filler).

[label] DV[.BWL] eqmlabel exp,exp,exp....

This is equivalent to DC, but each exp in the list is passed
through the symbolic expression specified by the EQM label.
The expression is held in a special symbol dotdot '..' on each
call to the EQM label.

See EQM below

[label] HEX hh hh hh..

This sets down raw HEX data. Spaces are optional between bytes.
NO EXPRESSIONS are allowed. Note that you do NOT place a $
in front of the digits. This is a short form for creating
tables compactly. Data is always layed down on a byte-by-byte
basis.

Example: HEX 1A45 45 13254F 3E12

ERR

Abort assembly.

[label] ORG exp[,DefaultFillVal]

This pseudop sets the current origin. You can also set the
global default fill character (a byte value) with this
pseudoop. NOTE that no filler is generated until the first
data-generating opcode/psueoop is encountered after this one.
Sequences like:

org 0,255
org 100,0
org 200
dc 23

will result in 200 zero's and a 23. This allows you to specify
some ORG, then change your mind and specify some other (lower
address) ORG without causing an error (assuming nothing is
generated inbetween).

Normally, DS and ALIGN are used to generate specific filler
values.

[label] RORG exp

This activates the relocatable origin. All generated
addresses, including '.', although physically placed at the
true origin, will use values from the relocatable origin.
While in effect both the physical origin and relocatable origin
are updated.

The relocatable origin can skip around (no limitations). The
relocatable origin is a function of the segment. That is, you
can still SEG to another segment that does not have a
relocatable origin activated, do other (independant) stuff
there, and then switch back to the current segment and continue
where you left off.

PROCESSOR model

do not quote. model is one of: 6502,6803,HD6303,68705,68HC11,F8
Can only be executed once, and should be the first thing
encountered by the assembler.

ECHO exp,exp,exp

The expressions (which may also be strings), are echoed on the
screen and into the list file.

[label] REND

Deactivate the relocatable origin for the current segment.
Generation uses the real origin for reference.

[label] ALIGN N[,fill]

Align the current PC to an N byte boundry. The default
fill character is always 0, and has nothing to do with
the default fill character specifiable in an ORG.

[label] SUBROUTINE name

This isn't really a subroutine, but a boundry between sets of
temporary labels (which begin with a dot). Temporary label
names are unique within segments of code bounded by SUBROUTINE:

CHARLIE subroutine
ldx #10
.1 dex
bne .1
BEN subroutine
ldx #20
.qq dex
bne .qq

Automatic temporary label boundries occur for each macro level.
Usually temporary labels are used in macros and within actual
subroutines (so you don't have to think up a thousand different
names)

symbol EQU exp
#if OlafAsgn
symbol = exp
#endif

The expression is evaluated and the result assigned to the
symbol.

#if OlafDotAssign
If this option is enabled, you can use the common idiom of

. EQU . + 3 (or . = .+3)

in other words, you can assign to "." (or "*" if OlafStar
is also enabled) instead of an ORG or RORG directive.
More formally, a directive of the form ". EQU expr" is
interpreted as if it were written " (R)ORG expr".
The RORG is used if a relocatable origin is already in effect,
otherwise ORG is used. Note that the first example is NOT
equivalent with "DS.B 3" when the rorg is in effect.
#endif

symbol EQM exp

The STRING representing the expression is assigned to the
symbol. Occurances of the label in later expressions causes
the string to be evaluated for each occurance. Also used in
conjuction with the DV psuedo-op.

symbol SET exp

Same as EQU, but the symbol may be reassigned later.

MAC name

Declare a macro. lines between MAC and ENDM are the macro.
You cannot recursively declare a macro. You CAN recursively
use a macro (reference a macro in a macro). No label is
allowed to the left of MAC or ENDM.

Arguments passed to macros are referenced with: {#}. The first
argument passed to a macro would thus be {1}. You should
always use LOCAL labels (.name) inside macros which you use
more than once. {0} represents an EXACT substitution of the
ENTIRE argument line.

ENDM

end of macro def. NO LABEL ALLOWED ON THE LEFT!

MEXIT

Used in conjuction with conditionals. Exits the current macro
level.

[label] IFCONST exp

Is TRUE if the expression result is defined, FALSE otherwise
and NO error is generated if the expression is undefined.

[label] IFNCONST exp

Is TRUE if the expression result is undefined, FALSE otherwise
and NO error is generated if the expression is undefined.

[label] IF exp

Is TRUE if the expression result is defined AND non-zero.
Is FALSE if the expression result is defined AND zero.
Neither IF or ELSE will be executed if the expression result
is undefined. If the expression is undefined, another assembly
pass is automatically taken.
#if OlafPhase
If this happens, phase errors in the next pass only will not
be reported unless the verboseness is 1 or more.
#endif

[label] ELSE

ELSE the current IF.

[label] ENDIF
[label] EIF

Terminate an IF. ENDIF and EIF are equivalent.

[label] REPEAT exp
[label] REPEND

Repeat code between REPEAT/REPEND 'exp' times.

#if DAD
if exp == 0,
the code repeats forever. exp is evaluated once.

If exp == 0, the repeat loop is ignored.
If exp < 0, a warning “REPEAT parameter < 0 (ignored)” is generated
and the repeat loop is ignored.
#endif

Y SET 0
REPEAT 10
X SET 0
REPEAT 10
DC X,Y
X SET X + 1
REPEND
Y SET Y + 1
REPEND

generates an output table: 0,0 1,0 2,0 ... 9,0 0,1 1,1 2,1
... 9,1, etc...

Labels within a REPEAT/REPEND should be temporary labels with a
SUBROUTINE pseudo-op to keep them unique.

The Label to the left of REPEND is assigned AFTER the loop
FINISHES.

[label] XXX[.force] operand

XXX is some mnemonic, not necessarily three characters long.
The .FORCE optional extension is used to force specific
addressing modes (see below).

[label] LIST ON or OFF

Globally turns listing on or off, starting with the current
line.
#if OlafList
When you give LOCALON or LOCALOFF the effect is local to the
current macro or included file. For a line to be listed both
the global and local list switches must be on.
#endif

#if OlafDotop
All pseudo-ops (and incidentally also the mnemonics) can be
prefixed with a . for compatibility with other assemblers.
So .IF is the same as IF. This works only because lone .FORCE
extensions are meaningless.
#endif

#if OlafFreeFormat
The format of each input line is free: first all leading
spaces are discarded, and the first word is examined. If it
does not look like a directive or opcode (as known at that point),
it is taken as a label. This is sort-of nasty if you like labels
with names like END.
The two xxxFormat options are mutually exclusive.
#endif

#if OlafHashFormat
With this option an initial # (after optional initial spaces)
turns the next word into a directive/opcode.
A ^ skips more spaces and makes the next word a label.
#endif

GENERAL:

The label will be set to the current ORG/RORG either before or after
a pseudo-op is executed. Most of the time, the label to the left of a
pseudo-op is the current ORG/RORG. The following pseudo-op's labels are
created AFTER execution of the pseudo-op:

SEG, ORG, RORG, REND, ALIGN

EXTENSIONS:

FORCE extensions are used to force an addressing mode. In some cases,
you can optimize the assembly to take fewer passes by telling it the
addressing mode. Force extensions are also used with DS,DC, and DV
to determine the element size. NOT ALL EXTENSIONS APPLY TO ALL
PROCESSORS!

example: lda.z charlie

i -implied
ind -indirect word
0 -implied
0x -implied indexing (0,x)
0y -implied indexing (0,y)
b -byte address
bx -byte address indexed x
by -byte address indexed y
w -word address
wx -word address indexed x
wy -word address indexed y
l -longword (4 bytes) (DS/DC/DV)
r -relative
u -uninitialized (SEG)

First character equivalent substitutions:

b z d (byte, zeropage, direct)
w e a (word, extended, absolute)

ASSEMBLER PASSES:
The assembler may have to make several passes through the source
code to resolve all generation. The number of passes is not
limited to two. Since this may result in an unexpected, verbose
option 2, 3, and 4 have been provided to allow determination of the
cause. The assembler will give up if it thinks it can't do the
assembly in *any* number of passes.

Error reporting could be better....

#if OlafPasses

The check if another pass might resolve the source is pretty good, but
not perfect. You can specify the maximum number of passes to do
(default -p10), and with the -P option you can override the normal check.
This allows the following contrived example to resolve in 12 passes:

org 1
repeat [[x < 11] ? [x-11]] + 11
dc.b x
repend
x:

#endif

EXPRESSIONS:
[] may be used to group expressions. The precedense of operators
is the same as for the C language in almost all respects. Use
brackets [] when you are unsure. The reason () cannot be used to
group expressions is due to a conflict with the 6502 and other
assembly languages.
#if OlafBraKet
It is possible to use () instead of [] in expressions following
pseudo-ops, but not following mnemonics. So this works:
if target & (pet3001 | pet4001), but this doesn't:
lda #target & (pet3001 | pet4001).
#endif

Some operators, such as ||, can return a resolved value even if
one of the expressions is not resolved. Operators are as follows:

NOTE WELL! Some operations will result in non-byte values when a
byte value was wanted. For example: ~1 is NOT $FF, but
$FFFFFFFF. Preceding it with a < (take LSB of) will solve the
problem. ALL ARITHMETIC IS CARRIED OUT IN 32 BITS. The final
Result will be automatically truncated to the maximum handleable
by the particular machine language (usually a word) when applied
to standard mnemonics.

prec UNARY

20 ~exp one's complement.
20 -exp negation
20 !exp not expression (returns 0 if exp non-zero, 1 if exp zero)
20 <exp take LSB byte of a 16 bit expression
20 >exp take MSB byte of an expression

BINARY

19 * multiplication
19 / division
19 % mod
18 + addition
18 - subtraction
17 >>,<< shift right, shift left
16 >,>= greater, greater equal
16 <,<= smaller, smaller equal
15 == equal to. Try to use this instead of =
15 = exactly the same as == (exists compatibility)
15 != not equal to
14 & logical and
13 ^ logical xor
12 | logical or
11 && left expression is true AND right expression is true
10 || left expression is true OR right expression is true
9 ? if left expression is true, result is right expression,
else result is 0. [10 ? 20] returns 20
8 [] group expressions
7 , separate expressions in list (also used in
addressing mode resolution, BE CAREFUL!

Note: The effect of the C conditional operator a ? b : c can be
had with [a ? b - c] + c.

Constants:

nnn decimal
0nnn octal
%nnn binary
$nnn hex
'c character
"cc.." string (NOT zero terminated if in DC/DS/DV)
[exp]d the constant expressions is evaluated and it's decimal
result turned into an ascii string.

Symbols:

... -holds CHECKSUM so far (of actual-generated stuff)
.. -holds evaluated value in DV pseudo op
.name -represents a temporary symbol name. Temporary symbols
may be reused inside MACROS and between SUBROUTINES, but
may not be referenced across macros or across SUBROUTINEs.
. -current program counter (as of the beginning of the
instruction).
name -beginning with an alpha character and containing letters,
numbers, or '_'. Represents some global symbol name.
#if OlafStar
* -synonym for ., when not confused as an operator.
#endif
#if OlafDol
nnn$ -temporary label, much like .name, except that defining
a non-temporary label has the effect that SUBROUTINE
has on .name. They are unique within macros, like
.name. Note that 0$ and 00$ are distinct, as are 8$
and 010$.
(mainly for compatibility with other assemblers.)
#endif

WHY codes:
Each bit in the WHY word (verbose option 1) is a reason (why
the assembler needs to do another pass), as follows:

bit 0 expression in mnemonic not resolved
1 -
2 expression in a DC not resolved
3 expression in a DV not resolved (probably in DV's EQM symbol)
4 expression in a DV not resolved (could be in DV's EQM symbol)
5 expression in a DS not resolved
6 expression in an ALIGN not resolved
7 ALIGN: Relocatable origin not known (if in RORG at the time)
8 ALIGN: Normal origin not known (if in ORG at the time)
9 EQU: expression not resolved
10 EQU: value mismatch from previous pass (phase error)
11 IF: expression not resolved
12 REPEAT: expression not resolved

13 a program label has been defined after it has been
referenced (forward reference) and thus we need another
pass
14 a program label's value is different from that of the
previous pass (phase error)

Certain errors will cause the assembly to abort immediately, others
will wait until the current pass is other. The remaining allow another
pass to occur in the hopes the error will fix itself.

VERSIONS:

V2.12
-Fixed macro naming bug (macros wouldn't work if the name after
the 'mac' was in upper case).

V2.11
-Fixed <exp >exp bug, <exp now means LSB, >exp MSB (it used to
be reversed).
-Fixed many bugs in macros and other things
-Added automatic checksumming ... no more doing checksums manually!
-Added several new processors, including 6502.
-Source is now 16/32 bit int compatible, and will compile on an
IBM-PC (the ultimate portability test)

V2.01

-can now have REPEAT/REPEND's within macros
-fill field for DS.W is a word (used to be a byte fill)
-fill field for DS.L is a long (used to be a byte fill)
</pre>

File:Dasm-2.20.14.1-win-x64.zip

2026-06-21T12:51:04Z

E5frog:

Snippet:Blit

2026-06-21T12:38:11Z

E5frog:

The '''blit''' subroutine reads a two-color (1 bit per pixel) block of graphics data from ROM and displays it on the screen, using several parameters. It works much in the same way as the BIOS drawchar routine except for arbitrarily sized data. The code was originally taken from [[Disassembly:Videocart_26|Videocart 26]] and adapted to be more flexible and reusable.

The routine is separated into two parts, '''blitGraphic''' and '''blit'''. '''blit''' takes parameters in registers r1-r6, and retrieves graphics data from the location DC0 points to. It can be called independently of '''blitGraphic'''. '''blitGraphic''' takes hard-coded parameters from ROM at the address pointed at by DC0 and then calls the '''blit''' routine. When the parameters do not need to be dynamic, storing the parameters in ROM and calling the '''blitGraphic''' routine directly can be more efficient than writing them to the registers and calling '''blit'''.

Note that coordinate (0,0) is usually outside the visible emulation area, in MESS/MESSUI/MAME visible area starts at (4,4).

Code works with the '''DASM''' compiler.
<pre>
;===========;
; Blit Code ;
;===========;

;--------------;
; Blit Graphic ;
;--------------;

; takes graphic parameters from ROM, stores them in r1-r6,
; changes the DC and calls the blit function with the parameters
;
; modifies: r1-r6, Q, DC

blitGraphic:
; load six bytes from the parameters into r0-r5
lisu 0
lisl 1
.blitGraphicGetParms:
lm
lr I, A ; store byte and increase ISAR
br7 .blitGraphicGetParms ; not finished with the registers, loop

; load the graphics address
lm
lr QU, A ; storea data address in Q, one byte at the time
lm
lr QL, A
lr DC, Q ; copy Q into DC0

; continue with the blit function

;---------------;
; Blit Function ;
;---------------;

; this function blits a graphic based on parameters set in r1-r6,
; and the graphic data pointed to by DC0, onto the screen
; originally from cart 26, modified and annotated
;
; modifies: r1-r9, DC

; register reference:
; -------------------
; r1 = color 0 (off) (alias: clear/bkg/blue/red/green)
; r2 = color 1 (on) (alias: clear/bkg/blue/red/green)
; r3 = x position
; r4 = y position
; r5 = width
; r6 = height (and vertical counter)
;
; r7 = horizontal counter
; r8 = graphics byte
; r9 = bit counter
;
; DC = pointer to graphics

blit:
lis 1
lr 9, A ; load #1 into r9 so it'll be reset when we start
lr A, 4 ; load the y offset
com ; invert it
.blitRow:
outs 5 ; load accumulator into port 5 (row)

; check vertical counter
ds 6 ; decrease r6 (vertical counter)
bnc .blitExit ; if it rolls over exit

; load the width into the horizontal counter
lr A, 5
lr 7, A

lr A, 3 ; load the x position
com ; complement it
.blitColumn:
outs 4 ; use the accumulator as our initial column
; check to see if this byte is finished
ds 9 ; decrease r9 (bit counter)
bnz .blitDrawBit ; if we aren't done with this byte, branch

.blitGetByte:
; get the next graphics byte and set related registers
lis 8
lr 9, A ; load #8 into r9 (bit counter)
lm
lr 8, A ; load a graphics byte into r8

.blitDrawBit:
; shift graphics byte
lr A, 8 ; load r8 (graphics byte)
as 8 ; shift left one (with carry)
lr 8, A ; save it

; check color to use
lr A, 2 ; load color 1
bc .blitSavePixel ; if this bit is on, draw the color
lr A, 1 ; load color 2
.blitSavePixel:
inc
bc .blitCheckColumn ; branch if the color is "clear"
outs 1 ; output A in p1 (color)

blit.transferData:
lis 6 ; transfer the pixel data
sl 4
outs 0
sl 1
outs 0

lis 4
blit.savePixelDelay:
ai $ff
bnz blit.savePixelDelay

.blitCheckColumn:
ds 7 ; decrease r7 (horizontal counter)
bz .blitCheckRow ; if it's 0, branch

ins 4 ; get p4 (column)
ai $ff ; add 1 (complemented)
br .blitColumn ; branch

.blitCheckRow:
ins 5 ; get p5 (row)
ai $ff ; add 1 (complemented)
br .blitRow ; branch

.blitExit:
; return from the subroutine
pop

</pre>

To call the above functions, you should use:

<pre>
dci graphic.parameters ; address of parameters
pi blitGraphic
</pre>

for '''blitGraphic''', and

<pre>
; when parameters have been loaded into r1-r6 beforehand
dci graphic.data ; address of graphic data
pi blit
</pre>

for '''blit'''. If you're using parameters stored in ROM, they should be in this order:

<pre>
graphic.parameters:
.byte bkg ; color 0
.byte blue ; color 1
.byte 4 ; x position
.byte 18 ; y position
.byte $60 ; width
.byte $13 ; height
.word graphic.data ; address for the graphics
</pre>

== See Also ==
* [[Snippet:Multiblit|Multiblit Subroutine]]

Snippet:Blit

2026-06-21T12:37:11Z

E5frog:

The '''blit''' subroutine reads a two-color (1 bit per pixel) block of graphics data from ROM and displays it on the screen, using several parameters. It works much in the same way as the BIOS drawchar routine except for arbitrarily sized data. The code was originally taken from [[Disassembly:Videocart_26|Videocart 26]] and adapted to be more flexible and reusable.

The routine is separated into two parts, '''blitGraphic''' and '''blit'''. '''blit''' takes parameters in registers r1-r6, and retrieves graphics data from the location DC0 points to. It can be called independently of '''blitGraphic'''. '''blitGraphic''' takes hard-coded parameters from ROM at the address pointed at by DC0 and then calls the '''blit''' routine. When the parameters do not need to be dynamic, storing the parameters in ROM and calling the '''blitGraphic''' routine directly can be more efficient than writing them to the registers and calling '''blit'''.

Note that coordinate (0,0) is usually outside the visible emulation area, in MESS/MESSUI/MAME visible area starts at (4,4).

Code works with the DASM compilator.
<pre>
;===========;
; Blit Code ;
;===========;

;--------------;
; Blit Graphic ;
;--------------;

; takes graphic parameters from ROM, stores them in r1-r6,
; changes the DC and calls the blit function with the parameters
;
; modifies: r1-r6, Q, DC

blitGraphic:
; load six bytes from the parameters into r0-r5
lisu 0
lisl 1
.blitGraphicGetParms:
lm
lr I, A ; store byte and increase ISAR
br7 .blitGraphicGetParms ; not finished with the registers, loop

; load the graphics address
lm
lr QU, A ; storea data address in Q, one byte at the time
lm
lr QL, A
lr DC, Q ; copy Q into DC0

; continue with the blit function

;---------------;
; Blit Function ;
;---------------;

; this function blits a graphic based on parameters set in r1-r6,
; and the graphic data pointed to by DC0, onto the screen
; originally from cart 26, modified and annotated
;
; modifies: r1-r9, DC

; register reference:
; -------------------
; r1 = color 0 (off) (alias: clear/bkg/blue/red/green)
; r2 = color 1 (on) (alias: clear/bkg/blue/red/green)
; r3 = x position
; r4 = y position
; r5 = width
; r6 = height (and vertical counter)
;
; r7 = horizontal counter
; r8 = graphics byte
; r9 = bit counter
;
; DC = pointer to graphics

blit:
lis 1
lr 9, A ; load #1 into r9 so it'll be reset when we start
lr A, 4 ; load the y offset
com ; invert it
.blitRow:
outs 5 ; load accumulator into port 5 (row)

; check vertical counter
ds 6 ; decrease r6 (vertical counter)
bnc .blitExit ; if it rolls over exit

; load the width into the horizontal counter
lr A, 5
lr 7, A

lr A, 3 ; load the x position
com ; complement it
.blitColumn:
outs 4 ; use the accumulator as our initial column
; check to see if this byte is finished
ds 9 ; decrease r9 (bit counter)
bnz .blitDrawBit ; if we aren't done with this byte, branch

.blitGetByte:
; get the next graphics byte and set related registers
lis 8
lr 9, A ; load #8 into r9 (bit counter)
lm
lr 8, A ; load a graphics byte into r8

.blitDrawBit:
; shift graphics byte
lr A, 8 ; load r8 (graphics byte)
as 8 ; shift left one (with carry)
lr 8, A ; save it

; check color to use
lr A, 2 ; load color 1
bc .blitSavePixel ; if this bit is on, draw the color
lr A, 1 ; load color 2
.blitSavePixel:
inc
bc .blitCheckColumn ; branch if the color is "clear"
outs 1 ; output A in p1 (color)

blit.transferData:
lis 6 ; transfer the pixel data
sl 4
outs 0
sl 1
outs 0

lis 4
blit.savePixelDelay:
ai $ff
bnz blit.savePixelDelay

.blitCheckColumn:
ds 7 ; decrease r7 (horizontal counter)
bz .blitCheckRow ; if it's 0, branch

ins 4 ; get p4 (column)
ai $ff ; add 1 (complemented)
br .blitColumn ; branch

.blitCheckRow:
ins 5 ; get p5 (row)
ai $ff ; add 1 (complemented)
br .blitRow ; branch

.blitExit:
; return from the subroutine
pop

</pre>

To call the above functions, you should use:

<pre>
dci graphic.parameters ; address of parameters
pi blitGraphic
</pre>

for '''blitGraphic''', and

<pre>
; when parameters have been loaded into r1-r6 beforehand
dci graphic.data ; address of graphic data
pi blit
</pre>

for '''blit'''. If you're using parameters stored in ROM, they should be in this order:

<pre>
graphic.parameters:
.byte bkg ; color 0
.byte blue ; color 1
.byte 4 ; x position
.byte 18 ; y position
.byte $60 ; width
.byte $13 ; height
.word graphic.data ; address for the graphics
</pre>

== See Also ==
* [[Snippet:Multiblit|Multiblit Subroutine]]

Opcode

2026-06-19T23:54:45Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
! colspan="2" | Register alias
|-
| || '''HU''' = ISAR r10, '''HL''' = ISAR r11 '''KU''' = ISAR r12, '''KL''' = ISAR r13 '''QU''' = ISAR r14, '''QL''' = ISAR r15
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU) || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL) || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU) || %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL) || %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || KU ← (PC1U) KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU) PC1L ← (KL) || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL) PC0U ← (KU) || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL) PC0U ← (QU) || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || QU ← (DC0U) QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU) DC0L ← (QL) || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (HU) DC0L ← (HL) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || HU ← (DC0U) HL ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)!=7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-06-16T15:05:49Z

E5frog: /* The Instruction Set */

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
! colspan="2" | Register alias
|-
| || '''HU''' = ISAR r10, '''HL''' = ISAR r11 '''KU''' = ISAR r12, '''KL''' = ISAR r13 '''QU''' = ISAR r14, '''QL''' = ISAR r15
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU) || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL) || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU) || %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL) || %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || KU ← (PC1U) KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU) PC1L ← (KL) || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL) PC0U ← (KU) || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL) PC0U ← (QU) || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || QU ← (DC0U) QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU) DC0L ← (QL) || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (HU) DC0L ← (HL) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || HU ← (DC0U) HL ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)==7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-06-16T15:02:26Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
! colspan="2" | HU=ISAR r10, HL=ISAR r11, KU=ISAR r12, KL=ISAR r13, QU=ISAR r14, QL=ISAR r15
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU) || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL) || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU) || %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL) || %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || KU ← (PC1U) KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU) PC1L ← (KL) || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL) PC0U ← (KU) || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL) PC0U ← (QU) || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || QU ← (DC0U) QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU) DC0L ← (QL) || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (HU) DC0L ← (HL) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || HU ← (DC0U) HL ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)==7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-06-16T14:57:12Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU) [ISAR r12] || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL) [ISAR r13] || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU) [ISAR r14]|| %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL) [ISAR r15]|| %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || [ISAR r12] KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || [ISAR r13] KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || [ISAR r14] QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || [ISAR r15] QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || [ISAR r12] KU ← (PC1U) [ISAR r13] KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU)[ISAR r12] PC1L ← (KL)[r13] || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL)[r13] PC0U ← (KU)[r12] || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL)[r15] PC0U ← (QU)[r14] || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || [r14]QU ← (DC0U) [r15]QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU)[r14] DC0L ← (QL)[r15] || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (R10) DC0L ← (R11) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || R10 ← (DC0U) R11 ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)==7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-06-16T14:55:06Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| '''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU)[r12] || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL)[r13] || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU)[r14]|| %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL)[r15]|| %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || [r12]KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || [r13]KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || [r14]QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || [r15]QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || [r12]KU ← (PC1U) [r13]KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU)[r12] PC1L ← (KL)[r13] || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL)[r13] PC0U ← (KU)[r12] || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL)[r15] PC0U ← (QU)[r14] || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || [r14]QU ← (DC0U) [r15]QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU)[r14] DC0L ← (QL)[r15] || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (R10) DC0L ← (R11) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || R10 ← (DC0U) R11 ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A now contains m] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if (ISAR & 7)==7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-06-16T14:52:27Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| ''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU)[r12] || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL)[r13] || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU)[r14]|| %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL)[r15]|| %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || [r12]KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || [r13]KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || [r14]QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || [r15]QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || [r12]KU ← (PC1U) [r13]KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU)[r12] PC1L ← (KL)[r13] || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL)[r13] PC0U ← (KU)[r12] || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL)[r15] PC0U ← (QU)[r14] || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || [r14]QU ← (DC0U) [r15]QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU)[r14] DC0L ← (QL)[r15] || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (R10) DC0L ← (R11) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || R10 ← (DC0U) R11 ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A is destroyed] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if ISARL != 7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || Hardware event: IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || Hardware event: RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}

Opcode

2026-06-16T14:51:50Z

E5frog:

The CPU of a digital computer responds to a series of ones and zeros read from memory. The pattern of these, that determine what the CPU is supposed to do, are called Operation Codes or '''opcode'''. As an example the opcode $2B on the F8 System means No Operation (NOP). Programs are made up of opcodes which instruct the F8 System to do something, such as load a register with a value, perform arithmetic on a register, change the program counter (jump) or input or output data through the [[port|ports]]. 
Opcodes in the F8 System are each one byte wide, though some may be followed by an address (two bytes) or a value for the opcode to use, these extra bytes are called operands and an opcode with its operand is called an instruction and the complete set for a CPU is called an Instruction Set. 
Instead of programming these numbers directly (Machine Code Programming) programmers came up with the '''mnemonic''' names and wrote programs to translate such code into machine code. This mnemonic form of programming is called Assembly Language. Below is a table showing both types, if you choose Assembly Language then [[DASM]] or [[f8tool]] are free Assemblers for the F8 System.

== The Instruction Set ==

In the information for each opcode, the following notations are used:
{| border="1" cellspacing="1" cellpadding="4"
! colspan="2" | Opcode Notations
|-
| '''A''' || [[Accumulator]]
|-
| '''Ri''' || [[First registers]] i (r0-r11 [HU,HL=r10,11])
|-
| '''P0''' || [[Program counter]] (PC0)
|-
| '''P''' || Program counter Stack (PC1)
|-
| '''DC0''' || [[Data counter]]
|-
| '''DC1''' || Data counter storage
|-
| '''W''' || [[Status register]] (x,x,x,ICB,O,Z,C,S) Exhange only via the '''J''' register (R9)
|-
| '''ISAR''' || [[ISAR|Indirect Scratchpad Address Register]]
|-
| '''r''' || Scratchpad addressing ONLY as:
{| border="1" cellspacing="1" cellpadding="4"

| '''0 to 11''' || ISAR registers r0-r11
|-
| '''S''' not preferred: '''(IS)''' || Reg. selected by ISAR '''You can't call r12 (KU) using register number'''
|-
| ''I''' not preferred: '''(IS)+''' || Reg. selected by ISAR, then (ISAR)++ '''You can't call r13 (KL) using register number'''
|-
| '''D''' not preferred: '''(IS)-''' || Reg. selected by ISAR, then (ISAR)-- '''You can't call r14 (QU) using register number'''
|}
|-
| '''t''' || 3-bit constant
|-
| '''i''' || 4-bit constant
|-
| '''n''' || 8-bit constant
|-
| '''mn''' || 16-bit constant
|-
| '''(  )''' || Contents of register (e.g.(R11) or (DC))
|-
| '''x''' || Binary value placeholder
|-
! colspan="2" | Status Flag Notations
|-
| '''ICB''' || Interrupts Allowed Flag, b4 in W
|-
| '''O''' || Overflow Flag, b3 in W
|-
| '''Z''' || Zero Flag, b2 in W
|-
| '''C''' || Carry Flag, b1 in W
|-
| '''S''' || Sign Flag, b0 in W
|-
| '''0''' || Resets status flag
|-
| '''1''' || Sets status flag
|-
| '''X''' || Modifies status flag
|}

{| class="wikitable sortable" border="1" cellspacing="1" cellpadding="4" style="width: 100%" style="margin-right: auto
|+ Table copied from [https://channelf.se/files/channelf/f8_info_16_bit_uP_architecture_Terry_Polhoff_%281979%29.pdf F8_info] Extra data added from [http://www.nyx.net/~lturner/public_html/F8_ins.html L. Turner F8 ins] As well as the excellent [https://channelf.se/veswiki/images/1/1d/F8_User%27s_Guide_%281976%29%28Fairchild%29%28Document_67095665%29.pdf User's Guide (1976)]
! rowspan="2" | Mnemonic
! rowspan="2" | Length
! rowspan="2" | Cycles
! rowspan="2" | Description
! colspan="2" | Opcode
! colspan="4" class="unsortable" | Status Flags
! rowspan="2" class="unsortable" | Cycle
! rowspan="2" class="unsortable" | ROMC state
|-
! Binary
! Hex
! style="width: 1.5em; cursor: help" title="Overflow" | O
! style="width: 1.5em; cursor: help" title="Zero" | Z
! style="width: 1.5em; cursor: help" title="Carry" | C
! style="width: 1.5em; cursor: help" title="Signed" | S
|-
| LR A, KU || 1 || 1 || A ← (KU)[r12] || %00000000 || $00 ||- ||- ||- ||- || S || 0
|-
| LR A, KL || 1 || 1 || A ← (KL)[r13] || %00000001 || $01 ||- ||- ||- ||- || S || 0
|- =
| LR A, QU || 1 || 1 || A ← (QU)[r14]|| %00000010 || $02 ||- ||- ||- ||- || S || 0
|-
| LR A, QL || 1 || 1 || A ← (QL)[r15]|| %00000011 || $03 ||- ||- ||- ||- || S || 0
|-
| LR KU, A || 1 || 1 || [r12]KU ← (A) || %00000100 || $04 ||- ||- ||- ||- || S || 0
|-
| LR KL, A || 1 || 1 || [r13]KL ← (A) || %00000101 || $05 ||- ||- ||- ||- || S || 0
|-
| LR QU, A || 1 || 1 || [r14]QU ← (A) || %00000110 || $06 ||- ||- ||- ||- || S || 0
|-
| LR QL, A || 1 || 1 || [r15]QL ← (A) || %00000111 || $07 ||- ||- ||- ||- || S || 0
|-
| LR K, P || 1 || 4 || [r12]KU ← (PC1U) [r13]KL ← (PC1L) || %00001000 || $08 ||- ||- ||- ||- || L L S || 7 B 0
|-
| LR P, K || 1 || 4 || PC1U ← (KU)[r12] PC1L ← (KL)[r13] || %00001001 || $09 ||- ||- ||- ||- || L L S || 15 18 0
|-
| LR A, IS || 1 || 1 || A ← (ISAR) || %00001010 || $0A ||- ||- ||- ||- || S || 0
|-
| LR IS, A || 1 || 1 || ISAR ← (A) || %00001011 || $0B ||- ||- ||- ||- || S || 0
|-
| PK || 1 || 2.5 || PC1 ← (PC0) PC0L ← (KL)[r13] PC0U ← (KU)[r12] || %00001100 || $0C ||- ||- ||- ||- || L L S || 12 14 0
|-
| LR P0, Q || 1 || 4 || PC0L ← (QL)[r15] PC0U ← (QU)[r14] || %00001101 || $0D ||- ||- ||- ||- || L L S || 17 14 0
|-
| LR Q, DC || 1 || 4 || [r14]QU ← (DC0U) [r15]QL ← (DC0L) || %00001110 || $0E ||- ||- ||- ||- || L L S || 6 9 0
|-
| LR DC, Q || 1 || 4 || DC0U ← (QU)[r14] DC0L ← (QL)[r15] || %00001111 || $0F ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR DC, H || 1 || 4 || DC0U ← (R10) DC0L ← (R11) || %00010000 || $10 ||- ||- ||- ||- || L L S || 16 19 0
|-
| LR H, DC || 1 || 4 || R10 ← (DC0U) R11 ← (DC0L) || %00010001 || $11 ||- ||- ||- ||- || L L S || 6 9 0
|-
| SR 1 || 1 || 1 || Shift (A) right one bit, fill with %0 || %00010010 || $12 || 0 || X || 0 || 1 || S || 0
|-
| SL 1 || 1 || 1 || Shift (A) left one bit, fill with %0 || %00010011 || $13 || 0 || X || 0 || X || S || 0
|-
| SR 4 || 1 || 1 || Shift (A) right four bits, fill with %0000 || %00010100 || $14 || 0 || X || 0 || 1 || S || 0
|-
| SL 4 || 1 || 1 || Shift (A) left four bits, fill with %0000 || %00010101 || $15 || 0 || X || 0 || X || S || 0
|-
| LM || 1 || 2.5 || A ← ((DC0)) DC0 ← DC0 + 1 || %00010110 || $16 ||- ||- ||- ||- || L S || 2 0
|-
| ST || 1 || 2.5 || DC0 ← (A) DC0 ← DC0 + 1 || %00010111 || $17 ||- ||- ||- ||- || L S || 5 0
|-
| COM || 1 || 1 || A ← (A)&oplus;$FF [invert/complement]|| %00011000 || $18 || 0 || X || 0 || X || S || 0
|-
| LNK || 1 || 1 || A ← (A)+(C) (add carry from previous operation)|| %00011001 || $19 ||X ||X ||X ||X || S || 0
|-
| DI || 1 || 1 || Disable interrupts status register bit 4 || %00011010 || $1A ||- ||- ||- ||- || S S || 1C 0
|-
| EI || 1 || 1 || Enable interrupts status register bit 4 || %00011011 || $1B ||- ||- ||- ||- || S S || 1C 0
|-
| POP || 1 || 2 || PC0 ← (PC1)|| %00011100 || $1C ||- ||- ||- ||- || S S || 4 0
|-
| LR W, J || 1 || 1 || W ← (R9) || %00011101 || $1D ||- ||- ||- ||- || S S || 1C 0
|-
| LR J, W || 1 || 2 || R9 ← (W) || %00011110 || $1E ||- ||- ||- ||- || S || 0
|-
| INC || 1 || 1 || A ← (A)+1 || %00011111 || $1F ||X ||X ||X ||X || S || 0
|-
| LI n || 2 || 2.5 || A ← n || %00100000 %xxxxxxxx || $20 $xx ||- ||- ||- ||- || L S || 3 0
|-
| NI n || 2 || 2.5 || A ← (A) AND n || %00100001 %xxxxxxxx || $21 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| OI n || 2 || 2.5 || A ← (A) OR n || %00100010 %xxxxxxxx || $22 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| XI n || 2 || 2.5 || A ← (A)&oplus;n || %00100011 %xxxxxxxx || $23 $xx ||0 ||X ||0 ||X || L S || 3 0
|-
| AI n || 2 || 2.5 || A ← (A)+n || %00100100 %xxxxxxxx || $24 $xx || X || X || X || X || L S || 3 0
|-
| CI n || 2 || 2.5 || n+!(A)+1 (n-A) Only set status || %00100101 %xxxxxxxx || $25 $xx ||X ||X ||X ||X || L S || 3 0
|-
| IN n || 2 || 4 || Data Bus ← Port n A ← (Port n)|| %00100110 %xxxxxxxx || $26 $xx ||0 ||X ||0 ||X || L L S || 3 1B 0
|-
| OUT n || 2 || 4 || Data Bus ← Port n Port n ← (A)|| %00100111 %xxxxxxxx || $27 $xx ||- ||- ||- ||- || L L S || 3 1A 0
|-
| PI mn|| 3 || 6.5 || A ← m PC1 ← (PC0)+1 PC0L ← n PC0U ← (A) [A is destroyed] || %00101000 %xxxxxxxx %xxxxxxxx || $28 $xx $xx ||- ||- ||- ||- || L S L L S || 3 D C 14 0
|-
| JMP mn || 3 || 5.5 || A ← m PC0L ← n PC0U ← (A) [A is destroyed] || %00101001 %xxxxxxxx %xxxxxxxx || $29 $xx $xx ||- ||- ||- ||- || L L L S || 3 c 14 0
|-
| DCI mn || 3 || 6 || DC0U ← m PC0+1 DC0L ← n PC0+1 || %00101010 %xxxxxxxx %xxxxxxxx || $2A $xx $xx ||- ||- ||- ||- || L S L S S || 11 3 E 3 0
|-
| NOP || 1 || 1 || No operation (cycle waster) || %00101011 || $2B ||- ||- ||- ||- || S || 0
|-
| XDC || 1 || 2 || DC0,DC1 ← DC1,DC0 || %00101100 || $2C ||- ||- ||- ||- || S S || 1D 0
|-
| DS r || 1 || 1.5 || r ← (r)+$FF [decrease scratchpad byte] || %0011xxxx || $3x ||X ||X ||X ||X || L || 0
|-
| LR A, r || 1 || 1 || A ← (r) || %0100xxxx || $4x || - || - || - || - || S || 0
|-
| LR A, HU || 1 || 1 || A ← (HU) || %01001010 || $4A ||- ||- ||- ||- || S || 0
|-
| LR A, HL || 1 || 1 || A ← (HL) || %01001011 || $4B ||- ||- ||- ||- || S || 0
|-
| LR r, A || 1 || 1 || r ← (A) || %0101xxxx || $5x ||- ||- ||- ||- || S || 0
|-
| LR HU, A || 1 || 1 || HU ← (A) || %01011010 || $5A ||- ||- ||- ||- || S || 0
|-
| LR HL, A || 1 || 1 || HL ← (A) || %01011011 || $5B ||- ||- ||- ||- || S || 0
|-
| LISU i || 1 || 1 || ISARU ← i || %01100xxx || $6x ||- ||- ||- ||- || S || 0
|-
| LISL i || 1 || 1 || ISARL ← i || %01101xxx || $6x ||- ||- ||- ||- || S || 0
|-
| CLR || 1 || 1 || A←0 || %01110000 || $70 ||- ||- ||- ||- || S || 0
|-
| LIS i || 1 || 1 || A ← i || %0111xxxx || $7x ||- ||- ||- ||- || S || 0
|-
| BT t, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] t with W if result is not 0: PC0←PC0+n+1 '''See table below''' || %10000xxx %xxxxxxxx || $8x $xx ||- ||- ||- ||- || S S S S L S || 1C 3 0 1C 1 0
|-
| BP n || 2 || 3 (no branch) 3.5 (branch) || if [[Positive|POSITIVE]] (sign bit 0): PC0←PC0+n+1 || %10000001 %xxxxxxxx || $81 $xx ||- ||- ||- ||- || ||
|-
| BC n || 2 || 3 (no branch) 3.5 (branch) || if CARRY: PC0←PC0+n+1 || %10000010 %xxxxxxxx || $82 $xx ||- ||- ||- ||- || ||
|-
| BZ n || 2 || 3 (no branch) 3.5 (branch) || if ZERO: PC0←PC0+n+1 || %10000100 %xxxxxxxx || $84 $xx ||- ||- ||- ||- || ||
|-
| AM || 1 || 2.5 || A ← (A)+((DC0)) DC0+1 || %10001000 || $88 ||X ||X ||X ||X || L S || 2 0
|-
| AMD || 1 || 2.5 || A ← (A)+((DC0)) decimal adjusted DC0+1 || %10001001 || $89 ||X ||X ||X ||X || L S || 2 0
|-
| NM || 1 || 2.5 || A ← (A)AND((DC0)) DC0+1 || %10001010 || $8A ||0 ||X ||0 ||X || L S ||
2 0
|-
| OM || 1 || 2.5 || A ← (A)OR((DC0)) DC0+1 || %10001011 || $8B ||0 ||X ||0 ||X || L S || 2 0
|-
| XM || 1 || 2.5 || A ← (A)&oplus;((DC0)) DC0+1 || %10001100 || $8C ||0 ||X ||0 ||X || L S || 2 0
|-
| CM || 1 || 2.5 || ((DC0))-A only set status DC0+1|| %10001101 || $8D ||X ||X ||X ||X || L S || 2 0
|-
| ADC || 1 || 2.5 || DC0 ← (DC0)+(A) || %10001110 || $8E ||- ||- ||- ||- || L S || A 0
|-
| BR7 n || 2 || 2 (no branch) 2.5 (branch) || if ISARL != 7: PC0 ← (PC0) + n +1 || %10001111 %xxxxxxxx || $8F $xx ||- ||- ||- ||- || S S L S || 3 0 1 0
|-
| BR n || 2 || 3.5 || PC0 ← (PC0)+n+1 || %10010000 %xxxxxxxx || $90 $xx ||- ||- ||- ||- || ||
|-
| BF i, n || 2 || 3 (no branch) 3.5 (branch) || AND [[bitmask]] i with W if result = FALSE: PC0 ← (PC0)+n+1 '''See table below''' || %1001xxxx %xxxxxxxx || $9x $xx ||- ||- ||- ||- ||S L S S S S|| 1C 1 0 1C 3 0
|-
| BM n || 2 || 3 (no branch) 3.5 (branch) || if [[Negative|NEGATIVE]]: PC0 ← (PC0)+n+1 || %10010001 %xxxxxxxx || $91 $xx ||- ||- ||- ||- || ||
|-
| BNC n || 2 || 3 (no branch) 3.5 (branch) || if NO CARRY: PC0 ← (PC0)+n+1 || %10010010 %xxxxxxxx || $92 $xx ||- ||- ||- ||- || ||
|-
| BNZ n || 2 || 3 (no branch) 3.5 (branch) || if NOT ZERO: PC0 ← (PC0)+n+1 || %10010100 %xxxxxxxx || $94 $xx ||- ||- ||- ||- || ||
|-
| BNO n || 2 || 3 (no branch) 3.5 (branch) || if NO OVERFLOW: PC0 ← (PC0)+n+1 || %10011000 %xxxxxxxx || $98 $xx ||- ||- ||- ||- || ||
|-
| INS i || 1 || 2 (i=0-1) 4 (i=2-15) || A ← (Port i) if i=2-15: Data Bus ← Port Address A ← (Port i) || %1010xxxx || $Ax ||0 ||X ||0 ||X || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1B, 0
|-
| OUTS i || 1 || 2 (i=0-1) 4 (i=2-15) || Port i ← (A) if i=2-15: Data Bus ← Port Address Port i ← (A) || %1011xxxx || $Bx ||- ||- ||- ||- || p0/1: S, S p4-F: L, L, S || p0/1: 1C, 0 p4-F: 1C, 1A, 0
|-
| AS r || 1 || 1 || A ← (A)+(r) || %1100xxxx || $Cx || X || X || X || X || S || 0
|-
| ASD r || 1 || 2 || A ← (A)+(r) (decimal) || %1101xxxx || $Dx ||X ||X ||X ||X || S S || 1C 0
|-
| XS r || 1 || 1 || A ← (A)&oplus;(r) || %1110xxxx || $Ex ||0 ||X ||0 ||X || S || 0
|-
| NS r || 1 || 1 || A ← (A)AND(r) || %1111xxxx || $Fx ||0 ||X ||0 ||X || S || 0
|-
| || IRQ || 5.5 || PC0L ← Int address(l) PC0U ← Int.Address(u) PC1<-PC0 || || ||- ||- ||- ||- || L L L S || 1C 0F 13 0
|-
| || RESET || 3.5 || PC0 ← 0 PC1 ← PC0 || || ||- ||- ||- ||- || S L S || 1C 8 0
|}

=== The BT instruction ===

{| class="wikitable" style="text-align: center
!colspan="6"| Branch conditions for BT instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="3"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
|'''zero'''
|'''carry'''
|'''sign'''
|-
| 0
| 0
| 0
| 0
| Do not branch
| An effective 3 cycle NO-OP
|-
| 1
| 0
| 0
| 1
| Branch if Positive
| Same as '''BP'''
|-
| 2
| 0
| 1
| 0
| Branch on Carry
| Same as '''BC'''
|-
| 3
| 0
| 1
| 1
| Branch if Carry or on Positive
|
|-
| 4
| 1
| 0
| 0
| Branch if Zero
| Same as '''BZ'''
|-
| 5
| 1
| 0
| 1
| Branch if Zero or Positive
| Same as t=1
|-
| 6
| 1
| 1
| 0
| Branch if Zero or on Carry
|
|-
| 7
| 1
| 1
| 1
| Branch if Zero, Carry or Positive
| Same as t=3
|}

=== The BF instruction ===

{| class="wikitable" style="text-align: center
!colspan="7"| Branch conditions for BF instruction
|-
|rowspan="2"|'''Operand''' '''t'''
|colspan="4"|'''Status flags tested'''
|rowspan="2"| '''Definition'''
|rowspan="2"| '''Comments'''
|-
| '''ovf''' 
|'''zero '''
|'''carry'''
|'''sign '''
|-
| 0
| 0
| 0
| 0
| 0
| Unconditional branch relative
| Same as '''BR''' 
|-
| 1
| 0
| 0
| 0
| 1
| Branch on negative
| Same as '''BM''' 
|-
| 2
| 0
| 0
| 1
| 0
| Branch if no carry
| Same as '''BNC'''
|-
| 3
| 0
| 0
| 1
| 1
| Branch if no carry and negative
|
|-
| 4
| 0
| 1
| 0
| 0
| Branch if not zero
| Same as '''BNZ'''
|-
| 5
| 0
| 1
| 0
| 1
|
| Same as t=1 
|-
| 6
| 0
| 1
| 1
| 0
| Branch if no carry and not zero
|
|-
| 7
| 0
| 1
| 1
| 1
|
| Same as t=3 
|-
| 8
| 1
| 0
| 0
| 0
| Branch if there is no overflow
| Same as '''BNO'''
|-
| 9
| 1
| 0
| 0
| 1
| Branch if negative and no overflow
|
|-
| A
| 1
| 0
| 1
| 0
| Branch if no overflow and no carry
|
|-
| B
| 1
| 0
| 1
| 1
| Branch if no overflow, no carry & negative
|
|-
| C
| 1
| 1
| 0
| 0
| Branch if no overflow and not zero
|
|-
| D
| 1
| 1
| 0
| 1
|
| Same as t=9 
|-
| E
| 1
| 1
| 1
| 0
| Branch if no overflow, no carry & not zero
|
|-
| F
| 1
| 1
| 1
| 1
|
| Same as t=B 

|}